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* dm: rtc: Add a uclass for real-time clocksSimon Glass2015-05-053-0/+106
| | | | | | | | | Add a uclass for real-time clocks which support getting the current time, setting it and resetting the chip to a known-working state. Some RTCs have additional registers which can be used to store settings, so also provide an interface to these. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: rtc: Rename mktime() and reduce the number of parametersSimon Glass2015-05-0512-34/+23
| | | | | | | | | Most callers unpack the structure and pass each member. It seems better to pass the whole structure instead, as with the C library. Also add an rtc_ prefix. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: rtc: Rename to_tm() to rtc_to_tm() and add error codeSimon Glass2015-05-0512-13/+17
| | | | | | | | | | Rename this function so that it is clear that it is provided by the RTC. Also return an error when it cannot function as expected. This is unlikely to occur since it works for dates since 1752 and many RTCs do not support such old dates. Still it is better to be accurate. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: rtc: Rename gregorian day functionSimon Glass2015-05-052-3/+8
| | | | | | | | Change this function name to something more descriptive. Also return a failure code if it cannot calculate a correct value. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Add an explicit test mode to the sandbox I2C driverSimon Glass2015-05-051-11/+23
| | | | | | | | | At present this driver has a few test features. They are needed for running the driver model unit tests but are confusing and unnecessary if using sandbox at the command line. Add a flag to enable the test mode, and don't enable it by default. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add functions to read and write a registerSimon Glass2015-05-051-0/+19
| | | | | | | | Add driver model versions of the legacy functions to read and write a single byte register. These are a useful shortcut in many cases. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: sandbox: Add debugging to the speed limitSimon Glass2015-05-051-1/+3
| | | | | | | Print a debug() message with the I2C speed is exceeded. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* cros_ec: Handle the single duplex requirement in cros_ecSimon Glass2015-05-051-3/+20
| | | | | | | With several chips using the SPI protocol it seems better to put the single duplex functionality in the EC rather than the SPI driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* cros_ec: Show the protocol version in the debug messageSimon Glass2015-05-051-1/+2
| | | | | | | When starting up, show the protocol version that has been negotiated with the EC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: spi: Avoid setting the speed with every transferSimon Glass2015-05-051-3/+6
| | | | | | | | Only set the speed if it has changed from last time. Since the speed will be 0 when the device is probed it will always be changed on the first transfer after the device is probed. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add a function to skip ping timeoutsJoe Hershberger2015-05-051-0/+17
| | | | | | | | | When called, the next call to receive will trigger a 10-second leap forward in time to avoid waiting for time to pass when tests are evaluating timeout behavior. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2015-05-055-2/+119
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| * mmc: fsl_esdhc: Add peripheral clock supportYangbo Lu2015-05-041-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | The SD clock could be generated by platform clock or peripheral clock for some platforms. This patch adds peripheral clock support for T1024/T1040/T2080. To enable it, define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * mmc: fsl_esdhc: Add adapter card type identification supportYangbo Lu2015-05-043-1/+46
| | | | | | | | | | | | | | | | | | | | | | | | Add adapter card type identification support by reading FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function, define CONFIG_FSL_ESDHC_ADAPTER_IDENT. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> [York Sun: resolve conflicts in README.fsl-esdhc] Reviewed-by: York Sun <yorksun@freescale.com>
| * fsl/pci: Set CFG_READY for PCIe v3.0 and laterMinghuan Lian2015-05-041-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale PCIe controllers v3.0 and later need to set bit CFG_READY to allow all inbound configuration transactions to be processed normally when in EP mode. However, bit CFG_READY has been moved from PCIe configuration space to CCSR PCIe configuration register comparing previous version. The patch is to set this bit according to PCIe version. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * T2080QDS/PCIe: Soft Reset PCIe on T2080QDS for down-training issueZhao Qiang2015-05-041-0/+15
| | | | | | | | | | | | | | | | | | T2080QDS PEX1/Slot#1 will down-train from x4 to x2, with SRDS_PRTCL_S1 = 0x66 and SRDS_PRTCL_S2 = 0x15. Soft reset PCIe can fix this issue. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers: usb: fsl: Workaround for Erratum A004477Nikhil Badola2015-05-041-0/+10
| | | | | | | | | | | | | | | | | | | | Add a delay of 1 microsecond before issuing soft reset to the controller to let ongoing ULPI transaction complete. This prevents corruption of ULPI Function Control Register which eventually prevents phy clock from entering to low power mode Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2015-05-051-1/+1
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| * | arm: mvebu: db-mv784mp-gp: Fix ECC I2C addressStefan Roese2015-05-051-1/+1
| |/ | | | | | | | | | | | | | | The macro to select the I2C address for ECC bus-width detection was defined incorrectly for the Marvell DB-MV784MP-GP board. This patch changes the macro to the correct value to fix this issue. Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2015-05-0515-69/+74
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| * | ARM: mmc: bcm283x: Remove get_timer_us() from mmc driverMarek Vasut2015-05-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The get_timer_us() function is something which is no longer existing in case we use generic timer framework, so replace it with get_timer(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tyler Baker <tyler.baker@linaro.org>
| * | tegra: mmc: Set the removable flag correctlySimon Glass2015-05-051-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | If the mmc device is non-removable (as indicated by the device tree), set the flag so that users of the device know. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * | mmc: bcm2835_sdhci: Use calloc to allocate bcm2835_sdhci_hostAlexander Stein2015-05-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need to clear the allocated memory explicitly as the included struct sdhci_host has function pointers. Those are compared to NULL to test if this (optional) feature is supported. Leaving them undefined let u-boot jump to arbitrary memory. Signed-off-by: Alexander Stein <alexanders83@web.de>
| * | mmc: fsl_esdhc: update eMMC44 adapter card erase timeoutYangbo Lu2015-05-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale eMMC44 adapter card uses Micron N2M400FDB311A3CF eMMC memory. According to the silicon datasheet, secure erase timeout is 600ms. So increase erase timeout value from 250ms to 600ms. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * | mmc: sdhci: add timeout setting for response busy commandKevin Liu2015-05-051-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timeout interrupt also work for response busy command(R1b) like cmd38/cmd6. So need to set it accordingly. Current code only set timeout for data command. Signed-off-by: Kevin Liu <kliu5@marvell.com> Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | mmc: remove the MMC_MODE_HC flagRob Herring2015-05-0513-20/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
| * | mmc: Fix splitting device initializationAndrew Gabbasov2015-05-051-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting part of device initialization sets the init_in_progress flag only if the MMC card did not yet come to ready state and needs to continue polling. If the card is SD or if the MMC card became ready quickly, the flag is not set and (if using pre-initialization) the starting phase will be re-executed from mmc_init function. Set the init_in_progress flag in all non-error cases. Also, move flags setting statements around so that the flags are not set in error paths. Also, IN_PROGRESS return status becomes unnecessary, so get rid of it. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Restructure polling loops to avoid extra delaysAndrew Gabbasov2015-05-051-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The polling loops in sd_send_op_cond and mmc_complete_op_cond functions check the ready flag state at the end of the loop, that is after executing a delay inside the loop, which, in case of exiting with no error, is not needed. Also, one of these loops, as well as the loop in mmc_send_status, have the delay just before exiting on timeout conditions. Restructure all these loops to check the respective conditions before making a delay for the next loop pass, and to appropriately exit without the delay. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Continue polling MMC card for OCR only if it is still not readyAndrew Gabbasov2015-05-051-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MMC cards come to ready state quite quickly, so that the respective flag appears to be set in mmc_send_op_cond already. In this case trying to continue polling the card with CMD1 in mmc_complete_op_cond is incorrect and may lead to unpredictable results. So check the flag before polling and skip it appropriately. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Do not pass external mmc_cmd structure to mmc_send_op_cond_iter()Andrew Gabbasov2015-05-051-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous change to use 'ocr' structure field for storing send_op_cond command response also stopped using command response directly outside of mmc_send_op_cond_iter(). Now it becomes possible to use command structure in mmc_send_op_cond_iter() locally, removing a necessity to pass it as an argument from the caller. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Avoid extra duplicate entry in mmc device structureAndrew Gabbasov2015-05-051-6/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The 'op_cond_response' field in mmc structure contains the response from the last SEND_OP_COND MMC command while making iterational polling of the card. Later it is copied to 'ocr' field, designed to contain the OCR register value, which is actually the same response from the same command. So, these fields have actually the same data, just in different time periods. It's easier to use the same 'ocr' field in both cases at once, without temporary using of the 'op_cond_response' field. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-05-051-2/+2
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| * \ Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2015-05-05232-2597/+14144
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| * | fix ARM DCC support for ARMv7 based cores (e.g. CortexA)Alexander Merkle2015-04-161-2/+2
| | | | | | | | | | | | Signed-off-by: Alexander Merkle <alexander.merkle@lauterbach.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2015-05-0412-447/+543
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| * | | sunxi: usb: Do not call phy_probe from hcd codeHans de Goede2015-05-042-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 2/3 usb-phys on the sunxi SoCs are really a single separate functional block, and are modelled as such in devicetree. So once we've moved all the sunxi usb code to the driver-model then phy_probe will be called once for the entire block from the driver-model enumeration code. Move to this now as this also avoids problems with phy_probe being called multiple times once we introduce ohci support. This also allows us to get rid of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed to be called only once. Since we're effectively rewriting the probe / remove functions, move them to the end of the file while we are at it, as that is the most logical place for them. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb: Rename the usbc.? files to usb_phy.?Hans de Goede2015-05-043-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usbc.? files now only contain usb-phy related code, rename them to make this clear. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb: Rename sunxi_usbc_foo functions to sunxi_usb_phy_barHans de Goede2015-05-043-20/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the sunxi_usbc_foo functions to sunxi_usb_phy_bar to make it clear that these are usb-phy functions. Also change the verbs & nouns in the suffix to match the verbs & nouns used in the Linux kernels generic phy framework. This patch purely renames things, it contains no functional changes. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb: Remove sunxi_usbc_get_io_base functionHans de Goede2015-05-041-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the only function left in sunxi/usbc.c which is not phy related, so remove it. This is a preparation patch for turning the usbc.c code into a proper usb phy driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: usb: Move setup of host controller clocks to the host controller driversHans de Goede2015-05-042-2/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi "usbc" code is mostly about phy setup, but currently also sets up the host controller clocks, which is something which really belongs in the host controller drivers, so move it there. This is a preparation patch for moving the sunxi ehci code to the driver model and for adding ohci support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: axp: Remove non driver-model support from the axp gpio codeHans de Goede2015-05-042-41/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that all sunxi boards are using driver-model for gpio (*), we can remove the non driver-model support from the axp gpio code, and the glue to call into the axp gpio code from the sunxi_gpio non driver-model code. *) For the regular u-boot build, SPL still uses non driver-model gpio for now, but the SPL never uses axp gpios support and we were already not building axp-gpio support for the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: emac: Remove non driver-model codeHans de Goede2015-05-041-69/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All sunxi boards now use the driver-model, so remove the non driver-model code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: emac: Add driver model supportHans de Goede2015-05-041-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the sunxi-emac eth driver to support driver model. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | sunxi: emac: Rename DMA_CPU_TRRESHOLD to EMAC_RX_BUFSIZEHans de Goede2015-05-041-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Besides being spelled wrong, the DMA_CPU_TRRESHOLD define actually has nothing to do with DMA as we only use mmio fifo access. Rename it to EMAC_RX_BUFSIZE to properly reflect what it does. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | sunxi: emac: Prepare for driver-model supportHans de Goede2015-05-041-44/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split all the core functionality out into functions taking a struct emac_eth_dev *priv argument as preparation for adding driver-model support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | sunxi: emac: port to phylibHans de Goede2015-05-041-42/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a preparation-patch for adding device-model support to the emac driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
| * | | sunxi: axp: Add driver-model support to the axp_gpio codeHans de Goede2015-05-042-1/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver-model support to the axp_gpio code, note that this needs a small tweak to the driver-model version of sunxi_name_to_gpio to deal with the vbus detect and enable pins which are not standard numbered gpios. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: axp: Move axp gpio code to a separate axpi-gpio driverHans de Goede2015-05-045-139/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the axp-gpio code out of the drivers/power/axp*.c code, and into a new separate axpi-gpio driver. This change drops supports for the gpio3 pin on the axp209, as that requires special handling, and no boards are using it. Besides cleaning things up by moving the code to a separate driver, as a bonus this change also adds support for the (non vusb) gpio pins on the axp221 and the gpio pins on the axp152. The new axp-gpio driver gets its own Kconfig option, and is only enabled on boards which need it. Besides that it only gets enabled in the regular u-boot build and not for the SPL as we never need it in the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: axp: Move axp pmic register helpers to a separate fileHans de Goede2015-05-041-119/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the register helpers used to access the registers via p2wi resp. rsb bus on the otherwise identical axp221 and axp223 pmics to a separate file, so that they can be used by the upcoming standalone axp gpio driver too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | | sunxi: axp: Change axp_gpio_foo prototypes to match gpio uclass opsHans de Goede2015-05-043-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the axp_gpio_foo function prototypes to match the gpio uclass op prototypes, this is a preparation patch for moving the axp gpio code to a separate driver-model gpio driver. Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c this adds are removed in a later patch. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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