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* dm: mmc: Move the device list into a separate fileSimon Glass2016-05-175-117/+172
| | | | | | | | | At present the MMC subsystem maintains its own list of MMC devices. This cannot work with driver model, which needs to maintain this itself. Move the list code into a separate 'legacy' file. The core MMC code remains, and will be shared with the driver-model implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Set up the device pointer when using the MMC uclassSimon Glass2016-05-176-1/+11
| | | | | | | Update the existing drivers to set up this new pointer. This will be required by the MMC uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Add functions to select a hardware partitionSimon Glass2016-05-171-0/+29
| | | | | | | | The block device uclass does not currently support selecting a particular hardware partition but this is needed for MMC. Add it so that the blk API can support MMC properly. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Use the new select_hwpart() APISimon Glass2016-05-173-7/+13
| | | | | | Avoid calling directly into the MMC code - use the new API call instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: spl: Use the legacy block interface in SPLSimon Glass2016-05-171-0/+1
| | | | | | | Bring this in for SPL so that we can use generic code for loading from block devices. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a function to obtain the block deviceSimon Glass2016-05-171-0/+5
| | | | | | | | The MMC block device is contained within struct mmc. But with driver model this will not be the case. Add a function to obtain the block device. We can later implement this for CONFIG_BLK. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Implement the select_hwpart() methodSimon Glass2016-05-171-0/+22
| | | | | | | Implement this method so that hardware partitions will work correctly with MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Move mmc_switch_part() above its callersSimon Glass2016-05-171-24/+21
| | | | | | | | This function is defined after it is used. In preparation for making it static, move it up a little. Also drop the printf() which should not appear in a driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Free the block device name when unboundSimon Glass2016-05-171-2/+10
| | | | | | | Mark the device name as allocated so that it will be freed correctly when the device is unbound. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Allow device names to be freed automaticallySimon Glass2016-05-172-0/+8
| | | | | | | | | | Some devices have a name that is stored in allocated memory. At present there is no mechanism to free this memory when the device is unbound. Add a device flag to track whether a name is allocated and a function to add the flag. Free the memory when the device is unbound. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Fix allocation of block-device numberingSimon Glass2016-05-171-9/+9
| | | | | | | Due to code ordering the block devices are not numbered sequentially. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: systemace: Add driver-mode block-device supportSimon Glass2016-05-171-0/+44
| | | | | | Add support for CONFIG_BLK to the systemace driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: systemace: Reorder function to avoid forward declarataionsSimon Glass2016-05-171-31/+26
| | | | | | | Move the systemace_get_dev() function below systemace_read() so that we can avoid a forward declaration. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Add a easier way to create a named block deviceSimon Glass2016-05-171-0/+15
| | | | | | | | Add a function that automatically builds the device name given the parent and a supplied string. Most callers will want to do this, so putting this functionality in one place makes more sense. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Allow blk_create_device() to allocate the device numberSimon Glass2016-05-171-0/+29
| | | | | | | | Allow a devnum parameter of -1 to indicate that the device number should be alocated automatically. The next highest available device number for that interface type is used. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Drop the host_get_dev() functionSimon Glass2016-05-171-10/+0
| | | | | | This function is implemented by the legacy block functions now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Drop the systemace.h headerSimon Glass2016-05-171-1/+0
| | | | | | This has nothing of consequence. Remove it and its only inclusion site. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: systemace: Drop the get_dev() functionSimon Glass2016-05-171-11/+3
| | | | | | This function is implemented by the legacy block functions now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Drop the get_dev() functionSimon Glass2016-05-171-14/+2
| | | | | | This function is implemented by the legacy block functions now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: usb: Drop the get_dev() functionSimon Glass2016-05-171-0/+1
| | | | | | This function is implemented by the legacy block functions now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add an implementation of the 'devnum' functionsSimon Glass2016-05-171-0/+280
| | | | | | | | | | Now that the MMC code accesses devices by number, we can implement this same interface for driver model, allowing MMC to support using driver model for block devices. Add the required functions to the uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a legacy block interface for MMCSimon Glass2016-05-171-3/+27
| | | | | | Add a legacy block interface for MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Add a legacy host block interfaceSimon Glass2016-05-171-0/+7
| | | | | | Add a legacy block interface for sandbox host. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: systemace: Add a legacy block interfaceSimon Glass2016-05-171-0/+14
| | | | | | Add a legacy block interface for systemace. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: blk: Add a legacy block interfaceSimon Glass2016-05-172-0/+265
| | | | | | | | | | There is quite a bit of duplicated common code related to block devices in the IDE and SCSI implementations. Create some helper functions that can be used to reduce the duplication. These rely on a linker list of interface-type drivers Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: scsi: Rename CONFIG_CMD_SCSI to CONFIG_SCSISimon Glass2016-05-171-1/+1
| | | | | | | | This option currently enables both the command and the SCSI functionality. Rename the existing option to CONFIG_SCSI since most of the code relates to the feature. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add dummy SATA functionsSimon Glass2016-05-172-1/+34
| | | | | | | Add some functions needed by the SATA code. This allows it to be compiled for sandbox, thus increasing build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Add dummy SCSI functionsSimon Glass2016-05-172-1/+30
| | | | | | | Add some functions needed by the SCSI code. This allows it to be compiled for sandbox, thus increasing build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Rename disk uclass to ahciSimon Glass2016-05-173-7/+6
| | | | | | | | This started as 'ahci' and was renamed to 'disk' during code review. But it seems that this is too generic. Now that we have a 'blk' uclass, we can use that as the generic piece, and revert to ahci for this. Signed-off-by: Simon Glass <sjg@chromium.org>
* pci: Drop CONFIG_SYS_SCSI_SCAN_BUS_REVERSESimon Glass2016-05-171-4/+0
| | | | | | | This option is not used by any board. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Revert "dm: sandbox: Drop the pre-DM host implementation"Simon Glass2016-05-171-0/+90
| | | | | | | | | | Bring this support back so that sandbox can be compiled with CONFIG_BLK. This allows sandbox to have greater build coverage during the block-device transition. This can be removed again later. This reverts commit 33cf727b1634dbd9cd68a6ebc444a88f053822d7. Signed-off-by: Simon Glass <sjg@chromium.org>
* gpio: exynos(s5p): remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Exynos/S5P gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* gpio: rk: remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Rockchip gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: pic32: remove gpio_xlate routineEric Nelson2016-05-171-10/+0
| | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the pic32 gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* gpio: omap: remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the omap gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: intel_broadwell: remove gpio_xlate routineEric Nelson2016-05-171-10/+0
| | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the intel_broadwell driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: gpio: add a default gpio xlate routineEric Nelson2016-05-171-7/+23
| | | | | | | | | | | | | | | | | Many drivers use a common form of offset + flags for device tree nodes. e.g.: <&gpio1 2 GPIO_ACTIVE_LOW> This patch adds a common implementation of this type of parsing and calls it when a gpio driver doesn't supply its' own xlate routine. This will allow removal of the driver-specific versions in a handful of drivers and simplify the addition of new drivers. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* drivers: usb: common: add common code for usb drivers to useMugunthan V N2016-05-172-0/+41
| | | | | | | Add common usb code which usb drivers makes use of it. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: gpio: introduce 74x164 driverPeng Fan2016-05-173-0/+202
| | | | | | | | | | | | | | | | | | | | Introduce driver to support "fairchild,74hc595" devices. 1. Take linux drivers/drivers/gpio/gpio-74x164.c as reference. 2. Following the naming used in Linux driver with gen_7x164 as the prefix. 3. Enable CONFIG_DM_74X164 to use this driver. 4. Follow Documentation/devicetree/bindings/gpio/gpio-74x164.txt to add device nodes 5. Tested on i.MX6 UltraLite with 74LV595 using gpio command and oscillograph. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Chin Liang See <clsee@altera.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: spi: introduce dm apiPeng Fan2016-05-171-7/+21
| | | | | | | | | | | Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer Convert spi_claim_bus, spi_release_bus and spi_xfer to use the new API. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jteki@openedev.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: spi: soft_spi: switch to use linux compatible stringPeng Fan2016-05-171-10/+28
| | | | | | | | | | | | | | 1. Support compatible string "spi-gpio" which is used by Linux Linux use different bindings, so use UBOOT_COMPAT and LINUX_COMPAT to differentiate them. 2. Introduce SPI_MASTER_NO_RX and SPI_MASTER_NO_TX to handle no rx or no tx case. 3. Tested on i.MX6 UltraLite board with 74LV595 spi-gpio chip. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: spi: soft_spi bug fixPeng Fan2016-05-171-7/+12
| | | | | | | | | | | When doing xfer, should use device->parent, but not device When doing bit xfer, should use "!!(tmpdout & 0x80)", but not "(tmpdout & 0x80)" Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fdt: fix dev_get_addr_name node offsetStephen Warren2016-05-171-2/+2
| | | | | | | | Use the device's own DT offset, not the device's parent's. Fixes: 43c4d44e3330 ("fdt: implement dev_get_addr_name()") Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* video: tegra: refuse to bind to disabled dcsStephen Warren2016-05-171-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This prevents the following boot-time message on any board where only the first DC is in use, yet the DC's DT node is enabled: stdio_add_devices: Video device failed (ret=-22) (This happens on at least Harmony, Ventana, and likely any other Tegra20 board with display enabled other than Seaboard). The Tegra DC's DT node represents a display controller. It may itself drive an integrated RGB display output, or be used by some other display controller such as HDMI. For this reason the DC node itself is not enabled/disabled in DT; the DC itself is considered a shared resource, not the final (board-specific) display output. The node should instantiate a display output driver only if the rgb subnode is enabled. Other output drivers are free to use the DC if they are enabled and their DT node references the DC's DT node. Adapt the Tegra display drivers' bind() routine to only bind to the DC's DT node if the RGB subnode is enabled. Now that the display driver does the right thing, remove the workaround for this issue from Seaboard's DT file. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: core: allow drivers to refuse to bindStephen Warren2016-05-171-0/+4
| | | | | | | | | | | | | In some cases, drivers may not want to bind to a device. Allow bind() to return -ENODEV in this case, and don't treat this as an error. This can be useful in situations where some information source other than the DT node's main status property indicates whether the device should be enabled, for example other DT properties might indicate this, or the driver might query non-DT sources such as system fuses or a version number register. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* m68k: add DM model serial driverangelo@sysam.it2016-05-171-44/+144
| | | | | | | | Boards can now use DM serial driver, or still legacy mcf uart driver version. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
* dm: gpio: pca953x: introduce driver model support for pca953xPeng Fan2016-05-173-0/+375
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new driver that supports driver model for pca953x. The pca953x chips are used as I2C I/O expanders. This driver is designed to support the following chips: " 4 bits: pca9536, pca9537 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, pca9556, pca9557, pca9574, tca6408, xra1202 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, tca6416 24 bits: tca6424 40 bits: pca9505, pca9698 " But for now this driver only supports max 24 bits and pca953x compatible chips. pca957x compatible chips are not supported now. These can be addressed when we need to add such support for the different chips. This driver has been tested on i.MX6 SoloX Sabreauto board with max7310 i2c expander using gpio command as following: =>gpio status -a Bank gpio@30_: gpio@30_0: input: 1 [ ] => dm tree: i2c [ ] | | `-- i2c@021a8000 gpio [ ] | | |-- gpio@30 gpio [ ] | | `-- gpio@32 Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Andrea Scian <andrea.scian@dave.eu> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Michal Simek <michal.simek@xilinx.com> #on ZynqMP zcu102
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-05-061-167/+87
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| * mtd: cqspi: Simplify indirect read codeMarek Vasut2016-05-061-71/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The indirect read code is a pile of nastiness. This patch replaces the whole unmaintainable indirect read implementation with the one from upcoming Linux CQSPI driver, which went through multiple rounds of thorough review and testing. All the patch does is it plucks out duplicate ad-hoc code distributed across the driver and replaces it with more compact code doing exactly the same thing. There is no speed change of the read operation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com>
| * mtd: cqspi: Simplify indirect write codeMarek Vasut2016-05-061-96/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The indirect write code is buggy pile of nastiness which fails horribly when the system runs fast enough to saturate the controller. The failure results in some pages (256B) not being written to the flash. This can be observed on systems which run with Dcache enabled and L2 cache enabled, like the Altera SoCFPGA. This patch replaces the whole unmaintainable indirect write implementation with the one from upcoming Linux CQSPI driver, which went through multiple rounds of thorough review and testing. While this makes the patch look terrifying and violates all best-practices of software development, all the patch does is it plucks out duplicate ad-hoc code distributed across the driver and replaces it with more compact code doing exactly the same thing. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vignesh R <vigneshr@ti.com>
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