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* mtd: denali: fix warning when compiled for 64bit systemMasahiro Yamada2016-03-241-3/+3
| | | | | | | | | | The 64-bit compiler (ex. aarch64) emits "warning: cast from pointer to integer of different size". Make it work with 64bit DMA address while I am here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* net: Move CONFIG_RTL8169 to KconfigBin Meng2016-03-221-0/+6
| | | | | | | | | Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Stephen Warren <swaren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Move CONFIG_RTL8139 to KconfigBin Meng2016-03-221-0/+6
| | | | | | | | | | Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig to use that. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [trini: Fixup MPC8641HPCN* and r2dplus configs] Signed-off-by: Tom Rini <trini@konsulko.com>
* Fix spelling of "transferred".Vagrant Cascadian2016-03-222-3/+3
| | | | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* serial: pl01x: Add support for devices with the rate pre-configured.Eric Anholt2016-03-221-2/+8
| | | | | | | | | | | | | For Raspberry Pi, we had the input clock rate to the pl011 fixed in the rpi.c file, but it may be changed by firmware due to user changes to config.txt. Since the firmware always sets up the uart (default 115200 output unless the user changes it), we can just skip our own uart init to simplify the boot process and more reliably get serial output. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-03-229-118/+446
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| * driver: net: fsl-mc: Return from DPAA_exit if boot_status !=0Prabhakar Kushwaha2016-03-211-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Return value of get_mc_boot_status() in case of failure is not necessary to be -1. So update the error condition check. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Yao Yuan <yao.yuan@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: ldpaa_eth: Add support of PHY frameworkPrabhakar Kushwaha2016-03-211-34/+87
| | | | | | | | | | | | | | | | | | | | | | This patch integrate DPAA2 ethernet driver existing PHY framework. Call phy_connect and phy_config as per available DPMAC id defined in SerDes Protcol. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add workaround for erratum A-009803Shengzhou Liu2016-03-211-5/+39
| | | | | | | | | | | | | | | | | | During initial DDR training, false parity errors may be detected. This patch adds workaround to fix the erratum. Tested on LS2085QDS and LS2080RDB. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discreteShengzhou Liu2016-03-212-7/+63
| | | | | | | | | | | | | | | | | | | | Add support of address parity for DDR4 UDIMM or discrete memory. It requires to configurate corresponding MR5[2:0] and TIMING_CFG_7[PAR_LAT]. Parity can be turned on by hwconfig, e.g. hwconfig=fsl_ddr:parity=on. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * pci/layerscape: set LUT and msi-map for discovered PCI devicesStuart Yoder2016-03-211-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | msi-map properties are used to tell an OS how PCI requester IDs are mapped to ARM SMMU stream IDs. for all PCI devices discovered in a system: -allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device -program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the LUT mapping basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus(). Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080a: remove obsolete stream ID partitioning supportStuart Yoder2016-03-211-70/+0
| | | | | | | | | | | | | | | | | | | | Remove stream ID partitioning support that has been made obsolete by upstream device tree bindings that specify how representing how PCI requester IDs are mapped to MSI specifiers and SMMU stream IDs. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/crypto/fsl: define structures for PDBAneesh Bansal2016-03-211-0/+55
| | | | | | | | | | | | | | | | | | | | | | Structures are defined for PDB (Protocol Data Blcks) for various operations. These structure will be used to add PDB data while creating the PDB descriptors. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> CC: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/crypto/fsl: add constructs for protocol descriptorsAneesh Bansal2016-03-212-0/+52
| | | | | | | | | | | | | | | | | | | | Construct APIs are added to create Protocol Descriptors for CAAM block. Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> CC: Ulises Cardenas <raul.casas@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers/crypto/fsl: correct error checking in run_descriptorAneesh Bansal2016-03-211-1/+1
| | | | | | | | | | | | | | | | | | When CAAM runs a descriptor and an error occurs, a non-zero value is set in Output Status Register. The if condition should check the status for a non-zero value. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | usb: xhci: Fix vendor command error if the request type is ↵Ted Chen2016-03-201-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | USB_REQ_SET_ADDRESS or USB_REQ_SET_CONFIGURATION. Add test into xhci_submit_control_message for usb requesttype in USB vendor request being of standardized type. This fixes detection of certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized requesttype in USB vendor request will be ignored. Signed-off-by: Ted Chen <tedchen@realtek.com> Tested-by: Anand Moon <linux.amoon@gmail.com>
* | dm: sandbox: Drop the pre-DM host implementationSimon Glass2016-03-171-90/+0
| | | | | | | | | | | | | | | | Driver model is used for host device block devices now, so we don't need the old code. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: usb: Unbind old block devices when shutting down USBSimon Glass2016-03-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When 'usb start' is used, block devices are created for any USB flash sticks and disks, etc. When 'usb stop' is used, these block devices are currently not removed. We don't want old block devices hanging around since they can still be visible to U-Boot. Therefore, when USB is shut down, remove and unbind all the block devices created by the USB subsystem. Possibly we should unbind all devices which don't cause problems by being unbound. Most likely we can remove everything except USB controllers, hubs and emulators. We can consider that later. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* | dm: ns16550: Add support for reg-offset propertyMichal Simek2016-03-171-2/+4
|/ | | | | | | | | | | | reg-offset is the part of standard 8250 binding in the kernel. It is shifting start of address space by reg-offset. On Xilinx platform this offset is typically 0x1000. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Moved the new field to the end of the struct to avoid problems: Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: broadwell: Add video supportSimon Glass2016-03-174-1/+1174
| | | | | | | | | | | | | | Add a video driver for Intel's broadwell integrated graphics controller. This uses a binary blob for most init, with the driver just performing a few basic tasks. This driver supports VESA as the mode-setting mechanism. Since most boards don't support driver model yet with VESA, a special case is added to the Kconfig for broadwell. Eventually all boards will use driver model and this can be removed. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* x86: broadwell: Add a GPIO driverSimon Glass2016-03-173-0/+208
| | | | | | | Add a GPIO driver for the GPIO peripheral found on broadwell devices. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Drop all the old pin configuration codeSimon Glass2016-03-171-11/+0
| | | | | | | | We don't need this anymore - we can use device tree and the new pinconfig driver instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: gpio: Allow the pinctrl driver to set up the pin configSimon Glass2016-03-171-175/+5
| | | | | | | | Rather than setting up the pin configuration in the GPIO driver, use the new pinctrl driver to do it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Allow use of serial soon after relocationSimon Glass2016-03-171-1/+1
| | | | | | | | | | | | | | | At present on x86 machines with use cache-as-RAM, the memory goes away just before board_init_r() is called. This means that serial drivers are no-longer unavailable, until initr_dm() it called, etc. Any attempt to use printf() within this period will cause a hang. To fix this, mark the serial devices as 'unavailable' when it is no-longer available. Bring it back when serial_initialize() is called. This means that the debug UART will be used instead for this period. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* input: i8042: Make sure the keyboard is enabledSimon Glass2016-03-171-0/+4
| | | | | | | | | Add one more step into the init sequence. This fixes the keyboard on samus, which otherwise does not work. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* syscon: Avoid returning a device on failureSimon Glass2016-03-171-0/+1
| | | | | | | | | If the device cannot be probed, syscon_get_by_driver_data() will still return a useful value in its devp parameter. Ensure that it returns NULL instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: gpio: Correct GPIO setup orderingSimon Glass2016-03-171-1/+3
| | | | | | | | | | | | | The Intel GPIO driver can set up the GPIO pin mapping when the first GPIO is probed. However, it assumes that the first GPIO to be probed is in the first GPIO bank. If this is not the case then the init will write to the wrong registers. Fix this. Also add a note that this code is deprecated. We should move to using device tree instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Correct a few comments and nitsSimon Glass2016-03-171-1/+0
| | | | | | | | Two comments are missing a parameter and there is an extra blank line. Also two of the region access macros are misnamed. Correct these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Add functions to update PCI configuration registersSimon Glass2016-03-171-0/+57
| | | | | | | | | It is common to read a config register value, clear and set some bits, then write back the updated value. Add functions to do this in one step, for convenience. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* gpio: Use const where possibleSimon Glass2016-03-171-5/+5
| | | | | | | | Some functions do not change the struct gpio_desc parameter. Update these to use const so this is clear. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* gpio: Add a function to obtain a GPIO vector valueSimon Glass2016-03-171-0/+18
| | | | | | | | | | We can use GPIOs as binary digits for reading 'strapping' values. Each GPIO is assigned a single bit and can be set high or low on the circuit board. We already have a legacy function for reading these values. Add one that supports driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* video: Allow simple-panel to be used without regulatorsSimon Glass2016-03-171-8/+10
| | | | | | | | | At present simple-panel requires regulator support and will not build without it. But some panels do not have a power supply, or at least not one that can be controlled. Update the implementation to cope with this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
* x86: Move asm/arch-coreboot/tables.h to a common placeBin Meng2016-03-171-1/+0
| | | | | | | | Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that coreboot table definitions can be used by other x86 builds. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dwmmc: Increase retry timeoutAlexander Graf2016-03-151-1/+1
| | | | | | | | | | | | | | When enable dcache on HiKey, we're running into MMC command timeouts because our retry loop is now faster than the eMMC (or an external SD card) can answer. Increase the retry count to the same as the timeout value for status reports. The real fix is obviously to not base this whole thing on a cycle counter but on real wall time, but that would be slightly more intrusive. Signed-off-by: Alexander Graf <agraf@suse.de>
* input: TWL6030 input support for power button, USB and chargerPaul Kocialkowski2016-03-152-0/+49
| | | | | | | This adds support for detecting a few inputs exported by the TWL6030. Currently-supported inputs are the power button, USB and charger presence. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Power off supportPaul Kocialkowski2016-03-151-0/+8
| | | | | | This adds support for powering off (the omap SoC) from the twl6030. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Remove ifdef around the codePaul Kocialkowski2016-03-151-2/+0
| | | | | | | The TWL6030 power driver is only built when CONFIG_TWL6030_POWER is selected, thus there is no reason to wrap the code with ifdef. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* usb: musb-new: omap2430: OMAP4 MUSB USB controller supportPaul Kocialkowski2016-03-153-0/+25
| | | | | | | This adds support for the OMAP4 MUSB USB controller, with a matching Linux compat definition, TWL6030 USB device setup and USBOTGHS register setup. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Clear VUSB_IN_PMID bit on USB device setupPaul Kocialkowski2016-03-151-0/+1
| | | | | | | | | | | | When booting from USB, the bootrom sets the VUSB_IN_PMID bit of the MISC2 register of the TWL6030. However, U-Boot sets the VUSB_IN_VSYS bit to enable VBUS input. As both bits are contradictory, enabling both disables the input, according to the TWL6030 TRM. Thus, we need to clear the VUSB_IN_PMID bit in case of an USB boot (which could just as well be a memory boot after USB timed out). Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Configure VUSB voltage on USB device setupPaul Kocialkowski2016-03-151-0/+4
| | | | | | This explicitly sets VUSB voltage to 3.3V when enabling USB. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* omap_hsmmc: Board-specific TWL6030 MMC power initializationPaul Kocialkowski2016-03-151-4/+2
| | | | | | | | | | Boards using the TWL6030 regulator may not all use the LDOs the same way. Some might also not use MMC1 at all, so VMMC would't have to be enabled. This delegates TWL6030 MMC power initializations to board-specific functions, that may still call twl6030_power_mmc_init for the default behavior. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Device-index-specific MMC power initializationPaul Kocialkowski2016-03-152-26/+28
| | | | | | | | Not every device has multiple MMC slots available, so it makes sense to enable only the required LDOs for the available slots. Generic code in omap_hsmmc will enable both VMMC and VAUX1, in doubt. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Enable VAUX1 for eMMC power, depending on BOOT2 valuePaul Kocialkowski2016-03-151-0/+19
| | | | | | | | | | | This enables the VAUX1 supply, used for eMMC power in standard configurations. Its voltage is determined by the value of the BOOT2 pin of the TWL6030. Note that the TWL6030 might already have enabled this regulator at startup (depending on the value of the BOOT3 pin of the TWL6030), according to the TWL6030 datasheet. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Some more explicit registers and values definitionsPaul Kocialkowski2016-03-151-11/+15
| | | | | | | This makes the twl6030 mmc and usb-related power registers and values definitions more explicit and clear and adds prefixes to them. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* spi: omap3: Fix multiple definition of 'priv'Jagan Teki2016-03-151-19/+21
| | | | | | | | | | | | | Global definition of priv seems no-sense to use it for non-dm case and pass the pointer to functions which are common to both dm and non-dm. So, fix this by removing omap3_spi_slave from non-dm and make visible to omap3_spi_priv for both dm and non-dm. Cc: Christophe Ricard <christophe-h.ricard@st.com> Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-03-155-22/+326
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| * video: ipu: avoid overflow issuePeng Fan2016-03-141-19/+54
| | | | | | | | | | | | | | | | | | | | | | Multiplication, as "clk->parent->rate * 16" may overflow. So use do_div to avoid such issue. Signed-off-by: Peng Fan <van.freenix@gmail.com> Signed-off-by: Sandor Yu <sandor.yu@nxp.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * rockchip: video: Add LVDS support in vop driverJacob Chen2016-03-141-2/+14
| | | | | | | | | | | | | | | | | | | | LVDS have a different display out mode, add code to get right flag. The vop_ip decide display device and the remote_vop_id decide which vop was being used. So we should use the remote_vop_id to set DCLK_VOP. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: video: Add a display driver for rockchip LVDSJacob Chen2016-03-142-1/+255
| | | | | | | | | | | | | | | | Some Rockchip SoCs support LVDS output. Add a display driver for this so that these displays can be used on supported boards. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: video: Add a operation to display uclassJacob Chen2016-03-141-0/+3
| | | | | | | | | | | | | | | | | | The current display class only allow to get timing from edid. So add a operation to get timing directly from driver. In driver, I will use fdtdec_decode_display_timing to get timing. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Acked-by: Simon Glass <sjg@chromium.org>
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