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* | | | cros: add LPC support for cros_ecHung-ying Tyan2013-06-262-0/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds LPC support for carrying out the cros_ec protocol. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | | cros: exynos: add SPI support for cros_ecHung-ying Tyan2013-06-263-0/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPI support for carrying out the cros_ec protocol. Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | cros: add I2C support for cros_ecHung-ying Tyan2013-06-262-0/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds I2C support for carrying out the cros_ec protocol. Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | | cros: add cros_ec driverHung-ying Tyan2013-06-262-0/+1305
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the cros_ec driver that implements the protocol for communicating with Google's ChromeOS embedded controller. Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Signed-off-by: Bill Richardson <wfrichar@chromium.org> Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Hung-ying Tyan <tyanh@chromium.org> Signed-off-by: Louis Yung-Chieh Lo <yjlou@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Sean Paul <seanpaul@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vincent Palatin <vpalatin@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2013-06-2419-103/+2841
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| * | | | phylib: add atheros ar803x phyHeiko Schocher2013-06-241-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add atheros ar803x phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
| * | | | phylib: add natsemi dp83630 phyHeiko Schocher2013-06-241-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add natsemi dp83630 phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
| * | | | net: update FTGMAC100 for MMU/D-cache supportKuo-Jung Su2013-06-241-21/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com> CC: Tom Rini <trini@ti.com>
| * | | | net: add Faraday FTMAC110 10/100Mbps ethernet supportKuo-Jung Su2013-06-243-0/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux. However it has a weird DMA alignment issue: (1) Tx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: O.K (2) Rx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: Invalid!!! Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
| * | | | net: phy: supplement support for Micrel's KSZ9031SARTRE Leo2013-06-241-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
| * | | | net: macb: add support for gigabit MACBo Shen2013-06-242-38/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add gigabit MAC support in macb driver - using IP version to distinguish whether MAC is GMAC Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * | | | net: macb: using phylib to configure phy deviceBo Shen2013-06-241-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using phylib to configure phy device in macb driver Signed-off-by: Bo Shen <voice.shen@atmel.com>
| * | | | net: macb: using AT91FAMILY replace #ifdeferryBo Shen2013-06-241-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using CONFIG_AT91FAMILY replace #ifdeferry for atmel SoC Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | | net: ks8851_mll: add ethernet supportRoberto Cerati2013-06-243-0/+1003
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The device interface is 16 bits wide. All the available packets are read from the incoming fifo. Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it> Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> [voice.shen@atmel.com: address comments from review results] [voice.shen@atmel.com: clean up for submit] Signed-off-by: Bo Shen <voice.shen@atmel.com> Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
| * | | | phylib: Add Atheros AR8035 GETH PHY supportXie Xiaobo2013-06-241-1/+33
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
| * | | | add support for Xilinx 1000BASE-X phy (GTX)Charles Coldwell2013-06-241-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 39695029bc15041c809df3db4ba19bd729c447fa Author: Charles Coldwell <coldwell@ll.mit.edu> Date: Tue Feb 19 08:27:33 2013 -0500 Changes to support the Xilinx 1000BASE-X phy (GTX/MGT) Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
| * | | | PHY: micrel.c: add support for KSZ9031David Andrey2013-06-241-27/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Micrel PHY KSZ9031 in phylib, including small rework for KSZ9021 to avoid code duplication Signed-off-by: David Andrey <david.andrey@netmodule.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Joe Herschberger <joe.hershberger@gmail.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
| * | | | net: Fix build regression in macb.cJoe Hershberger2013-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The added weak symbol must not be static. This was introduced in 416ce623fbad51af57660346ebb6f7befb88b3c9 Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * | | | net/macb: Add arch specific routine to get mdio controlShiraz Hashim2013-06-241-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPEAr310 and SPEAr320 Ethernet interfaces share same MDIO lines to control their respective phys. Currently there is a fixed configuration in which only a particular MAC can use the MDIO lines. Call an arch specific function to take control of specific mdio lines at runtime. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Stefan Roese <sr@denx.de>
| * | | | net/designware: Do not select MIIPORT for RGMII interfaceVipin Kumar2013-06-241-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not select MIIPORT for RGMII interface Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Stefan Roese <sr@denx.de>
| * | | | NET: mvgbe: add support for DoveSebastian Hesselbarth2013-06-242-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Marvell Dove also uses mvgbe as ethernet driver, therefore add support for Dove to reuse the current driver. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * | | | NET: mvgbe: add phylib supportSebastian Hesselbarth2013-06-241-4/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add phylib support to the Marvell GBE driver. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * | | | NET: phy: add 88E1310 PHY initializationSebastian Hesselbarth2013-06-241-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds PHY initialization for Marvell Alaska 88E1310 PHY. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
| * | | | net: add ICPlus PHY driverYegor Yefremov2013-06-243-0/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver code was taken from Linux kernel source: drivers/net/phy/icplus.c Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
| * | | | phy: export genphy_parse_link()Yegor Yefremov2013-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
| * | | | net: Add sunxi (Allwinner) wemac driverHenrik Nordström2013-06-242-0/+534
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the WEMAC, the ethernet controller included in the Allwinner A10 SoC. It will get used in the upcoming A10 board support. From: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-06-247-139/+345
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| * | | | sf: Warn to use BAR for > 16MiB flashesJagannadha Sutradharudu Teki2013-06-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warning for > 16MiB flashes to #define CONFIG_SPI_FLASH_BAR Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: Add debug messages on spi_flash_read_commonJagannadha Sutradharudu Teki2013-06-231-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added debug's on spi_flash_read_common() - Added space Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: Place the sf calls in proper orderJagannadha Sutradharudu Teki2013-06-231-92/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Placed the sf calls in proper order - erase/write/read Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: Unify spi_flash write codeJagannadha Sutradharudu Teki2013-06-232-67/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move common flash write code into spi_flash_write_common(). Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Add flag status register polling supportJagannadha Sutradharudu Teki2013-06-233-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Remove spi_flash_cmd_poll_bit()Jagannadha Sutradharudu Teki2013-06-232-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no other call other than spi_flash_cmd_wait_ready(), hence removed spi_flash_cmd_poll_bit and use the poll status code spi_flash_cmd_wait_ready() itself. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: spansion: Add support for S25FL512S_64KJagannadha Sutradharudu Teki2013-06-231-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Spansion S25FL512S_64K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: stmicro: Add support for N25Q1024AJagannadha Sutradharudu Teki2013-06-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Numonyx N25Q1024A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: stmicro: Add support for N25Q1024Jagannadha Sutradharudu Teki2013-06-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Numonyx N25Q1024 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: stmicro: Add support for N25Q512AJagannadha Sutradharudu Teki2013-06-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Numonyx N25Q512A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: stmicro: Add support for N25Q512Jagannadha Sutradharudu Teki2013-06-231-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Numonyx N25Q512 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: Use spi_flash_addr() in write callJagannadha Sutradharudu Teki2013-06-231-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the existing spi_flash_addr() for 3-byte addressing cmd filling in write call. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Add bank addr code in CONFIG_SPI_FLASH_BARJagannadha Sutradharudu Teki2013-06-232-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the size for existing boards which has < 16Mbytes SPI flashes. It's upto user which has provision to use the bank addr code for flashes which has > 16Mbytes. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Update sf read to support all sizes of flashesJagannadha Sutradharudu Teki2013-06-231-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updated the spi_flash read func to support all sizes of flashes using bank reg addr facility. The same support has been added in below patch for erase/write spi_flash functions: "sf: Support all sizes of flashes using bank addr reg facility" (sha1: c956f600cbb0943d0afe1004cdb503f4fcd8f415) With these new updates on sf framework, the flashes which has < 16MB are not effected as per as performance is concern and but the u-boot.bin size incrased ~460 bytes. sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Update sf to support all sizes of flashesJagannadha Sutradharudu Teki2013-06-231-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated the spi_flash framework to handle all sizes of flashes using bank/extd addr reg facility The current implementation in spi_flash supports 3-byte address mode due to this up to 16Mbytes amount of flash is able to access for those flashes which has an actual size of > 16MB. As most of the flashes introduces a bank/extd address registers for accessing the flashes in 16Mbytes of banks if the flash size is > 16Mbytes, this new scheme will add the bank selection feature for performing write/erase operations on all flashes. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Read flash bank addr register at probe timeJagannadha Sutradharudu Teki2013-06-232-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | sf: Discover the bank addr commandsJagannadha Sutradharudu Teki2013-06-232-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: Add bank address register writing supportJagannadha Sutradharudu Teki2013-06-232-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support to program a flash bank address register. extended/bank address register contains an information to access the 4th byte addressing in 3-byte address mode. reff' the spec for more details about bank addr register in Page-63, Table 8.16 http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | | spi: mxc_spi: Use DIV_ROUND_UP at appropriate placesAxel Lin2013-06-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | | spi: cf_qspi: Use DIV_ROUND_UP at appropriate placeAxel Lin2013-06-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change slightly improves readability. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Richard Retanubun <richardretanubun@ruggedcom.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * | | | sf: winbond: Add support for W25QXXXFVJagannadha Sutradharudu Teki2013-06-221-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Winbond W25QXXXFV SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: winbond: Add support for W25Q16DWJagannadha Sutradharudu Teki2013-06-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Winbond W25Q16DW SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | sf: winbond: Add support for W25Q128FWJagannadha Sutradharudu Teki2013-06-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Winbond W25Q128FW SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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