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* net: fec: Avoid MX28 bus sync issueMarek Vasut2013-07-121-0/+22
| | | | | | | | | | | | | | | | | | The MX28 multi-layer AHB bus can be too slow and trigger the FEC DMA too early, before all the data hit the DRAM. This patch ensures the data are written in the RAM before the DMA starts. Please see the comment in the patch for full details. This patch was produced with an amazing help from Albert Aribaud, who pointed out it can possibly be such a bus synchronisation issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
* net: fec: Remove bogus flush_dcache_range() callMarek Vasut2013-07-121-1/+0
| | | | | | | | | | | | Remove incorrectly called and duplicate flush_dcache_range() call from fec_mxc driver. The call is not needed, since the caches are already flushed in fec_tbd_init(), moreover the second argument should be the ending address, not size. Signed-off-by: Marek Vasut <marex@denx.de> Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
* video: mxsfb: Break the line in videomode messageFabio Estevam2013-06-281-1/+1
| | | | | | | | | | | | | | Currently we have the following on boot: CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SD/MMC #0, 3V3 DRAM: 128 MiB MMC: MXS MMC: 0 Video: MXSFB: 'videomode' variable not set!In: serial Break the line of the warning message in order to have a better reading format. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* dwc_ahsata: Allow use with dcache enabledEric Nelson2013-06-261-9/+25
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* spi: mxc_spi: Update pre and post divider algorithmDirk Behme2013-06-261-18/+12
| | | | | | | | | | | The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
* spi: mxc_spi: Fix pre and post divider calculationDirk Behme2013-06-261-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
* arm: vf610: Add uart support for Vybrid VF610Alison Wang2013-06-032-0/+133
| | | | | | | This patch adds lpuart support for Vybrid VF610 platform. Signed-off-by: TsiChung Liew <tsicliew@gmail.com> Signed-off-by: Alison Wang <b18965@freescale.com>
* arm: vf610: Add watchdog support for Vybrid VF610Alison Wang2013-06-031-1/+1
| | | | | | This patch adds watchdog support for Vybrid VF610 platform. Signed-off-by: Alison Wang <b18965@freescale.com>
* net: fec_mxc: Add support for Vybrid VF610Alison Wang2013-06-031-3/+1
| | | | | | | | | | | | | | This patch adds FEC support for Vybrid VF610 platform. In function fec_open(), RCR register is only set as RGMII mode. But RCR register should be set as RMII mode for VF610 platform. This configuration is already done in fec_reg_setup(), so this piece of code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII / FEC_RCNTRL_MII_MODE bits. Signed-off-by: Alison Wang <b18965@freescale.com> Reviewed-by: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* video: mxsfb: Add an entry for mx23evk/mx28vk video modesFabio Estevam2013-05-161-0/+5
| | | | | | | | | | | Currently the mxsfb driver takes the display timings from the 'videomode' environment variable. Provide an example on how to set 'videomode' for using splash screen on mx23evk and mx28vk boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Marek Vasut <marex@denx.de>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-1111-110/+197
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| * palmas: use palmas_i2c_[read|write]_u8Nishanth Menon2013-05-101-24/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 21144298 (power: twl6035: add palmas PMIC support) introduced twl6035_i2c_[read|write]_u8 Then, commit dd23e59d (omap5: pbias ldo9 turn on) introduced palmas_[read|write]_u8 for precisely the same access function. TWL6035 belongs to the palmas family, so instead of having an twl6035 API, we could use an generic palmas API instead. To stay consistent with the function naming of twl4030,6030 accessors, we use palmas_i2c_[read|write]_u8 Cc: Balaji T K <balajitk@ti.com> Cc: Sricharan R <r.sricharan@ti.com> Reported-by: Ruchika Kharwar <ruchika@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
| * palmas: rename twl6035_mmc1_poweron_ldo with an palmas generic functionNishanth Menon2013-05-102-2/+2
| | | | | | | | | | | | | | | | Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs, rename twl6035_mmc1_poweron_ldo by a more generic palmas_mmc1_poweron_ldo function. Signed-off-by: Nishanth Menon <nm@ti.com>
| * palmas: rename init_settings to an generic palmas initNishanth Menon2013-05-101-1/+1
| | | | | | | | | | | | | | Since TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs, rename twl6035_init_settings with an more generic palmas_init_settings Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6035: rename to palmasNishanth Menon2013-05-103-6/+6
| | | | | | | | | | | | | | | | | | | | | | TPS659038/TWL6035/TWL6037 all belong to palmas family of TI PMICs Rename twl6035 to palmas to allow reuse across multiple current and future platforms As part of this change, change the CONFIG_TWL6035_POWER to CONFIG_PALMAS_POWER and update usage of header file accordingly. Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6030: move twl6030 register access functions to common header fileNishanth Menon2013-05-101-11/+0
| | | | | | | | | | | | | | | | twl6030_i2c_[read|write]_u8 can be used else where to access multi-function device such as twl6030, so move the register access functions to the common twl6030.h header file. Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl6030: twl6030_i2c_[read|write]_u8 prototype consistentNishanth Menon2013-05-101-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c register access prototype is i2c_read(addr, reg, 1, &buf, 1) i2c_reg_write(u8 addr, u8 reg, u8 val) twl6030_i2c_read_u8(u8 addr, u8 *val, u8 reg) twl6030_i2c_write_u8(u8 addr, u8 val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl6030_i2c_read_u8(u8 addr, u8 reg, u8 *val) twl6030_i2c_write_u8(u8 addr, u8 reg, u8 val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl4030: make twl4030_i2c_read_u8 prototype consistentNishanth Menon2013-05-102-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c read prototype is i2c_read(addr, reg, 1, &buf, 1) twl4030_i2c_read_u8(u8 addr, u8 *val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl4030_i2c_read_u8(u8 addr, u8 reg, u8 *val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * twl4030: make twl4030_i2c_write_u8 prototype consistentNishanth Menon2013-05-103-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | u-boot standard i2c register write prototype is i2c_reg_write(u8 addr, u8 reg, u8 val) twl4030_i2c_write_u8(u8 addr, u8 val, u8 reg) does not provide consistency, so switch the prototype to be consistent with rest of u-boot i2c operations: twl4030_i2c_write_u8(u8 addr, u8 reg, u8 val) Signed-off-by: Nishanth Menon <nm@ti.com>
| * phy: add support for ET1011C physMatt Porter2013-05-103-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | Adds an ET1011C PHY driver which is derived from the Linux kernel PHY driver (drivers/net/phy/et1011c.c) from the v3.9-rc2 tag. Note that an errata workaround config option is implemented to allow for TX_CLK to be enabled even when gigabit mode is negotiated. This workaround is used on the PG1.0 TI814X EVM. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
| * cpsw: add support for TI814x slave_regs differencesMatt Porter2013-05-101-0/+6
| | | | | | | | | | | | | | | | TI814x's version 1 CPSW has a different slave_regs layout. Add support for the differing registers. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* | Revert wrong removal of nand_init and nand_deselectAlbert ARIBAUD2013-05-111-0/+3
| | | | | | | | | | | | | | | | | | The manual resolution in commit ec7023db wrongly removed functions nand_init and nand_deselect from file drivers/mtd/nand/mxc_nand_spl.c. Revert this removal. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Stefano Babic <sbabic@denx.de>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-1112-83/+722
|\ \ | | | | | | | | | | | | | | | Conflicts: drivers/mtd/nand/mxc_nand_spl.c include/configs/m28evk.h
| * | arm: mxs: Add MXS LCDIF driverMarek Vasut2013-05-063-0/+194
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic LCD driver for i.MX233 and i.MX28. This driver allows framebuffer console and framebuffer logo. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * | imx: mx5: Remove legacy iomux supportBenoît Thébaudeau2013-05-051-73/+0
| | | | | | | | | | | | | | | | | | | | | | | | Legacy iomux support is no longer needed now that all boards have been converted to iomux-v3. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Marek Vasut <marex@denx.de>
| * | nand: Add SPL_NAND support to mxc_nand_splMarek Vasut2013-05-051-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for generic NAND SPL via the SPL framework into the mxc_nand_spl driver. This is basically just a simple rename and publication of the already implemented functions. To avoid the bare-bones functions getting in the way of the NAND_SPL, build them only if CONFIG_SPL_FRAMEWORK is not defined. Also make sure the requested payload is aligned to full pages, otherwise this simple driver fails to load the last page. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | Add mxc_ocotp driverBenoît Thébaudeau2013-04-282-0/+217
| | | | | | | | | | | | | | | | | | Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | Add fsl_iim driverBenoît Thébaudeau2013-04-282-0/+287
| | | | | | | | | | | | | | | | | | Add a fsl_iim driver common to i.MX and MPC. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
| * | mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-04-221-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | dma: Add i.MX6 support to drivers/dma/apbh_dma.cStefan Roese2013-04-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This will be used by the i.MX6 NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-04-224-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | | Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-1114-31/+1420
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| * | | mtd: nand: add driver for diskonchip g4 nand flashMike Dunn2013-05-053-0/+1252
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the diskonchip G4 nand flash device. It is based on the driver from the linux kernel. This also includes a separate SPL driver. A separate SPL driver is used because the device operates in a different mode (reliable mode) when loading a boot image, and also because the storage format of the boot image is different from normal data (pages are stored redundantly). The SPL driver basically mimics how a typical IPL reads data from the device. The special operating mode and storage format are used to compensate for the fact that the IPL does not contain the BCH ecc decoding algorithm (due to size constraints). Although the u-boot SPL *could* use ecc, it operates like an IPL for the sake of simplicity and uniformity, since the IPL and SPL share the task of loading the u-boot image. As a side benefit, the SPL driver is very small. [port from linux kernel 3.4 commit 570469f3bde7f71cc1ece07a18d54a05b6a8775d] Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | pxa27x_udc: remove call to unimplemented set_GPIO_mode()Mike Dunn2013-05-051-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_USB_DEV_PULLUP_GPIO is defined, a link error occurs because the set_GPIO_mode() helper function is not implemented. This function doesn't do much except make the code a little more readable, so I just manually coded its equivalent and removed the prototype from the header file. It is invoked no where else in the code. While I was at it, I noticed that two other function prototypes in the same header file are also neither implemented nor invoked anywhere, so I removed them as well. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | pxa_lcd: make lcd_enable() a weak pointerMike Dunn2013-05-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make lcd_init() a weak pointer so that boards can overload it if necessary. The palmtreo680 board needs to wiggle some gpios and configure the pwm controller in order to get the lcd and its backlight working. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | pxa_lcd: add the ACX544AKN lcd deviceMike Dunn2013-05-051-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the definitions required to support the LCD device on the Palm Treo 680. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * | | fman/mEMAC: set SETSP bit in IF_MODE regisgter for RGMII speedZang Roy-R619112013-05-021-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some legacy RGMII phys don't have in band signaling for the speed information. so set the RGMII MAC mode according to the speed got from PHY. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Reported-by: John Traill <john.traill@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | | lib: consolidate hang()Andreas Bießmann2013-05-011-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Delete all occurrences of hang() and provide a generic function. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> [trini: Modify check around puts() in hang.c slightly] Signed-off-by: Tom Rini <trini@ti.com>
| * | | part/dev_desc: Add log2 of blocksize to block_dev_desc data structEgbert Eich2013-05-014-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | log2 of the device block size serves as the shift value used to calculate the block number to read in file systems when implementing avaiable block sizes. It is needed quite often in file systems thus it is pre-calculated and stored in the block device descriptor. Signed-off-by: Egbert Eich <eich@suse.com>
| * | | mmc: Define a constant for the maximum block sizeSimon Glass2013-05-011-12/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The number 512 appears quite a bit in the mmc code. Add a constant for this so that it can be used here and in other parts of the code (e.g. SPL code which loads from mmc). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@google.com>
| * | | spl_mmc: cleanup variable typesPeter Korsgaard2013-05-011-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | block_read returns unsigned long, so it doesn't make sense to check for < 0. and neither does marking the header structure as const and then casting away the constness to load data into it. Also cleanup some unneeded pointer casting while we're at it. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> Reviewed-by: Tom Rini <trini@ti.com>
| * | | watchdog: Add support for Xilinx Microblaze watchdogMichal Simek2013-04-302-0/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Watchdog can be used on Microblaze, PPC and Zynq hw designs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | fpga: Check device name against bitstream nameMichal Simek2013-05-062-2/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure that wrong bitstream won't be loaded to current device. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | fpga: zynq: Add support for loading bitstreamMichal Simek2013-05-063-0/+393
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | fpga: Change the first parameter in fpga_loadbitstreamMichal Simek2013-05-062-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All fpga functions use devnum as int. Only fpga_loadbitstream is using it as unsinged long dev. This patch synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | cmd: fpga: Move fpga_loadbitstream to fpga.cMichal Simek2013-05-062-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In bitstream decoding you can directly check device which you want to load and in fpga.c are fpga_validate and fpga_dev_info functions which should be used for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | fpga: Fix debug message compilation errorMichal Simek2013-05-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_FPGA in past was a bitfield where bits were use for vendor identification. This fix should be the part of this commit: "Improve configuration of FPGA subsystem" (sha1: 0133502e39ff89b67c26cb4015e0e7e8d9571184) Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | fpga: Clean coding styleMichal Simek2013-05-061-118/+98
| |_|/ |/| | | | | | | | | | | | | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | i2c: zynq: Add support for Xilinx ZynqMichal Simek2013-04-302-0/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support Xilinx Zynq i2c controller. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
* | | mmc: Add support for Xilinx Zynq sdhci controllerMichal Simek2013-04-302-0/+41
| | | | | | | | | | | | | | | | | | | | | Add support for SD, MMC and eMMC card on Xilinx Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
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