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path: root/drivers/spi/rk_spi.c
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* rockchip: spi: Remove the explicit pinctrl settingSimon Glass2016-01-211-26/+2
| | | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. The exception is when we want to use a different chip select (other than 0). But this isn't used at present. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Correct chip-enable codeSimon Glass2016-01-211-1/+6
| | | | | | | | At present there is an incorrect call to rkspi_enable_chip(). It should be disabling the chip, not enabling it. Correct this and ensure that the chip is disabled when releasing the bus. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Implement the delaysSimon Glass2016-01-211-4/+23
| | | | | | | | Some devices need delays before and after activiation. Implement these features in the SPI driver so that we will be able to enable the Chrome OS EC. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Correct the bus init codeSimon Glass2016-01-211-2/+2
| | | | | | | Two of the init values are created locally so cannot be out of range. The masking is unnecessary and in one case is incorrect. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Remember the last speed to avoid re-setting itSimon Glass2016-01-211-1/+4
| | | | | | | Rather than changing the clock to the same value on every transaction, remember the last value and don't adjust the clock unless it is necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Avoid setting the pinctrl twiceSimon Glass2016-01-211-3/+6
| | | | | | | | If full pinctrl is enabled we don't need to manually set the pinctrl in the driver. It will happen automatically. Adjust the code to suit - we will still use manual mode in SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Update the driver to use the new clock IDSimon Glass2016-01-211-15/+17
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: rk_spi: Fix debug format warningTom Rini2016-01-191-1/+1
| | | | | | | We need to use %lx not %x to describe a fdt_addr_t Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* rockchip: Add SPI driverSimon Glass2015-09-021-0/+374
Add a SPI driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
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