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* spi: omap3: Fix timeout handlingDavid Dueck2015-04-271-8/+12
| | | | | | | | | | | | | | | The timeout value is never reset during the transfer. This means that when transferring more data we eventually trigger the timeout. This was reported on the mailing list: "Spansion SPI flash read timeout with AM335x" Signed-off-by: David Dueck <davidcdueck@googlemail.com> CC: Tom Rini <trini@konsulko.com> CC: Stefan Roese <sr@denx.de> CC: Andy Pont <andy.pont@sdcsystems.com> Tested-by: David Dueck <davidcdueck@googlemail.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* drivers/spi/omap3: Bug fix of premature write transfer completionVasili Galka2014-03-121-2/+3
| | | | | | | | | | The logic determining SPI "write" transfer completion was faulty. At certain conditions (e.g. slow SPI clock freq) the transfers were interrupted before completion. Both EOT and TXS flags of channel status registeer shall be checked to ensure that all data was transferred. Tested on AM3359 chip. Signed-off-by: Vasili Galka <vasili@visionmap.com>
* spi: omap3: add support for more word lengthsNikita Kiryanov2013-11-121-20/+49
| | | | | | | | | | | | | | | | | | Current implementation only supports 8 bit word lengths, even though omap3 can handle anything between 4 and 32. Update the spi interface to support changing the SPI word length, and implement it in omap3_spi driver to support the full range of possible word lengths. This implementation is backwards compatible by defaulting to the old behavior of 8 bit word lengths. Also, it required a change to the omap3_spi non static I/O functions, but since they are not used anywhere else, no collateral changes are required. Cc: Tom Rini <trini@ti.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* spi: omap3: remove semicolon from #defineNikita Kiryanov2013-11-121-1/+1
| | | | | | | | | | Remove unnecessary semicolon from #define SPI_WAIT_TIMEOUT Cc: Tom Rini <trini@ti.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Gerhard Sittig <gsi@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-141-5/+5
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-141-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-18/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* spi: Use spi_alloc_slave() in each SPI driverSimon Glass2013-03-191-13/+14
| | | | | | | | Rather than each driver having its own way to allocate a SPI slave, use the new allocation function everywhere. This will make it easier to extend the interface without breaking drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
* OMAP3 SPI : Fixed bugs related to SPI transferajoy2012-12-101-32/+44
| | | | | | | | | | | | | | | | | | | | | | Added posted writes (read after writes) to effect the change immediately for channel confiuration and channel enable register Disable the channel to purge receieve data in TX_ONLY mode transfer otherwise rx data will get affected by the next immediate RX_ONLY mode transfer Wait for the EOT bit to be set after last byte has been loaded to TX shift register in the the TX_ONLY mode.This ensures TX data has been completely shifted out Disable the channel in RX_ONLY mode before reading the last data from RXX register to prevent the SPI slave to transmit next word Signed-off-by: Ajoy Kumar Das <akdas75@yahoo.in> Cc: Tom Rini <trini@ti.com> Cc: jacopo mondi <j.mondi@voltaelectronics.com>
* omap3_spi: introduce CONFIG_OMAP3_SPI_D0_D1_SWAPPEDPeter Korsgaard2012-10-251-6/+5
| | | | | | | | | | D0/D1 Swapped or not is a board property, not anything specific to the am33xx SoC, so add a custom define for it. At the same time correct the bit handling for the swapped mode (DPE0 should be cleared and SI/DPE1 set). Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
* am335x evm: Enable support for spi0Tom Rini2012-09-011-0/+10
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Add support, update omap3 McSPI driverTom Rini2012-09-011-0/+6
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* omap3_spi: receive transmit modejacopo mondi2012-03-271-3/+63
| | | | | | | | | | Implementation of receive-transmit mode for omap3 MCSPI. Introduces full duplex communication, needed by some spi devices (such as enc28j60). Signed-off-by: jacopo mondi <mondi@cs.unibo.it> <j.mondi@voltaelectronics.com>
* OMAP3: SPI driverDirk Behme2010-12-111-0/+352
CC: Ruslan N. Araslanov <byaaka@yandex.ru> Signed-off-by: Ruslan Araslanov <ruslan.araslanov@vitecmm.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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