summaryrefslogtreecommitdiffstats
path: root/drivers/net
Commit message (Collapse)AuthorAgeFilesLines
* net: cosmetic: Fix checkpatch.pl failures in net.cJoe Hershberger2015-04-181-6/+6
| | | | | | | Finish eliminating CamelCase from net.c and other failures Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* net: cosmetic: Clean up netconsole variables and functionsJoe Hershberger2015-04-181-15/+17
| | | | | | | | Make a thorough pass through all variables and function names contained within netconsole.c and remove CamelCase and improve naming. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger2015-04-1856-159/+187
| | | | | | | | | | | | | | | Update the naming convention used in the network stack functions and variables that Ethernet drivers use to interact with it. This cleans up the temporary hacks that were added to this interface along with the DM support. This patch has a few remaining checkpatch.pl failures that would be out of the scope of this patch to fix (drivers that are in gross violation of checkpatch.pl). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* net: cosmetic: Cleanup internal packet buffer namesJoe Hershberger2015-04-181-6/+7
| | | | | | | This patch cleans up the names of internal packet buffer names that are used within the network stack and the functions that use them. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* net: cosmetic: Name ethaddr variables consistentlyJoe Hershberger2015-04-187-14/+15
| | | | | | | | Use "_ethaddr" at the end of variables and drop CamelCase. Make constant values actually 'const'. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* net: cosmetic: Change IPaddr_t to struct in_addrJoe Hershberger2015-04-183-29/+30
| | | | | | | | | This patch is simply clean-up to make the IPv4 type that is used match what Linux uses. It also attempts to move all variables that are IP addresses use good naming instead of CamelCase. No functional change. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add support for using the 'lo' interfaceJoe Hershberger2015-04-181-2/+69
| | | | | | | | | | | | | | | The 'lo' interface on Linux doesn't support thinks like ARP or link-layer access like we use to talk to a normal network interface. A higher-level network API must be used to access localhost. As written, this interface is limited to not supporting ICMP since the API doesn't allow the socket to be opened for all IP traffic and be able to receive at the same time. UDP is far more useful to test with, so it was selected over ICMP. Ping won't work, but things like TFTP should work. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add a bridge to a real network for sandboxJoe Hershberger2015-04-183-0/+109
| | | | | | | | | | | | | | Implement a bridge between U-Boot's network stack and Linux's raw packet API allowing the sandbox to send and receive packets using the host machine's network interface. This raw Ethernet API requires elevated privileges. You can either run as root, or you can add the capability needed like so: sudo /sbin/setcap "CAP_NET_RAW+ep" /path/to/u-boot Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add ability to disable ping reply in sandbox eth driverJoe Hershberger2015-04-181-0/+17
| | | | | | | | This is needed to test the netretry functionality (make the command fail on a sandbox eth device). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add ARP and PING response to sandbox driverJoe Hershberger2015-04-181-0/+107
| | | | | | | | | The sandbox driver will now generate response traffic to exercise the ping command even when no network exists. This allows the basic data pathways of the DM to be tested. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* sandbox: eth: Add network support to sandboxJoe Hershberger2015-04-183-0/+108
| | | | | | | Add basic network support to sandbox which includes a network driver. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: eth: Add basic driver model support to Ethernet stackJoe Hershberger2015-04-181-0/+9
| | | | | | | First just add support for MAC drivers. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: Remove the bd* parameter from net stack functionsJoe Hershberger2015-04-182-6/+5
| | | | | | | | | | | | | This value is not used by the network stack and is available in the global data, so stop passing it around. For the one legacy function that still expects it (init op on old Ethernet drivers) pass in the global pointer version directly to avoid changing that interface. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reported-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Trival fix to remove an unneeded variable declaration in 4xx_enet.c)
* sunxi: GPIO pin mux hardware-feature-specific function index definesPaul Kocialkowski2015-04-151-1/+1
| | | | | | | | | | | Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* lpc32xx: add Ethernet supportAlbert ARIBAUD \(3ADEV\)2015-04-102-0/+638
| | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* net: Add Intel Topcliff GMAC driverBin Meng2015-03-243-0/+767
| | | | | | | | | Add a new driver for the Gigabit Ethernet MAC found on Intel Topcliff Platform Controller Hub. Tested under 10/100 half/full duplex and 1000 full duplex modes using ping and tftpboot commands. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Add ethernet FCS length macro in net.hBin Meng2015-03-241-4/+3
| | | | | | | | | Some ethernet drivers use their own version of ethernet FCS length macro which is really common. We define ETH_FCS_LEN in net.h and replace those custom versions in various places. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Net: macb: reset GBE bit when fallback checkingBo Shen2015-03-181-1/+1
| | | | | | | | If the GBE bit is set, when do next time autonegotiation, if the result is not 1000Mbps, it will fallback to 100Mbps checking. So, we need to clear the GBE bit. Signed-off-by: Bo Shen <voice.shen@atmel.com>
* net: Support DMA threshold mode in DWMAC driverSonic Zhang2015-03-051-0/+5
| | | | | | - DMA threshold mode can be selected in board config head file. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* net: configure DWMAC DMA by default AXI burst lengthSonic Zhang2015-03-052-1/+7
| | | | | | | | | | | | | Board can define its own AXI burst length to improve DWMAC DMA performance. v2-changes: - Avoid write burst len register when the Macro is not defined. v3-changes: - Add axi_bus register member to struct eth_dma_regs. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-02-256-46/+295
|\
| * drivers/mc: Migrated MC Flibs to 0.5.2J. German Rivera2015-02-246-46/+295
| | | | | | | | | | | | | | | | | | | | | | Upgrade Manage Complex (MC) flib API to 0.5.2. Rename directory fsl_mc to fsl-mc. Change the fsl-mc node in Linux device tree from "fsl,dprcr" to "fsl-mc". Print MC version info when appropriate. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | ARM: remove cm4008 and cm41xx board supportMasahiro Yamada2015-02-242-230/+0
|/ | | | | | | | These are still non-generic boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Greg Ungerer <greg.ungerer@opengear.com> Acked-by: Marek Vasut <marex@denx.de>
* net: keystone_net: move serdes setup to initialization functionVitaly Andrianov2015-02-161-2/+2
| | | | | | | | | | | | | On Keystone2 devices serdes must be initialized before accessing MDIO bus. This commit moves the keystone2_net_serdes_setup() from keystone2_eth_open to keystone2_emac_initialize to meet that requirement. This also eliminates unnecessary serdes initializatin every time when the keystone2_eth_open is being called. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Nishanth Menon <nm@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2015-01-314-2/+93
|\
| * net/designware: add error message on DMA reset timeoutAlexey Brodkin2015-01-301-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If for some reason DMA module fails to reset user oserves only this: --->--- # dhcp Trying dwmac.e0018000 FAIL --->--- This message makes not much sense. With proposed change error message will be more helpful: --->--- # dhcp Trying dwmac.e0018000 DMA reset timeout FAIL --->--- For example user may do power toggle to recover board functionality. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@ti.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: phy: micrel: add support for KSZ8895 switch in SMI modePhilippe De Muyter2015-01-301-0/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a phy driver for the Micrel KSZ8895 switch. As the SoC MAC is directly connected to the switch MAC the link to the switch is always up. But the KSZ8895 switch can be hardwired in three configuration modes : - not configurable with eventually an eeprom-stored configuration - configurable by the mdio/mdc connection (SMI protocol) - configurable by a SPI connection. In not configurable mode, the switch starts automatically, but in the other modes, it must be started programmatically, by writing 1 in configuration register 1. We only support the not configurable and mdio/mdc (aka SMI) modes here. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * Add MS7206SE ethernet supportYoshinori Sato2015-01-301-1/+30
| | | | | | | | | | Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: tsec: Fix NULL access in case init_phy() failsClaudiu Manoil2015-01-301-0/+2
| | | | | | | | | | | | | | | | If the PHY is not recognized don't access phydev (NULL) and return 0 to signal failure. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | drivers/net/e1000.c: fix compile warning under 64bit modeMinghuan Lian2015-01-301-14/+17
|/ | | | | | | Fix this: warning: cast from pointer to integer of different size Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
* kirkwood: define empty CONFIG_MVGBE_PORTS by defaultLuka Perkov2015-01-251-0/+4
| | | | | | | | | | | | | | Each board with defines it's own set of values. If we do not define CONFIG_MVGBE_PORTS we will hit following error: mvgbe.c: In function 'mvgbe_initialize': mvgbe.c:700:34: error: 'CONFIG_MVGBE_PORTS' undeclared (first use in this function) u8 used_ports[MAX_MVGBE_DEVS] = CONFIG_MVGBE_PORTS; This patch fixes above described problem. Signed-off-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* powerpc: mpc5xxx: remove Total5200 board supportMasahiro Yamada2015-01-231-5/+0
| | | | | | This board is still a non-generic board. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-01-227-13/+678
|\
| * net/vsc9953: Add driver for Vitesse VSC9953 L2 Switch IPCodrin Ciubotariu2015-01-162-0/+498
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for VSC9953 L2 Switch. This Vitesse IP is integrated in Freescale T1040 and T1020 SoCs. The L2 switch has 10 Ethernet ports: 2 internal fixed-links (ports 8 and 9) at 2.5 Gbps and and 8 external ports at 1 Gbps. The external ports may be connected to PHYs over QSGMII and SGMII. Commands have also been added to enable/disable a port and to check a port's link speed, duplexity and status. The commands are: ethsw port <port_nr> enable|disable - enable/disable an l2 switch port ethsw port <port_nr> show - show an l2 switch port's configuration port_nr=0..9; use "all" for all ports For more detailse please see doc/README.t1040-l2switch Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Enable FMAN ports if l2switch ports are connected over SGMIICodrin Ciubotariu2015-01-161-1/+2
| | | | | | | | | | | | | | | | | | | | If SerDes is configured to connect L2 Switch ports from T1040 over SGMII or QSGMII, the two FMAN fixed ports (FM1@DTSEC1 and FM2@DTSEC2) that are connected to two L2 swtch ports must be enabled. These ports don't have PHYs and must be treated accordingly. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Fix error when FMAN MAC has no PHYCodrin Ciubotariu2015-01-161-12/+18
| | | | | | | | | | | | | | | | | | | | U-boot assumes that all FMAN ports have a PHY. Some SoCs (like T1040) have fixed links. This means that the ports are connected MAC to MAc and there is no Ethernet PHY attatched. This patch initializes a FMAN MAC even if it doesn't have a PHY attached. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * phylib: add support for aquantia PHYsShaohui Xie2015-01-163-0/+160
| | | | | | | | | | | | | | | | This patch supports AQ1202, AQ2104, AQR105 PHY. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | net: ll_temac: Fix compilation warning because of phys_addr_tMichal Simek2015-01-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix the compilation warning w+../drivers/net/xilinx_ll_temac.c: In function 'll_temac_init': w+../drivers/net/xilinx_ll_temac.c:235:3: warning: format '%X' expects argument of type 'unsigned int', but argument 4 has type 'phys_addr_t' [-Wformat] introduced by "net: Declare physical address as phys_addr_t unsigned type" (sha1: 16ae7827226ce8b255245d1932e8069f00997a26). Reported-by: Tom Rini <trini@ti.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | net: gem: Use phys_addr_t instead of int for addressesMichal Simek2015-01-211-2/+3
|/ | | | | | | Use phys_addr_t for physical address declaration. It is also unsigned type instead of sign. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* powerpc: manroland: remove uc100, uc101, mucmc52, hmi1001 supportMasahiro Yamada2015-01-051-5/+0
| | | | | | | | These boards are still non-generic boards. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de>
* net: rtl8169: Add support for RTL-8168/8111gThierry Reding2014-12-181-0/+1
| | | | | | | | This network interface card is found on the NVIDIA Jetson TK1. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* net: rtl8169: Use non-cached memory if availableThierry Reding2014-12-181-11/+60
| | | | | | | | | | To work around potential issues with explicit cache maintenance of the RX and TX descriptor rings, allocate them from a pool of uncached memory if the architecture supports it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* net: rtl8169: Properly align buffersThierry Reding2014-12-181-29/+34
| | | | | | | | | | | | | | | | RX and TX descriptor rings should be aligned to 256 byte boundaries. Use the DEFINE_ALIGN_BUFFER() macro to define the buffers so that they don't have to be manually aligned later on. Also make sure that the buffers do align to cache-line boundaries in case the cache-line is higher than the 256 byte alignment requirements of the NIC. Also add a warning if the cache-line size is larger than the descriptor size, because the driver may discard changes to descriptors made by the hardware when requeuing RX buffers. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* net: rtl8169: Honor CONFIG_SYS_RX_ETH_BUFFERThierry Reding2014-12-181-1/+5
| | | | | | | | | | According to the top-level README file, this configuration setting can be used to override the number of receive buffers that an ethernet NIC uses. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* net/fm: update ft_fixup_port to differentiate dual-role macShengzhou Liu2014-12-151-5/+16
| | | | | | | | | | we need to differentiate dual-role MACs into two types: MACs with 10GEC enumeration consistent with DTSEC enumeration(defined by CONFIG_FSL_FM_10GEC_REGULAR_NOTATION) and other MACs without CONFIG_FSL_FM_10GEC_REGULAR_NOTATION defined. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net/phy: enable serdes auto-negotiation for vsc8514 phyShengzhou Liu2014-12-051-2/+11
| | | | | | | | VSC8514 QSGMII PHY requires enabling auto-negotiation, otherwise it wouldn't work. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net/fman: update 10GEC to fit new SoCShengzhou Liu2014-12-052-2/+7
| | | | | | | | | | | | | | | fm_standard_init() initializes each 10G port by FM_TGEC_INFO_INITIALIZER. but it needs different implementation of FM_TGEC_INFO_INITIALIZER on different SoCs. on SoCs earlier(e.g. T4240, T2080), the notation between 10GEC and MAC as below: 10GEC1->MAC9, 10GEC2->MAC10, 10GEC3->MAC1, 10GEC4->MAC2 on SoCs later(e.g. T1024, etc), the notation between 10GEC and MAC as below: 10GEC1->MAC1, 10GEC2->MAC2 so we introduce CONFIG_FSL_FM_10GEC_REGULAR_NOTATION to fit the new SoCs on which 10GEC enumeration is consistent with MAC enumeration. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/mpc85xx: Add T1024/T1023 SoC supportShengzhou Liu2014-12-052-0/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Freescale T1024/T1023 SoC. The T1024 SoC includes the following function and features: - Two 64-bit Power architecture e5500 cores, up to 1.4GHz - private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC) - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration - Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI) - High-speed peripheral interfaces - Three PCI Express 2.0 controllers - Additional peripheral interfaces - One SATA 2.0 controller - Two USB 2.0 controllers with integrated PHY - Enhanced secure digital host controller (SD/eSDHC/eMMC) - Enhanced serial peripheral interface (eSPI) - Four I2C controllers - Four 2-pin UARTs or two 4-pin UARTs - Integrated Flash Controller supporting NAND and NOR flash - Two 8-channel DMA engines - Multicore programmable interrupt controller (PIC) - LCD interface (DIU) with 12 bit dual data rate - QUICC Engine block supporting TDM, HDLC, and UART - Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB) - Support for hardware virtualization and partitioning enforcement - QorIQ Platform's Trust Architecture 2.0 Differences between T1024 and T1023: Feature T1024 T1023 QUICC Engine: yes no DIU: yes no Deep Sleep: yes no I2C controller: 4 3 DDR: 64-bit 32-bit IFC: 32-bit 28-bit Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* B4860QDS: Enable enet port as per fsl_b4860_serdes2 string in hwconfigSuresh Gupta2014-12-051-2/+62
| | | | | | | | | | | | In B4860QDS board SerDes2 lanes EFGH either go to SFP or AMC riser card slot2 so either DTSEC3/DTSEC4 or TGEC1/TGEC2 should be accessible. This Patch enables DTSEC3/DTSEC4 or TGEC1/TGEC2 on bases of user specified string fsl_b4860_serdes2:sfp_amc=amc or fsl_b4860_serdes2:sfp_amc=sfp respectively in hwconfig. Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/b4860qds: add xfi supportShaohui Xie2014-12-051-1/+3
| | | | | | | | | | We need following changes to make xfi work on B4: 1. set cross-point switch VSC3308 to use sfp config when running xfi; 2. add 10G interface check for xfi; 3. set phy address for xfi so the 10G ports can be registered by mdio; Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
OpenPOWER on IntegriCloud