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path: root/drivers/net/e1000.h
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* net: e1000: Convert to use DM PCI APIBin Meng2016-02-051-0/+4
| | | | | | | Update this driver to use proper DM PCI APIs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: e1000: Remove dead codes wrapped by #if 0Bin Meng2015-12-211-31/+0
| | | | | | | Remove those dead codes wrapped by #if 0 and #endif. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: e1000: Convert to driver modelSimon Glass2015-08-211-0/+5
| | | | | | | | | Update this driver to support driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* net: e1000: Prepare for driver model conversionSimon Glass2015-08-211-0/+1
| | | | | | | | | | | | | | | Since struct eth_device does not exist with CONFIG_DM_ETH defined, avoid using it in the driver unless necessary. Most of the time it is better to pass the private driver pointer anyway. Also refactor the code so that code that the driver model implementation will share are available in functions that can be called. Add stubs where necessary. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* net: e1000: Move #include of common.h to the C filesSimon Glass2015-08-211-1/+0
| | | | | | | | | | | We cannot currently include any header files in the C files since common.h needs to be included first, and it is in the header file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* net: e1000: Increase autoneg timeout to 8 secondsStefan Roese2015-08-121-1/+1
| | | | | | | | | | | The current 4.5 timeout for the autonegotiation are not enough to complete it on my platform. Using the Intel E1000 PCIe card in the Marvell db-mv784mp-gp eval board. So lets increase the timeout to 8 seconds. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
* Revert "e1000: fix sw fw sync on igb i210/i211"Tim Harvey2015-08-111-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 17da7120249bfdef877f46be5bbcb3cc01212eb9. The i210/i211 do have the SW_FW_SYNC (0x5b5c) register and this is what should be used when acquiring the semaphore. I believe the issue that this patch was trying to resolve is now resolved by properly releasing the semaphore once no longer needed. Cc: Marcel Ziswiler <marcel@ziswiler.com> Cc: Marek Vasut <marex@denx.de> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: York Sun <yorksun@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* net: Add ethernet FCS length macro in net.hBin Meng2015-03-241-4/+3
| | | | | | | | | Some ethernet drivers use their own version of ethernet FCS length macro which is really common. We define ETH_FCS_LEN in net.h and replace those custom versions in various places. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* e1000: fix sw fw sync on igb i210/i211Marcel Ziswiler2014-10-271-0/+1
| | | | | | | | | I finally had a look at the datasheet and spotted an additional register address difference between regular E1000 and i210/i211 chips. This patch fixes this and now successfully works on programmed i210/i211 as well as unprogrammed i211. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* e1000: add i210 supportMarek Vasut2014-08-211-0/+12
| | | | | | | Add i210 support to the e1000 driver. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
* drivers/net/e1000: Introduce CONFIG_E1000_NO_NVMRojhalat Ibrahim2013-11-221-0/+9
| | | | | | | | | | | The e1000 driver expects to always have some kind of non-volatile memory attached directly to the ethernet controller chip. This means that I would have to add an additional separate flash chip to my custom board just to store essentially the MAC address. Since I don't want to do that, this patch introduces a new config option CONFIG_E1000_NO_NVM. If defined it disables all accesses to the NVM. I have tested the patch with a 82574 controller. Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-16/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Consolidate bool typeYork Sun2013-04-011-30/+25
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* e1000e : Correct Rx Threshold granularityRuchika Gupta2012-12-151-0/+1
| | | | | | | | | | | | | | In e1000e driver, Rx descriptor queue is used such that hardware can add only one descriptor at a time. So the WTHRESH granularity in RXDCTL should be set to single descriptor. This would ensure that every time controller fills a Rx descriptor, it is flushed to host memory. Earlier this granularity was in cache line units i.e 2 descriptors. This leads to controller always waiting for 2 descriptors before flushing them out. But since not more than one Rx BD is actually available , the accumulation condition never gets hit. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com>
* e1000: remove duplicate macros in e1000.hTimur Tabi2011-11-171-11/+0
| | | | | | | Some of the EEPROM Word Offset macros, and a few others, are defined twice in e1000.h. Signed-off-by: Timur Tabi <timur@freescale.com>
* e1000: fix bugs from recent commitsWolfgang Denk2011-11-031-5/+5
| | | | | | | | | | | | | | Commit 114d7fc0 "e1000: Rewrite EEPROM checksum error to give more information" failed to initialize the checksum variable which should result in random results. Fix that. Commit 2326a94d caused a ton of "unused variable 'x'" warnings. Fix these. While we are at it, remove some bogus parens. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* e1000: Allow direct access to the E1000 SPI EEPROM deviceKyle Moffett2011-10-281-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a part of the manufacturing process for some of our custom hardware, we are programming the EEPROMs attached to our Intel 82571EB controllers from software using U-Boot and Linux. This code provides several conditionally-compiled features to assist in our manufacturing process: CONFIG_CMD_E1000: This is a basic "e1000" command which allows querying the controller and (if other config options are set) performing EEPROM programming. In particular, with CONFIG_E1000_SPI this allows you to display a hex-dump of the EEPROM, copy to/from main memory, and verify/update the software checksum. CONFIG_E1000_SPI_GENERIC: Build a generic SPI driver providing the standard U-Boot SPI driver interface. This allows commands such as "sspi" to access the bus attached to the E1000 controller. Additionally, some E1000 chipsets can support user data in a reserved space in the E1000 EEPROM which could be used for U-Boot environment storage. CONFIG_E1000_SPI: The core SPI access code used by the above interfaces. For example, the following commands allow you to program the EEPROM from a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled): usb start fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin e1000 0 spi program $loadaddr 0 1024 e1000 0 spi checksum update Please keep in mind that the Intel-provided .eep files are organized as 16-bit words. When converting them to binary form for programming you must byteswap each 16-bit word so that it is in little-endian form. This means that when reading and writing words to the SPI EEPROM, the bit ordering for each word looks like this on the wire: Time >>> ------------------------------------------------------------------ ... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ... ------------------------------------------------------------------ (MSB is 15, LSB is 0). Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Export core EEPROM access functions for SPI supportKyle Moffett2011-10-281-0/+19
| | | | | | | | | | | | A followup patch will be adding a configurable feature to enable programming of E1000 EEPROMs from the command line or via the generic U-Boot SPI interface. In order for it to work it needs access to certain E1000-internal functions, so export those in the e1000.h header file. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Restructure and streamline PCI device probingKyle Moffett2011-10-281-7/+12
| | | | | | | | | | | | | | | | | | | | | | | By allocating the e1000 device structures much earlier, we can easily generate better error messages and siginficantly clean things up. The only user-visable change (aside from reworded error messages) is that a detected e1000 device which fails to initialize due to software or hardware error will still be allocated a device number. As one example, consider a system with 2 e1000 PCI devices where the first controller has a corrupted EEPROM. Using the old code the second controller would be "e1000#0", while with this change it would be "e1000#1". This change should hopefully make such EEPROM errors much more straightforward to handle correctly in boot scripts and the like. It is also necessary for a followup patch which allows SPI programming of an e1000 controller's EEPROM even if the checksum is invalid. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* e1000: Clean up handling of dual-port NICs and support 82571Kyle Moffett2011-10-281-6/+0
| | | | | | | Consolidate the test for a dual-port NIC to one location for easy modification, then fix support for the dual-port 82571. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* Net: Add Intel E1000 82574L PCIe card supportRoy Zang2011-04-111-0/+6
| | | | | | | | | Add Intel E1000 82574L PCIe card support. Test on MPC8544DS and MPC8572 board. Add the missing contact information for future support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* Add Intel E1000 PCIE card supportRoy Zang2009-08-081-24/+813
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Intel PRO/1000 Network Driver 7.3.20-k2 Add Intel E1000 PCIE card support. The following cards are added: INTEL_82571EB_COPPER INTEL_82571EB_FIBER, INTEL_82571EB_SERDES INTEL_82571EB_QUAD_COPPER INTEL_82571PT_QUAD_COPPER INTEL_82571EB_QUAD_FIBER INTEL_82571EB_QUAD_COPPER_LOWPROFILE INTEL_82571EB_SERDES_DUAL INTEL_82571EB_SERDES_QUAD INTEL_82572EI_COPPER INTEL_82572EI_FIBER INTEL_82572EI_SERDES INTEL_82572EI INTEL_82573E INTEL_82573E_IAMT INTEL_82573L INTEL_82546GB_QUAD_COPPER_KSP3 INTEL_80003ES2LAN_COPPER_DPT INTEL_80003ES2LAN_SERDES_DPT INTEL_80003ES2LAN_COPPER_SPT INTEL_80003ES2LAN_SERDES_SPT 82571EB_COPPER dual ports, 82572EI single port, 82572EI_COPPER single port PCIE cards and 82545EM_COPPER, 82541GI_LF pci cards are tested on both P2020 board and MPC8544DS board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Moved initialization of E1000 Ethernet controller to board_eth_init()Ben Warren2008-09-021-0/+1
| | | | | | | | | | | Affected boards: ap1000 mvbc_p PM854 Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* e1000: add support for 82545GM 64bit PCI-X copper variantPaul Gortmaker2008-07-101-1/+2
| | | | | | | This PCI-X e1000 variant works by just adding in the correct PCI IDs in the appropriate places. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop AdapterWolfgang Grandegger2008-06-021-1/+2
| | | | | Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Big white-space cleanup.Wolfgang Denk2008-05-211-473/+473
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* new PHY @ e1000 - 2nd tryAndre Schwarz2008-03-301-10/+43
| | | | | | | | Add 82541ER device with latest integrated IGP2 PHY. Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom. Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* drivers/net : move net drivers to drivers/netJean-Christophe PLAGNIOL-VILLARD2007-11-251-0/+1758
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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