summaryrefslogtreecommitdiffstats
path: root/drivers/mtd/nand
Commit message (Collapse)AuthorAgeFilesLines
* drivers: mtd: convert makefiles to Kbuild styleMasahiro Yamada2013-10-311-62/+40
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* nand_util.c: Correct licensingTom Rini2013-10-311-1/+3
| | | | | | | | | | | Prior to SPDX licensing this file was GPL-2.0 with Freescale granting rights for "or later" for their contributed code. We incorrectly moved this file to GPL-2.0+, so correct it to GPL-2.0. In addition we cannot easily denote in the file where or what code is "or later", so just set that aside for now and the file as a whole is GPL-2.0 regardless. Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
* mtd/fsl_elbc: take NAND_ECC_SOFT_BCH config option into accountValentin Longchamp2013-10-241-1/+5
| | | | | | | | NAND_ECC_SOFT was the only option available while the SOFT_BCH option may also be used. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Scott Wood <scottwood@freescale.com>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2013-10-141-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-144-17/+17
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
* mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEANPaul Burton2013-10-091-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux modified the MTD driver interface in commit edbc4540 (with the same name as this commit). The effect is that calls to mtd_read will not return -EUCLEAN if the number of ECC-corrected bit errors is below a certain threshold, which defaults to the strength of the ECC. This allows -EUCLEAN to stop indicating "some bits were corrected" and begin indicating "a large number of bits were corrected, the data held in this region of flash may be lost soon". UBI makes use of this and when -EUCLEAN is returned from mtd_read it will move data to another block of flash. Without adopting this interface change UBI on U-boot attempts to move data between blocks every time a single bit is corrected using the ECC, which is a very common occurance on some devices. For some devices where bit errors are common enough, UBI can get stuck constantly moving data around because each block it attempts to use has a single bit error. This condition is hit when wear_leveling_worker attempts to move data from one PEB to another in response to an -EUCLEAN/UBI_IO_BITFLIPS error. When this happens ubi_eba_copy_leb is called to perform the data copy, and after the data is written it is read back to check its validity. If that read returns UBI_IO_BITFLIPS (in response to an MTD -EUCLEAN) then ubi_eba_copy_leb returns 1 to wear_leveling worker, which then proceeds to schedule the destination PEB for erasure. This leads to erase_worker running on the PEB, and following a successful erase wear_leveling_worker is called which begins this whole cycle all over again. The end result is that (without UBI debug output enabled) the boot appears to simply hang whilst in reality U-boot busily works away at destroying a block of the NAND flash. Debug output from this situation: UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 1027 UBI DBG: ubi_io_read: read 4096 bytes from PEB 1027:4096 UBI DBG: ubi_eba_copy_leb: copy LEB 0:0, PEB 1027 to PEB 4083 UBI DBG: ubi_eba_copy_leb: read 1040384 bytes of data UBI DBG: ubi_io_read: read 1040384 bytes from PEB 1027:8192 UBI: fixable bit-flip detected at PEB 1027 UBI DBG: ubi_io_write_vid_hdr: write VID header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:4096 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 4083 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:4096 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:8192 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:8192 UBI: fixable bit-flip detected at PEB 4083 UBI DBG: schedule_erase: schedule erasure of PEB 4083, EC 55, torture 0 UBI DBG: erase_worker: erase PEB 4083 EC 55 UBI DBG: sync_erase: erase PEB 4083, old EC 55 UBI DBG: do_sync_erase: erase PEB 4083 UBI DBG: sync_erase: erased PEB 4083, new EC 56 UBI DBG: ubi_io_write_ec_hdr: write EC header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:0 UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 ... This patch adopts the interface change as in Linux commit edbc4540 in order to avoid such situations. Given that none of the drivers under drivers/mtd return -EUCLEAN, this should only affect those using software ECC. I have tested that it works on a board which is currently out of tree, but which I hope to be able to begin upstreaming soon. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
* mxs_nand: Fix ECC strength for NAND flash with OOB size of 224Elie De Brauwer2013-09-111-0/+3
| | | | | | | | | | | | | | | | | | | | On a board with an i.mx28 and a Micron MT29F4G08ABAEAH4, Linux says: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABAEAH4), 512MiB, page size: 4096, OOB size: 224) the ECC strength is 16. root@(none):/sys/devices/virtual/mtd/mtd0# for i in ecc_strength oobsize subpagesize; do echo $i = `cat $i`; done ecc_strength = 16 oobsize = 224 subpagesize = 4096 The ECC strength was not properly discovered by U-Boot causing the data written by Linux to return an -74 (EBADMSG) when read from U-Boot. This patch fixes mxs_nand_get_ecc_strength() to function in case of a NAND flash with page_data_size = 4096 and page_oob_size= 224. Signed-off-by: Elie De Brauwer <eliedebrauwer@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com>
* mtd: atmel_nand: pmecc: fix bug fail to correct bit error in 1024-bytes sectorWu, Josh2013-09-041-1/+2
| | | | | | | | | | | | | | | | | The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders (13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be refered to section 5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-041-10/+188
|\
| * ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirementWu, Josh2013-08-221-2/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. if CONFIG_SYS_NAND_ONFI_DETECTION is defined, driver will check NAND flash's ecc minimum requirement in ONFI parameter. a) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are defined. then use it. Driver will display a WARNING if the values are different from ONFI parameters. b) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are not defined, then use the value from ONFI parameters. * If ONFI ECC parameters are in ONFI extended parameter page, since we are not support it, so assume the minimum ecc requirement is 2 bits in 512 bytes. * For non-ONFI support nand flash, also assume the minimum ecc requirement is 2 bits in 512 bytes. 2. if CONFIG_SYS_NAND_ONFI_DETECTION is not defined, just use CONFIG_PMECC_CAP and CONFIG_PMECC_SECTOR_SIZE. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * mtd: atmel_nand: alloc memory instead of use static array for pmecc dataWu, Josh2013-08-221-7/+56
| | | | | | | | | | | | | | | | In this way, the pmecc corraction capbility can change in run time. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * ARM: at91: atmel_nand: pmecc driver will select the galois table by sector sizeWu, Josh2013-08-221-1/+4
| | | | | | | | | | | | | | | | | | | | Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> [rebased on master] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | nand_util: delete a useless variableMasahiro Yamada2013-08-221-2/+1
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | powerpc: p1022ds: add TPL for p1022ds nand bootYing Zhang2013-08-202-7/+21
|/ | | | | | | | TPL is introduced in the patch "NAND: TPL : introduce the TPL based on the SPL", here enable TPL for p1022ds nand boot. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-2433-446/+33
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* mtd: mxc_nand: Fix crash after MTD resyncMarek Vasut2013-07-121-6/+4
| | | | | | | | | | | | The driver triggered a BUG() in nand_base.c:3214/nand_scan_tail() because the ecc.strength was not set in NAND_ECC_HW_SYNDROME ECC mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Benoit Thebaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-07-015-24/+27
|\
| * mtd/nand: docg4: fix compiler warningsMike Dunn2013-06-261-8/+7
| | | | | | | | | | | | | | Newer gcc versions warn about unused variables. This patch corrects a few of those warnings that popped up in a build for the palmtreo680 board. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
| * dfu, nand: before write a buffer to nand, erase the nand sectorsHeiko Schocher2013-06-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | before writing the received buffer to nand, erase the nand sectors. If not doing this, nand write fails. See for more info here: http://lists.denx.de/pipermail/u-boot/2013-June/156361.html Using the nand erase option "spread", maybe overwrite blocks on, for example another mtd partition, if the erasing range contains bad blocks. So a limit option is added to nand_erase_opts() Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * mtd: nand: fix initialization of BBT optionsDaniel Schwierzeck2013-06-182-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | commit dfe64e2c89731a3f9950d7acd8681b68df2bae03 Author: Sergey Lapin <slapin@ossfans.org> Date: Mon Jan 14 03:46:50 2013 +0000 mtd: resync with Linux-3.7.1 changed the initialization of BBT options. Fix drivers jz4740 and s3c2410 which have not been updated yet and cause compile errors. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * mtd: nand/docg4: fix driver after Linux resyncMike Dunn2013-06-171-12/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit dfe64e2c89731a3f9950d7acd8681b68df2bae03: mtd: resync with Linux-3.7.1 broke the docg4 driver. Specifically: - some of the prototypes of the ecc methods changed - the NAND_NO_AUTOINCR flag was removed - the ecc.strength element was added. This patch fixes these. Tested on the docg4 on my palmtre680 board. Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
* | powerpc/mpc85xx: new SPL support for IFC NANDPrabhakar Kushwaha2013-06-202-0/+259
|/ | | | | | | | | | | | | | Linker script is not able find start.o binary. So add its absolute path in u-boot-spl.lds. This change is similar to u-boot-nand.lds common/Makefile: Avoid compiling unnecssary files fsl_ifc_spl.c : It is is responsible for reading u-boot binary from NAND flash and copying into DDR. It also transfer control from NAND SPL to u-boot image present in DDR. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* bug, nand, am33xx: nand->ecc.strength not set in board_nand_init()Sergey Lapin2013-06-041-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | commit dfe64e2c89731a3f9950d7acd8681b68df2bae03 Author: Sergey Lapin <slapin@ossfans.org> Date: Mon Jan 14 03:46:50 2013 +0000 mtd: resync with Linux-3.7.1 Introduced runtime bug: U-Boot 2013.04-00499-g46567df-dirty (Jun 04 2013 - 08:17:08) I2C: ready DRAM: 512 MiB WARNING: Caches not enabled NAND: BUG: failure at nand_base.c:3214/nand_scan_tail()! BUG! resetting ... on boards using drivers/mtd/nand/omap_gpmc.c as in board_nand_init() nand->ecc.strength is not set. Fix this! Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-05-3121-1277/+1502
|\
| * mtd: resync with Linux-3.7.1Sergey Lapin2013-05-3121-1253/+1440
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is essentially an update of u-boot MTD subsystem to the state of Linux-3.7.1 with exclusion of some bits: - the update is concentrated on NAND, no onenand or CFI/NOR/SPI flashes interfaces are updated EXCEPT for API changes. - new large NAND chips support is there, though some updates have got in Linux-3.8.-rc1, (which will follow on top of this patch). To produce this update I used tag v3.7.1 of linux-stable repository. The update was made using application of relevant patches, with changes relevant to U-Boot-only stuff sticked together to keep bisectability. Then all changes were grouped together to this patch. Signed-off-by: Sergey Lapin <slapin@ossfans.org> [scottwood@freescale.com: some eccstrength and build fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * nand/fsl_ifc: Convert to self-initPrabhakar Kushwaha2013-05-221-5/+37
| | | | | | | | | | | | Convert NAND IFC driver to support CONFIG_SYS_NAND_SELF_INIT. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * mtd: nand: use ssize_t instead of size_t to prevent infinite loophtbegin2013-05-221-1/+2
| | | | | | | | | | | | | | | | | | | | | | When a all 0xFF buffer is passed to drop_ffs, the no-0xFF check loop will loop forever. After the fix, If ssize_t i = -1 and size_t l = i + 1, the value of l will still be 0 as expected. Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Ben Gardiner <bengardiner@nanometrics.ca> Cc: Scott Wood <scottwood@freescale.com>
| * mtd: nand: fix the partial page write conditionhtbegin2013-05-221-1/+1
| | | | | | | | | | | | | | When writelen is mtd->writesize - 1, it is still a partial page write Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
| * nand/fsl_elbc: detect page size at runtimeScott Wood2013-05-221-17/+22
| | | | | | | | | | | | | | | | | | | | | | This avoids needing a separate U-Boot config when some revisions of a board have small-page NAND and other revisions have large-page NAND (except for NAND SPL targets). CONFIG_FSL_ELBC_FMR is removed -- it was never used nor documented, and it gets in the way of this change. Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Revert wrong removal of nand_init and nand_deselectAlbert ARIBAUD2013-05-111-0/+3
| | | | | | | | | | | | | | | | | | The manual resolution in commit ec7023db wrongly removed functions nand_init and nand_deselect from file drivers/mtd/nand/mxc_nand_spl.c. Revert this removal. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Stefano Babic <sbabic@denx.de>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-05-112-6/+19
|\ \ | | | | | | | | | | | | | | | Conflicts: drivers/mtd/nand/mxc_nand_spl.c include/configs/m28evk.h
| * | nand: Add SPL_NAND support to mxc_nand_splMarek Vasut2013-05-051-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for generic NAND SPL via the SPL framework into the mxc_nand_spl driver. This is basically just a simple rename and publication of the already implemented functions. To avoid the bare-bones functions getting in the way of the NAND_SPL, build them only if CONFIG_SPL_FRAMEWORK is not defined. Also make sure the requested payload is aligned to full pages, otherwise this simple driver fails to load the last page. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Scott Wood <scottwood@freescale.com>
| * | mtd: mxs_nand: Add support for i.MX6Stefan Roese2013-04-221-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| * | imx: Move some header files from arch-mxs to imx-commonStefan Roese2013-04-221-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following headers are moved to a i.MX common location: - regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | | mtd: nand: add driver for diskonchip g4 nand flashMike Dunn2013-05-053-0/+1252
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the diskonchip G4 nand flash device. It is based on the driver from the linux kernel. This also includes a separate SPL driver. A separate SPL driver is used because the device operates in a different mode (reliable mode) when loading a boot image, and also because the storage format of the boot image is different from normal data (pages are stored redundantly). The SPL driver basically mimics how a typical IPL reads data from the device. The special operating mode and storage format are used to compensate for the fact that the IPL does not contain the BCH ecc decoding algorithm (due to size constraints). Although the u-boot SPL *could* use ecc, it operates like an IPL for the sake of simplicity and uniformity, since the IPL and SPL share the task of loading the u-boot image. As a side benefit, the SPL driver is very small. [port from linux kernel 3.4 commit 570469f3bde7f71cc1ece07a18d54a05b6a8775d] Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
* | lib: consolidate hang()Andreas Bießmann2013-05-011-9/+0
|/ | | | | | | | | Delete all occurrences of hang() and provide a generic function. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> [trini: Modify check around puts() in hang.c slightly] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-122-10/+60
|\ | | | | | | | | Conflicts: drivers/video/exynos_fb.c
| * nand: Extend nand_(read|write)_skip_bad with *actual and limit parametersTom Rini2013-04-101-8/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We make these two functions take a size_t pointer to how much space was used on NAND to read or write the buffer (when reads/writes happen) so that bad blocks can be accounted for. We also make them take an loff_t limit on how much data can be read or written. This means that we can now catch the case of when writing to a partition would exceed the partition size due to bad blocks. To do this we also need to make check_skip_len count not just complete blocks used but partial ones as well. All callers of nand_(read|write)_skip_bad are adjusted to call these with the most sensible limits available. The changes were started by Pantelis and finished by Tom. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
| * Consolidate bool typeYork Sun2013-04-011-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* | kirkwood_nand: allow usage of NAND_ECC_SOFT_BCHGerlando Falauto2013-04-121-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_NAND_ECC_BCH is set use 4-bit error correction code instead of the 1-bit error correction code on the NAND device. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | arm: Remove support for unused s3c64xxBenoît Thébaudeau2013-04-122-296/+0
| | | | | | | | | | | | | | | | Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the Git history if necessary. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* | nand: mxc: Switch NAND SPL to generic SPLBenoît Thébaudeau2013-04-124-5/+597
| | | | | | | | | | | | | | | | | | This also fixes support for mx31pdk and tx25, which had been broken by commit e05e5de7fae5bec79617e113916dac6631251156. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* | nand: mxc: Use appropriate page number in syndrome functionsBenoît Thébaudeau2013-04-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | The syndrome functions should use the page number passed as argument instead of the page number saved upon NAND_CMD_READ0. This does not make any difference if the NAND_NO_AUTOINCR option is set, but otherwise this fixes accesses to the wrong pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome()Benoît Thébaudeau2013-04-121-1/+1
| | | | | | | | | | | | | | | | | | | | The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did not match the page being worked on. By the way, replace the GCC-specific __FUNCTION__ with __func__. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | nand: mxc: Add support for i.MX5Benoît Thébaudeau2013-04-121-11/+108
| | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* | nand: mxc: Prepare to add support for i.MX5Benoît Thébaudeau2013-04-121-46/+46
| | | | | | | | | | | | | | | | | | | | | | Add some abstraction to NFC definitions so that some parts of the current code can also be used for future i.MX5 code. Clean up a few things by the way. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* | mtd: nand: mxc_nand: Fix is_16bit_nand()Fabio Estevam2013-04-121-34/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently is_16bit_nand() is a per SoC function and it decides the bus nand width by reading some boot related registers. This method works when NAND is the boot medium, but does not work if another boot medium is used. For example: booting from a SD card and then using NAND to store the environment variables, would lead to the following error: NAND bus width 16 instead 8 bit No NAND device found!!! 0 MiB Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width. If it is defined in the board file, then consider 16-bit NAND bus-width, otherwise assume 8-bit NAND is used. This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which states: nand-bus-width : 8 or 16 bus width if not present 8 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* | mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BITFabio Estevam2013-04-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* | omap_gpmc: add support for hw assisted BCH8Andreas Bießmann2013-04-081-91/+276
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel states: ---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8--- And we do so in u-boot. This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Mansoor Ahamed <mansoor.ahamed@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* | omap_gpmc: change nandecc commandAndreas Bießmann2013-04-081-26/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
OpenPOWER on IntegriCloud