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* nand: Add torture featureBenoît Thébaudeau2012-11-261-0/+122
| | | | | | | | | | | | | This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: Fix nand_erase_opts() offset checkBenoît Thébaudeau2012-11-261-2/+2
| | | | | | | NAND Flash is erased by blocks, not by pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com>
* nand: Clean up nand_utilBenoît Thébaudeau2012-11-261-32/+32
| | | | | | | | | | | This patch cleans up nand_util.c: - Fix tabs. - Fix typos. - Remove space character before opening parenthesis in function calls. - Fix comments. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com>
* nand: Move the sub-page read support enable to a flagJoe Hershberger2012-11-261-2/+7
| | | | | | | | | Use a flag instead of a hard-coded macro so that sub-page reads can be enabled in other cases (such as on-die ecc). This is the same as a5ff4f102937a3492bca4a9ff0c341d78813414c in Linux Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* driver/mtd:IFC NAND:Initialise internal SRAM before any writePrabhakar Kushwaha2012-11-261-1/+61
| | | | | | | | | | | | | | | | IFC-1.1.0 uses 28nm techenology for SRAM. This tech has known limitaion for SRAM i.e. "byte select" is not supported. Hence Read Modify Write is implemented in IFC for any "system side write" into sram buffer. Reading an uninitialized memory results in ECC Error from sram wrapper. Hence we must initialize/prefill SRAM buffer by any data before writing anything in SRAM from system side. To initialize SRAM user can use "READID" NAND command with read bytes equal to SRAM size. It will be a one time activity post boot Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [scottwood@freescale.com: fix fsl_ifc_sram_init prototype] Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand/fsl: add NAND_NO_SUBPAGE_WRITE to eLBC and IFC driversScott Wood2012-11-262-2/+2
| | | | | | These controllers can only do hardware ECC on full page transfers. Signed-off-by: Scott Wood <scottwood@freescale.com>
* spl/nand: config symbol documentationScott Wood2012-11-262-0/+172
| | | | | | | | | | | | Document parameters used for specifying the NAND image to be loaded. Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only nand_spl_simple.c, not the entire nand directory. The word "simple" is there for a reason. :-) Signed-off-by: Scott Wood <scottwood@freescale.com> --- v2: updated for makefile changes earlier in patchset
* spl/nand: introduce CONFIG_SPL_NAND_DRIVERS, _BASE, and _ECC.Scott Wood2012-11-261-8/+22
| | | | | | | | | | | | | | Some small SPLs do not use nand_base.c, and a subset of those also require a special driver. Some SPLs need software ECC but others can't fit it. All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these symbols added to preserve existing behavior. Signed-off-by: Scott Wood <scottwood@freescale.com> -- v2: use positive logic for including bits of NAND, rather than a MINIMAL symbol that excludes things.
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-051-0/+36
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| * tegra: nand: make ONFI detection workLucas Stach2012-10-291-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | Add the missing bits to the Tegra NAND driver to make ONFI detection work properly. Also add it to the Tegra default config, as it seems to be a reasonable thing to have it available on all boards that use any kind of NAND. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | drivers/mtd/nand: sparse fixesKim Phillips2012-11-042-6/+8
|/ | | | | | | | | | nand_ecc.c:82:5: warning: symbol 'nand_calculate_ecc' was not declared. Should it be static? nand_ecc.c:155:5: warning: symbol 'nand_correct_data' was not declared. Should it be static? nand_base.c:2854:1: error: directive in argument list nand_base.c:2856:1: error: directive in argument list Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com>
* tegra: nand: add board pinmuxLucas Stach2012-10-151-1/+0
| | | | | | | | Boards may require a different pinmux setup for NAND than the default one. Add a way to call into board specific code to set this up. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren2012-10-151-3/+2
| | | | | | | | | | | The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
* MPC85xx: remove support for TQM85xx boardsWolfgang Denk2012-10-051-5/+5
| | | | | | | | | | | | Due to grown code sizes the TQM85xx boards don't build any more with some older tool chains (like ELDK 4.2). As these boards have long reached EOL it seems a waste of effort trying to fix them. The vendor has agreed to drop support for them, too. So let's get rid of them. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> cc: Kim Phillips <kim.phillips@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
* Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2012-09-303-264/+109
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| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-215-2/+1287
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| * | mxc nand: Fix warning on !MXC_NFC_V2_1Tom Rini2012-09-181-0/+2
| | | | | | | | | | | | | | | | | | | | | In board_nand_init() we only need the 'tmp' variable if MXC_NFC_V2_1 is defined. Signed-off-by: Tom Rini <trini@ti.com>
| * | mxc nand: Homogenize IP revisions with LinuxBenoît Thébaudeau2012-09-171-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the same IP revisions as in Linux in order to make the comparison more clear. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd mxc nand: Merge init functionsBenoît Thébaudeau2012-09-171-30/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge mxc_setup_config1() into board_nand_init() in order to ease the addition of i.MX5 support in the following patches. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd mxc nand: Fix ECC state after read_page_raw_syndrome()Benoît Thébaudeau2012-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mxc_nand_read_page_raw_syndrome() should reenable ECC upon exit. This fixes ECC errors left uncorrected after a call to this function. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd mxc nand: Use _mxc_nand_enable_hwecc()Benoît Thébaudeau2012-09-171-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use _mxc_nand_enable_hwecc() instead of duplicating its code. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mxc nand: Access all ecc_status_result fieldsBenoît Thébaudeau2012-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the NFC IP 1.1, the 32-bit ecc_status_result value comes from 2 consecutive 16-bit registers. This patch reads all the fields of this value, which makes a difference for 4-kiB NF pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mxc nand: cosmectic: Light cleanupBenoît Thébaudeau2012-09-171-6/+3
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mxc nand: Merge mtd and spl register definitionsBenoît Thébaudeau2012-09-171-196/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patches fixes the TODO to use same register definitions in mtd mxc_nand and nand_spl fsl nfc drivers. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driverMarek Vasut2012-09-171-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on Linux kernel -next: commit 14f44abf1dafc20ba42ce8616a8fc8fbd1b3712b Author: Brian Norris <computersforpeace@gmail.com> Date: Fri Jul 13 09:28:24 2012 -0700 mtd: nand: allow NAND_NO_SUBPAGE_WRITE to be set from driver The NAND_CHIPOPTIONS_MSK has limited utility and is causing real bugs. It silently masks off at least one flag that might be set by the driver (NAND_NO_SUBPAGE_WRITE). This breaks the GPMI NAND driver and possibly others. Really, as long as driver writers exercise a small amount of care with NAND_* options, this mask is not necessary at all; it was only here to prevent certain options from accidentally being set by the driver. But the original thought turns out to be a bad idea occasionally. Thus, kill it. Note, this patch fixes some major gpmi-nand breakage. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: Make NAND lock status compatible with MicronJoe Hershberger2012-09-171-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Micron NAND flash (e.g. MT29F4G08ABADAH4) BLOCK LOCK READ STATUS is not the same as others. Instead of bit 1 being lock, it is #lock_tight. To make the driver support either format, ignore bit 1 and use only bit 0 and bit 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: consolidate duplicated constantsJoe Hershberger2012-09-171-6/+0
| | | | | | | | | | | | | | | | | | | | | NAND_CMD_ constants for lock/unlock should be in the header Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: Change ulong to loff_t and size_tJoe Hershberger2012-09-171-2/+3
| | | | | | | | | | | | | | | | | | | | | Missed in previous cleanup. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | nand: Add support for unlock.invertJoe Hershberger2012-09-171-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd: support ONFI multi lun NANDMatthieu CASTET2012-09-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. This is commit 637957551c0ac80de8dfc7650d320c5a98c2c0c0 from Linux Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> [scottwood@freescale.com: picked from Linux into U-Boot] Reported-by: Rafael Beims <rafael.beims@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | | Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-09-291-2/+3
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| * | atmel_nand: fix the U-Boot output information about nand flash with PMECC ↵Wu, Josh2012-09-131-2/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable. Before the patch, it looks like: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:11:06) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: Initialize PMECC params, cap: 2, sector: 512 > |256 MiB |MMC: mci: 0 |In: serial |Out: serial |Err: serial |Net: macb0 |Hit any key to stop autoboot: 0 After the patch: |U-Boot 2012.07-00441-gd578d6f-dirty (Sep 10 2012 - 16:18:11) | |CPU: AT91SAM9G35 |Crystal frequency: 12 MHz |CPU clock : 400 MHz |Master clock : 133.333 MHz |DRAM: 128 MiB |WARNING: Caches not enabled > |NAND: 256 MiB | ... ... |Hit any key to stop autoboot: 0 Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | NAND: MXS: include common.h first so cache.h is included in correct orderTom Warren2012-09-101-1/+1
| | | | | | | | | | | | | | | | | | | | With Simon Glass's include/nand.h alignment changes, some mxs builds were generating errors. Fix is to ensure asm/cache.h is included before linux/mtd/nand.h. Moving common.h to top of include list does that. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* | tegra: nand: Add Tegra NAND driverJim Lin2012-09-073-0/+1284
| | | | | | | | | | | | | | | | | | | | | | | | A device tree is used to configure the NAND, including memory timings and block/pages sizes. If this node is not present or is disabled, then NAND will not be initialized. Signed-off-by: Jim Lin <jilin@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | nand: Try to align the default buffersSimon Glass2012-09-071-1/+2
|/ | | | | | | | | | The NAND layer needs to use cache-aligned buffers by default. Towards this goal. align the default buffers and their members according to the minimum DMA alignment defined for the architecture. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Scott Wood <scottwood@freescale.com>
* at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh2012-09-012-1/+792
| | | | | | | | | | | | | | | | | | The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: atmel_nand: remove unused variables.Wu, Josh2012-09-011-2/+1
| | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: atmel_nand: extract HWECC initialization code into one function: ↵Wu, Josh2012-09-011-58/+86
| | | | | | | | | | | | atmel_hw_nand_init_param(). This patch 1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support. 2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix empty newline at EOF error and move return value check into ifdef] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mxs: Convert sys_proto.h prefixes to 'mxs'Otavio Salvador2012-09-011-3/+3
| | | | | | | The sys_proto.h functions (except the boot modes) are compatible with i.MX233 and i.MX28 so we use 'mxs' prefix for its methods. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* arm: omap: Fix switching back to nandecc sw.Jeroen Hofstee2012-09-011-0/+1
| | | | | | | | | | | | | | | | | | | | | | Orjan Friberg wrote at [1]: "For the beagleboard, ecc.size is not explicitly set when doing 'nandecc sw'. If it's not set for the NAND_ECC_SOFT case in nand_scan_tail, it's set to 256 bytes. When doing 'nandecc hw', ecc.size is set to 512 bytes. Hence, when changing back to 'nandecc sw' ecc.size remains at 512 bytes and suddenly the format has changed." No patch has been submitted and the issue was still present. This patch adds the mentioned solution. Tested on a tam3517 board. [1] http://lists.denx.de/pipermail/u-boot/2012-February/119002.html cc: Orjan Friberg <of@flatfrog.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-011-6/+6
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mtd/NAND: Remove obsolete SPEAr specific NAND driversVipin KUMAR2012-07-071-124/+0
| | | | | | | | | | | Since, SPEAr platform uses generic FSMC driver now, so spear specific files drivers/mtd/nand/spr_nand.c, arch/arm/include/asm/arch-spear/spr_nand.h are removed Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* mtd/NAND: Add FSMC driver supportVipin KUMAR2012-07-072-0/+487
| | | | | | | | | | | | | | Flexible static memory controller is a peripheral provided by ST, which controls the access to NAND chips along with many other memory device chips eg NOR, SRAM. This patch adds the driver support for FSMC controller interfacing with NAND memory. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk2012-05-204-14/+28
|\ | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nand-flash: NAND: Remove ONFI detection message to from bootup log driver/mtd:IFC: Fix possible memory leak driver/mtd: IFC NAND: Add support of ONFI NAND flash mtd, nand: move some printfs to debug output. nand_util: correct YAFFS image write function powerpc/85xx: fix NAND boot linker scripts for -fpic nand: extend .raw accesses to work on multiple pages
| * NAND: Remove ONFI detection message to from bootup logStefan Roese2012-05-181-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch, boot shows this messages upon NAND detection: NAND: ONFI flash detected ONFI param page 0 valid ONFI flash detected ONFI param page 0 valid 128 MiB With this patch, its back to the U-Boot "standard": NAND: 128 MiB Tested on x600 (SPEAr600). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Amit Virdi <amit.virdi@st.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Scott Wood <scott@tyr.buserror.net>
| * driver/mtd:IFC: Fix possible memory leakPrabhakar Kushwaha2012-05-181-0/+1
| | | | | | | | | | | | | | if priv->bank >= MAX_BANK, priv should be freed before returning ENODEV. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scott@tyr.buserror.net>
| * driver/mtd: IFC NAND: Add support of ONFI NAND flashPrabhakar Kushwaha2012-05-181-5/+16
| | | | | | | | | | | | | | | | | | - Fix NAND_CMD_READID command for ONFI detect. - Add NAND_CMD_PARAM command to read the ONFI parameter page. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scott@tyr.buserror.net>
| * mtd, nand: move some printfs to debug output.Heiko Schocher2012-05-181-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | current U-Boot shows on startup (for example on the enbw_cmc board) the following printfs from the nand subsystem: Flash: 2 MiB NAND: Bad block table found at page 65472, version 0x01 Bad block table found at page 65408, version 0x01 nand_read_bbt: Bad block at 0x000002980000 nand_read_bbt: Bad block at 0x000003240000 128 MiB MMC: davinci: 0 remove them to debug output, so it shows with this patch: Flash: 2 MiB NAND: 128 MiB MMC: davinci: 0 Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scott@tyr.buserror.net>
| * nand_util: correct YAFFS image write functionLiu, Wentao2012-05-181-1/+1
| | | | | | | | | | | | | | | | | | | | In function nand_write_skip_bad(),for YAFFS filesystem part, write_oob() will return 0 when success, so when rval equals 0, it should continue to write the next page, and no break. Signed-off-by: Wentao, Liu <wentao.liu@intel.com> Acked-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Scott Wood <scott@tyr.buserror.net>
* | imx: nand: Support flash based BBTTimo Ketola2012-05-151-0/+33
|/ | | | | Signed-off-by: Timo Ketola <timo@exertus.fi> Acked-by: Scott Wood <scottwood@freescale.com>
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