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* Revert "mtd: cfi_flash: Fix CFI flash driver for 8-bit bus support"Stefan Roese2013-04-121-55/+23
| | | | | | This reverts commit 239cb9d904cfa8ab50d840a47b3306189d695c75. Signed-off-by: Stefan Roese <sr@denx.de>
* Revert "cfi_flash: Use uintptr_t for casts from u32 to void *"Stefan Roese2013-04-121-1/+1
| | | | | | This reverts commit 81a4f7098ba137ea1961cb997ca16d57de2b3483. Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Use uintptr_t for casts from u32 to void *Stefan Roese2013-04-041-1/+1
| | | | | | | | | | | | | This fixes this build warning: Configuring for qemu_mips64 - Board: qemu-mips64, Options: SYS_BIG_ENDIAN text data bss dec hex filename 215344 13082 218720 447146 6d2aa qemu_mips64/u-boot cfi_flash.c: In function 'flash_map': cfi_flash.c:217:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com>
* mtd: cfi_flash: Write buffer size adjustment for M29EW Numonyx devicesJagannadha Sutradharudu Teki2013-04-021-0/+23
| | | | | | | | | | | | | | This patch addjusted the write buffer size for M29EW devices those are operated in 8-bit mode. The M29EW devices seem to report the CFI information wrong when it's in 8 bit mode. There's an app note from Numonyx on this issue and there's a patch in the open source as well for Linux, but it doesn't seem to be in mainline. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* mtd: cfi_flash: Fix CFI flash driver for 8-bit bus supportaaron.williams@caviumnetworks.com2013-04-021-23/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is based on that patch from aaron.williams@caviumnetworks.com with same commit title. pulled the same code changes into current u-boot tree. http://patchwork.ozlabs.org/patch/140863/ http://lists.denx.de/pipermail/u-boot/2011-April/089606.html This patch corrects the addresses used when working with Spansion/AMD FLASH chips. Addressing for 8 and 16 bits is almost identical except in the 16-bit case the LSB of the address is always 0. The confusion arose because the addresses in the datasheet for 16-bit mode are word addresses but this code assumed it was byte addresses. I have only been able to test this on our Octeon boards which use either an 8-bit or 16-bit bus. I have not tested the case where there's an 8-bit part on a 16-bit bus. This patch also adds some delays as suggested by Spansion. If a part can be both 8 and 16-bits, it forces it to work in 8-bit mode if an 8-bit bus is detected. Apart from the pulled changes, fixed few minor code cleanups and tested on 256M29EW, 512M29EW flashes. Before this fix: --------------- Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0xFF, Device ID: 0xFF Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes After this fix: -------------- Bank # 1: CFI conformant flash (8 x 8) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x7E2301 Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* cfi_flash: Report Advanced Sector Protection (PPB) with flinfo cmdStefan Roese2013-01-101-0/+2
| | | | | | | | | | | | | | | | | | | | Report the usage of the Advanced Sector Protection (PPB) to the user upon 'flinfo' command. E.g: Bank # 1: CFI conformant flash (16 x 16) Size: 64 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301 Advanced Sector Protection (PPB) enabled Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes Sector Start Addresses: FC000000 E FC020000 E RO FC040000 E FC060000 E FC080000 E ... Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Holger Brunck <holger.brunck@keymile.com> Tested-by: Holger Brunck <holger.brunck@keymile.com>
* cfi_flash: Enable PPB protection for all AMD cmdset flash chipsStefan Roese2013-01-101-8/+5
| | | | | | | | | | | | | | | Not only Spansion supports the Persistent Protection Bits (PPB) locking. Other devices like the Micron JS28F512M29EWx also support this type of locking/unlocking. Detection of support is done in the same way as done for the Spansion chips - via the 0x49 CFI word. This patch enables this PPB protection mechanism for all AMD type (AMD commandset) chips. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Holger Brunck <holger.brunck@keymile.com> Tested-by: Holger Brunck <holger.brunck@keymile.com>
* cfi_flash: Read PPB sector protection from device for AMD/Spansion chipsStefan Roese2013-01-101-0/+21
| | | | | | | | | | | | | | | | Patch 66863b05 [cfi_flash: add support for Spansion flash PPB sector protection] introduced the PPB (Persistent Protection Bit) locking for Spansion chips. But right now the sector protection status (locked vs unlocked) is set to unlocked for all sectors upon bootup. The real sector protection status is ignored. This patch now reads the current sector protection status and uses it for these AMD/Spansion flash chips. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Holger Brunck <holger.brunck@keymile.com> Tested-by: Holger Brunck <holger.brunck@keymile.com>
* cfi_flash: Add manufact_match helper functionStefan Roese2013-01-101-7/+9
| | | | | | | | Consolidate manufacturer matching into the function manufact_match() and use it. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Holger Brunck <holger.brunck@keymile.com>
* mtd/cfi: add support for SST 4KB sector granularityAngelo Dureghello2013-01-101-1/+24
| | | | | | | | | | | | | | | | | | | Add support for SST 4KB sector granularity. Many recent SST flashes, i.e. SST39VF3201B and similar of this family are declared CFI-conformant from SST. They support CFI query, but implement 2 different sector sizes in the same memory: a 64KB sector (they call it "block", std AMD erase cmd=0x30), and a 4KB sector (they call it "sector", erase cmd=0x50). Also, CFI query on these chips, reading from address 0x2dh of cfi query struct, detects a number of secotrs for the 4KB granularity (flinfo shows it). For all other aspects, they are CFI compliant, so, as Linux do, i think it's a good idea to handle these chips in the CFI driver, with a fixup to allow 4KB granularity, as should be expected, instead of 64KB. Signed-off-by: Angelo Dureghello <sysamfw@gmail.com> Signed-off-by: Stefan Rose <sr@denx.de>
* drivers/mtd/cfi_flash.c: sparse fixesKim Phillips2012-11-041-9/+13
| | | | | | | | | | | | cfi_flash.c:756:43: warning: Using plain integer as NULL pointer cfi_flash.c:1150:52: warning: cast to non-scalar cfi_flash.c:1433:46: warning: cast truncates bits from constant value (890089 becomes 89) cfi_flash.c:1490:61: warning: cast truncates bits from constant value (1f001f becomes 1f) cfi_flash.c:1508:61: warning: cast truncates bits from constant value (10001 becomes 1) cfi_flash.c:1738:63: warning: cast truncates bits from constant value (10001 becomes 1) cfi_flash.c:1857:6: warning: symbol '__flash_cmd_reset' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* cfi: Make the flash erase and write operations abortableJoe Hershberger2012-09-031-0/+11
| | | | | | | | | | | Check for ctrlc() in operations that take time and loop over the flash addresses. In netconsole, tstc() is expensive. Only check once in a while to not slow down the operation significantly. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi: Check for blank before eraseJoe Hershberger2012-09-031-0/+26
| | | | | | | | | Added an optional check in the CFI driver to evaluate if the sector is already blank before issuing an erase command. Improves erase time by over a factor of 10 if already blank. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd/cfi_flash: fix write problems for Numonyx P33/30 32 MBit flashsHolger Brunck2012-08-131-22/+43
| | | | | | | | | | | | | | | | | | commit 54652991 Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips fixes a problem for Numonyx P33/P30 flashes for 256-Mbit, but this leads to problems for smaller versions of this chip e.g. the 32Mbit version with deviceid 0x16 on mgcoge. So move the code for this work around to an own function and check previously manufacturer id and device id to not break other flashes which don't need this work around. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Heiko Schocher <hs@denx.de> cc: Stefan Roese <sr@denx.de> cc: Philippe De Muyter <phdm@macqel.be> cc: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: add support for Spansion flash PPB sector protectionAnatolij Gustschin2012-08-131-0/+52
| | | | | | | | | | Erasing flash sectors protected with persistent protection bit (PPB) mechanism on Spansion flash chips doesn't work. Add sector protection status checking and sector lock and unlock commands to fix this. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi: fix the incomplete erased status check in buffer writeTao Hou2012-03-211-2/+2
| | | | | | | | | | Without the fix, flash_write_cfibuffer will terminate the erased status check once an all-0xFF word has been found instead of continuing the erased status check utill the first non-0xFF word. Signed-off-by: Tao Hou <hotforest@gmail.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* * Fix: watchdog timed out, if flash blank (0xFF) blocksJens Scharsig (BuS Elektronik)2012-02-091-0/+3
| | | | | | | | | | | | | | | | | | | | The current implementation of cfi_flash uses udelay to reset watchdog. If several blocks are blank (0xff filled) the watchdog timed out. The reason is, udelay is never called, if flash device is ready to fast. e.g. mw.w $(copy_addr) FFFF 10000;cp.b $(copy_addr) 10880000 20000 -> watchdog timed out mw.w $(copy_addr) 0000 10000;cp.b $(copy_addr) 10880000 20000 -> watchdog not timed out This patch adds an extra watchdog reset in front of flash ready check. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Stefan Roese <sr@denx.de>
* GCC4.6: Squash warning in cfi_flash.cMarek Vasut2011-10-271-1/+1
| | | | | | | | | | | | | | cfi_flash.c: In function 'flash_protect_default': cfi_flash.c:2152: warning: format '%08x' expects type 'unsigned int', but argument 2 has type 'ulong' cfi_flash.c:2152: warning: format '%08x' expects type 'unsigned int', but argument 3 has type 'long unsigned int' Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Scott Wood <scottwood@freescale.com>
* Timer: Allow reset_timer() only for systems with low resolution timersGraeme Russ2011-07-261-0/+4
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* cfi_flash: reverse geometry for newer STM partsMike Frysinger2011-06-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | For newer STM parts where CFI >= 1.1, there is a byte in the extended structure that declares the flash layout type (just like the AMD parts), so key off of that to find out when we need to reverse the geometry. This can be seen with M29W640 parts where U-Boot does: Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED Erase timeout: 8192 ms, write timeout: 1 ms Buffer write timeout: 1 ms, buffer size: 16 bytes Sector Start Addresses: 20000000 RO 20002000 RO 20004000 RO 20006000 RO 20008000 RO 2000A000 RO 2000C000 RO 2000E000 RO 20010000 RO 20020000 RO ... But Linux does: physmap platform flash device: 00800000 at 20000000 physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x000020 Chip ID 0x0022ed physmap-flash.0: Swapping erase regions for top-boot CFI table. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash driver - Add delay after reset commandAaron Williams2011-04-211-0/+7
| | | | | | | | | | | | | I ran into a problem where the reset was failing except when I enabled debugging support. After talking with Garret Swalling at Spansion I was told that the GL-N series of devices require a 500ns wait for the reset to complete. The below patch adds a 1us delay after all reset commands. -Aaron Williams Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd, cfi: read AMD 3-byte (expanded) device ids on 16bit devicesHeiko Schocher2011-04-211-2/+11
| | | | | | | | | | | | | | | | | | | | | tested on the a4m072 board with a S29GL512P flash. flinfo without this patch Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes [...] flinfo with this patch Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301 Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes [...] Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: reverse geometry for M29W800DT partsMike Frysinger2011-04-211-3/+4
| | | | | | | | | | | | | | | | | | | | | | The M29W800DT parts also report their geometry with the sector layout reversed. So add that ID to the flash_fixup_stm function. Otherwise, we get: bfin> flinfo Bank # 1: CFI conformant FLASH (16 x 16) Size: 1 MB in 19 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7 Erase timeout: 8192 ms, write timeout: 1 ms Sector Start Addresses: 20000000 20004000 20006000 20008000 20010000 20020000 20030000 20040000 20050000 20060000 20070000 20080000 20090000 200A0000 200B0000 200C0000 200D0000 200E0000 200F0000 Reported-by: Jianxi Fu <fujianxi@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Fix CONFIG_SYS_FLASH_AUTOPROTECT_LIST usagePeter Tyser2011-04-131-6/+8
| | | | | | | | | | | | | | | | | | | | | Commit 6ee1416e8184b4d9ebe6087d396a60bcecf3551c (mtd, cfi: introduce void flash_protect_default(void)) introduced a bug which resulted in boards that define CONFIG_SYS_FLASH_AUTOPROTECT_LIST not compiling with the the following errors and warning: ptyser@petert u-boot $ make -s xpedite520x Configuring for xpedite520x board... cfi_flash.c: In function 'flash_protect_default': cfi_flash.c:2118: error: 'i' undeclared (first use in this function) cfi_flash.c:2118: error: (Each undeclared identifier is reported only once cfi_flash.c:2118: error: for each function it appears in.) cfi_flash.c:2118: error: 'apl' undeclared (first use in this function) cfi_flash.c:2118: error: invalid application of 'sizeof' to incomplete type 'struct apl_s' cfi_flash.c: In function 'flash_init': cfi_flash.c:2137: warning: unused variable 'apl' Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reported-by: Kumar Gala <galak@kernel.crashing.org> Cc: Heiko Schocher <hs@denx.de>
* mtd, cfi: introduce void flash_protect_default(void)Heiko Schocher2011-04-071-36/+41
| | | | | | | | collect code which protects default sectors in a function, called flash_protect_default. So boardspecific code can call it too. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) tooMario Schuknecht2011-04-071-1/+2
| | | | | | Signed-off-by: Mario Schuknecht <m.schuknecht@dresearch.de> Signed-off-by: Steffen Sledz <sledz@dresearch.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: fix bug with flash banks with different sector numbersMartin Krause2011-03-281-0/+5
| | | | | | | | | | | | | | | The function find_sector() does not take into account if the flash bank has changed since the last call. This could lead to illegal accesses inside and beyond the flash_info_t info strcture. For example if the current flash bank has less sectors than the last used flash bank. This patch adds two cheks. One that insures, that the current sector does not exceed the allowed maximum (which is always a good idea). And one that checks if the current access is to the same flash bank as the last access. If not, the search loop will start with sector 0. Signed-off-by: Martin Krause <martin.krause@tqs.de> Signed-off-by: Stefan Roese <sr@denx.de>
* Replace "FLASH" strings with "Flash" or "flash"Peter Tyser2011-01-191-2/+2
| | | | | | | | There's no compelling reason to have the output on bootup or the "flinfo" command print "flash" in uppercase, so use the proper case where appropriate. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* cfi_flash: avoid flash_verbose when possibleMike Frysinger2011-01-091-0/+6
| | | | | | | The flash_verbose logic is only used by the CFI MTD layer, so if we aren't using that, disable the logic completely. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* cfi_flash: Add optional config register write to cfi-detectionStefan Roese2010-12-171-0/+43
| | | | | | | | | | | | This patch adds the possibility to (optinally) write to the flash configuration register. The Intel style CFI chips support such a register that can be used to configure the operation mode to a non-default value. This method will be used by the t3corp board, which needs to configure the DS617 Xilinx flash for async read mode. Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Use flash_read32() in sector_erased()Stefan Roese2010-12-171-3/+3
| | | | | | | | | | The function sector_erased() is modified to not use pointer access, but to use the correct accessor functions. This fixes a problem on the t3corp board with the Xilinx DS617 flash chips. Here a board specific accessor function is needed to read from flash in 32bit mode. This patch enables such an operation mode. Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Fix problems with status/id read modeStefan Roese2010-12-171-0/+12
| | | | | | | | | This patch adds some calls to set the flash chip in the read-status- register- or read-id-mode before the corresponding register is read back. This problem was detected while porting the common CFI driver to support the Xilinx DS617 flash chips. Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: fix bug introduced while recent change to flash_get_size()Anatolij Gustschin2010-11-281-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit ec50a8e389863ac35bfd9d9a2e8b30187318e59e "cfi_flash: handle 'chip size exceeds address window' situation" added 3rd argument to flash_get_size() but didn't fix all the function calls from the board specific code. Many boards have their own flash_get_size() definitions in the board code and use them there, but some boards (e.g. tqm834x, tqm85xx, pdm360ng) use flash_get_size() from the cfi_flash.c driver. The bug shows up if the value of the "max_size" argument (which is not defined when calling the function with two arguments) happens to be less than "info->size". In this case on the affected boards we end up with a bank of reduced size and in the worst case might even be not able to update U-Boot or to boot the kernel from flash: => fli Bank # 1: CFI conformant FLASH (32 x 16) Size: 0 kB in 1 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 3 ms, buffer size: 64 bytes Sector Start Addresses: F0000000 RO Bank # 2: CFI conformant FLASH (32 x 16) Size: 128 MB in 512 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 3 ms, buffer size: 64 bytes Sector Start Addresses: F8000000 F8040000 F8080000 F80C0000 F8100000 F8140000 F8180000 F81C0000 F8200000 F8240000 ... E.g., updating U-Boot is not possible now: => protect off ${u-boot_addr} +${u-boot_size} Error: end address (0xf007ffff) not in flash! Bad address format => era ${u-boot_addr} +${u-boot_size} Error: end address (0xf007ffff) not in flash! Bad address format This patch removes the 3rd argument of flash_get_size() again and sets "max_size" in the function itself instead of passing it as a function argument. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* cfi_flash: handle 'chip size exceeds address window' situationIlya Yanok2010-10-231-5/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | On some boards we have flash mapped high in the address space with considerably small window (say 0xFE000000 and 32MB). When we install bigger chip (say 64MB) on such a board strange things happen (flash_write() doesn't work at all, for ex). That's because cfi_flash driver doesn't care about window size at all. Of course, cleanest solution would probably be to just extend address window to be able to map the whole flash but for legacy/compatibility reasons some people prefer just truncate the flash size and never use the upper part. This patch adds an option for cfi_flash driver to handle this situation properly. To achieve this we add the new function cfi_flash_bank_size() which can be provided by the board code and weak-aliased to default implementation that returns value from the CONFIG_SYS_FLASH_BANKS_SIZES array if it's defined or 0 otherwise (the last case is added for compatibility). If non-zero flash bank size is provided and detected chip size is bigger than provided address window size the warning will be displayed and flash chip will be truncated. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Changed cfi_flash_bank_size() return type to unsigned long to match caller function. Signed-off-by: Wolfgang Denk <wd@denx.de>
* cfi_flash: Fix "Unknown FLASH" error messageJohn Schmoller2010-10-121-1/+1
| | | | | | | | | | | | | | | | When a CFI flash chip could not be detected an error message similar to the following would be printed on bootup: FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 0 MB The printf incorrectly converted the flash size into megabytes. This patch fixes the printing of the flash size in megabytes: FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 16 MB Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Simplify dynamic flash bank number detectionStefan Roese2010-09-201-11/+4
| | | | | | | | | | | | | | | | | | | This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By moving these optional variables and defines into the common code, board specific code is minimized. Currently only the following board use this feature: APC405, IDS8247, TQM834x And IDS8247 doesn't seem to really need this feature, since its not updating the bank number variable at all. So this patch removes the definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port. This new framework will be used by the upcoming lwmon5 update as well. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
* cfi_flash: Add weak default for cfi_flash_bank_addr()Stefan Roese2010-09-201-4/+9
| | | | | | | | | | | cfi_flash_bank_addr(int bank_nr) returns the base addresses of the requested bank. Introducing this weak default enables boards to override this functions with a board specific version when required. This feature will be used in the lwmon5 board update, supporting runtime detection of 2 board revisions with different flash layouts. Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Simplify flash_get_info()Stefan Roese2010-09-201-2/+2
| | | | | | | | | | This patch removes an unecessary check in the return statement. This is not needed, since "info" is initializes to NULL. And "info" will not be written to again, if the flash address is not found. Additionally "info" is not initialized to "0" but to "NULL". Signed-off-by: Stefan Roese <sr@denx.de>
* Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips.Philippe De Muyter2010-08-181-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30 256-Mbit 65nm flash chips. After some time :( searching for bugs in our board or soft, we have discovered that those chips have a small but annoying bug, documented in "Numonyx Axcell P33/P30 256-Mbit Specification Update" It states : When customer uses [...] block unlock, the block lock status might be altered inadvertently. Lock status might be set to either 01h or 03h unexpectedly (00h as expected data), which leads to program/erase failure on certain blocks. A working workaround is given, which I have applied and tested with success : Workaround: If the interval between 60h and its subsequent command can be guaranteed within 20us, Option I is recommended, otherwise Option II (involves hardware) should be selected. Option I: The table below lists the detail command sequences: Command Data bus Address bus Remarks Sequence 1 90h Block Address Read Lock Status 2 Read Block Address + 02h (2)(3) (1) 3 60h Block Address (2)(3) (1) Lock/Unlock/RCR Configuration 4 D0h/01h/03h Block Address Notes: (1) Block Address refers to RCR configuration data only when the 60h command sequence is used to set RCR register combined with 03h subsequent command. (2) For the third and fourth command sequences, the Block Address must be the same. (3) The interval between 60h command and its subsequent D0h/01h/2Fh/03h commands should be less than 20us. And here is a log comparison of a simple (destructive) flash test without and with the workaround. diff without-numonyx-workaround.log with-numonyx-workaround.log -U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:07:47) +U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:25:19) CPU: Freescale MCF5484 CPU CLK 200 MHz BUS CLK 100 MHz Board: Macq Electronique ME2060 I2C: ready DRAM: 64 MiB FLASH: 32 MiB In: serial Out: serial Err: serial Net: FEC0, FEC1 -> flinfo Bank # 1: CFI conformant FLASH (16 x 16) Size: 32 MB in 259 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8922 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Sector Start Addresses: FE000000 RO FE008000 RO FE010000 RO FE018000 RO FE020000 RO FE040000 RO FE060000 RO FE080000 RO FE0A0000 RO FE0C0000 RO ... FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 RO -> protect off all Un-Protect Flash Bank # 1 ................... done -> erase all Erase Flash Bank # 1 ................... done -> cp.b 1000000 fe000000 2000000 -Copy to Flash... Flash not Erased +Copy to Flash... done -> Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: Cleanup flash_print_info()Stefan Roese2010-08-181-24/+27
| | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following: - Extract code to detect if sector is erased into function sector_erased(). - Because of this, we don't have variable declarations inside the sector loop in flash_print_info() - Change "return" to "break" in the "if (ctrlc()) statement: This fixes a problem with the resulting output. Before this patch the output was: Sector Start Addresses: FC000000 FC020000 FC040000 => With this patch it is now: Sector Start Addresses: FC000000 FC020000 FC040000 => Signed-off-by: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
* Fix printing & reading of 16-bit CFI device identifiersPhilippe De Muyter2010-08-181-4/+7
| | | | | | | | | | | | | | Fix reading and printing of CFI flashes 16-bit devices identifiers Nowadays CFI flashes have a 16-bit device identifier. U-boot still print them and read them as if they were only 8-bit wide. Fix that. Before: Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B After: Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x881B Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: flinfo: allow user interrupt in flash print info fnKim Phillips2010-08-181-0/+2
| | | | | | | flashes getting larger, users more impatient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Stefan Roese <sr@denx.de>
* Rename getenv_r() into getenv_f()Wolfgang Denk2010-08-041-1/+1
| | | | | | | | | | | | | | | | | | | While running from flash, i. e. before relocation, we have only a limited C runtime environment without writable data segment. In this phase, some configurations (for example with environment in EEPROM) must not use the normal getenv(), but a special function. This function had been called getenv_r(), with the idea that the "_r" suffix would mean the same as in the _r_eentrant versions of some of the C library functions (for example getdate vs. getdate_r, getgrent vs. getgrent_r, etc.). Unfortunately this was a misleading name, as in U-Boot the "_r" generally means "running from RAM", i. e. _after_ relocation. To avoid confusion, rename into getenv_f() [as "running from flash"] Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* cfi_flash: reset timer in flash status checkThomas Chou2010-04-071-0/+2
| | | | | | | | | | | | | | | | | This patch adds reset_timer() before the flash status check waiting loop. Since the timer is basically running asynchronous to the cfi code, it is possible to call get_timer(0), then only a few _SYSCLK_ cycles later an interrupt is generated. This causes timeout even though much less time has elapsed. So the timer period registers should be reset before get_timer(0) is called. There is similar usage in nand_base.c. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge remote branch 'origin/master' into nextWolfgang Denk2010-03-291-1/+4
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| * cfi_flash: precision and underflow problem in tout calculationRenato Andreola2010-03-251-1/+4
| | | | | | | | | | | | | | | | | | With old configuration it could happen tout=0 if CONFIG_SYS_HZ<1000. Signed-off-by: Renato Andreola <renato.andreola@imagos.it> Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Stefan Roese <sr@denx.de>
* | cfi flash: add status polling method for amd flashThomas Chou2010-03-261-7/+86
|/ | | | | | | | | | | | | | | | | This patch adds status polling method to offer an alternative to data toggle method for amd flash chips. This patch is needed for nios2 cfi flash interface, where the bus controller performs 4 bytes read cycles for a single byte read instruction. The data toggle method can not detect chip busy status correctly. So we have to poll DQ7, which will be inverted when the chip is busy. This feature is enabled with the config def, CONFIG_SYS_CFI_FLASH_STATUS_POLL Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Stefan Roese <sr@denx.de>
* ] fix monitor protection for CONFIG_MONITOR_IS_IN_RAMWolfgang Wegner2010-03-041-1/+2
| | | | | | | | | | For platforms with flash below ram addresses, the current check to activate monitor protection is wrong/insufficient. This patch fixes CONFIG_MONITOR_IS_IN_RAM for these systems by adding a check for this configuration. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi: Add weak default function for flash_cmd_reset()Stefan Roese2009-10-281-133/+18
| | | | | | | | | | | | Currently the CFI driver issues both AMD and Intel reset commands. This is because the driver doesn't know yet which chips are connected. This dual reset seems to cause problems with the M29W128G chips as reported by Richard Retanubun. This patch now introduces a weak default function for the CFI reset command, still with both resets. This can be overridden by a board specific version if necessary. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Richard Retanubun <RichardRetanubun@ruggedcom.com>
* Support up to 7 banks for ids as specified in JEDEC JEP106ZNiklaus Giger2009-08-261-2/+13
| | | | | | | | see http://www.jedec.org/download/search/jep106Z.pdf Add some second source legacy flash chips 256x8. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
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