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* dm: mmc: Add a way to bind MMC devices with driver modelSimon Glass2016-05-171-0/+48
| | | | | | | | | | Binding an MMC device when CONFIG_BLK is enabled requires that a block device be bound as a child of the MMC device. Add a function to do this. The mmc_create() method will be used only when DM_BLK is disabled. Add an unbind method also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Implement the MMC functions for block devicesSimon Glass2016-05-172-1/+109
| | | | | | | | Implement the functions in mmc_legacy.c for driver-model block devices, so that MMC can use driver model for these. This allows CONFIG_BLK to be enabled with DM_MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Only enable the sandbox MMC driver when validSimon Glass2016-05-171-0/+4
| | | | | | | This driver will require generic MMC and block-device support in a future commit. To avoid test errors, make this change now. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Adjust mmc_switch_part() to use a struct mmcSimon Glass2016-05-171-8/+4
| | | | | | | Instead of looking up the MMC device by number, just pass it in. This makes it possible to use this function with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Move the device list into a separate fileSimon Glass2016-05-175-117/+172
| | | | | | | | | At present the MMC subsystem maintains its own list of MMC devices. This cannot work with driver model, which needs to maintain this itself. Move the list code into a separate 'legacy' file. The core MMC code remains, and will be shared with the driver-model implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Set up the device pointer when using the MMC uclassSimon Glass2016-05-176-1/+11
| | | | | | | Update the existing drivers to set up this new pointer. This will be required by the MMC uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Use the new select_hwpart() APISimon Glass2016-05-172-3/+4
| | | | | | Avoid calling directly into the MMC code - use the new API call instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a function to obtain the block deviceSimon Glass2016-05-171-0/+5
| | | | | | | | The MMC block device is contained within struct mmc. But with driver model this will not be the case. Add a function to obtain the block device. We can later implement this for CONFIG_BLK. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Implement the select_hwpart() methodSimon Glass2016-05-171-0/+22
| | | | | | | Implement this method so that hardware partitions will work correctly with MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Move mmc_switch_part() above its callersSimon Glass2016-05-171-24/+21
| | | | | | | | This function is defined after it is used. In preparation for making it static, move it up a little. Also drop the printf() which should not appear in a driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Drop the get_dev() functionSimon Glass2016-05-171-14/+2
| | | | | | This function is implemented by the legacy block functions now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a legacy block interface for MMCSimon Glass2016-05-171-3/+27
| | | | | | Add a legacy block interface for MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: sdhci: add const qualifier to the name of struct sdhci_hostMasahiro Yamada2016-04-253-3/+3
| | | | | | | This allows to drop annoying (char *) casts when setting the host name of struct sdhci_host. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* drivers: mmc: omap_hsmmc: request cd and wp gpios when DM_MMC is definedMugunthan V N2016-04-181-0/+5
| | | | | | | | Add request gpio for CD and WP gpios, so that the gpio can be used for the respective purposes. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: mmc: omap_hsmmc: Fix conversion of address to a pointerMugunthan V N2016-04-181-1/+2
| | | | | | | | | | | | | | | | | omap_hsmmc driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_ofdata_to_platdata’: drivers/mmc/omap_hsmmc.c:776:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->base_addr = (struct hsmmc *)dev_get_addr(dev); ^ Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: socfpga: Nuke useless includeMarek Vasut2016-04-101-1/+0
| | | | | | | | | | The dwmmc.h include was forgotten during the migration of dwmmc probing to DM. Since the shiny DM is in place now, remove this relic of the past. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* fsl: esdhc: support driver modelPeng Fan2016-04-061-40/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Driver Model for fsl esdhc driver. 1. Introduce a new structure struct fsl_esdhc_priv 2. Refactor fsl_esdhc_initialize which is originally used by board code. - Introduce fsl_esdhc_init to be common usage for DM and non-DM - Introduce fsl_esdhc_cfg_to_priv to build the bridge for non-DM part. - The original API for board code is still there, but we use 'fsl_esdhc_cfg_to_priv' and 'fsl_esdhc_init' to serve it. 3. All the functions are changed to use 'struct fsl_esdhc_priv', except fsl_esdhc_initialize. 4. Since clk driver is not implemented, use mxc_get_clock to geth the clk and fill 'priv->sdhc_clk'. Has been tested on i.MX6UL 14X14 EVK board: " =>dm tree .... simple_bus [ + ] | `-- aips-bus@02100000 mmc [ + ] | |-- usdhc@02190000 mmc [ + ] | |-- usdhc@02194000 .... => mmc list FSL_SDHC: 0 (SD) FSL_SDHC: 1 (SD) " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Hector Palacios <hector.palacios@digi.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Tested-By: Eric Nelson <eric@nelint.com> Reviewed-by: York Sun <york.sun@nxp.com>
* mmc: Add support for Qualcomm SDHCI controllerMateusz Kulikowski2016-04-013-0/+190
| | | | | | | | | | | Add support for SD/eMMC controller present on some Qualcomm Snapdragon devices. This controller implements SDHCI 2.0 interface but requires vendor-specific initialization. Driver works in PIO mode as ADMA is not supported by U-Boot (yet). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-04-011-1/+5
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| * sunxi: Add support for Allwinner A64 SoCsSiarhei Siamashka2016-04-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Explicitly cast u32 pointer conversionsAlexander Graf2016-04-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | mmc: uniphier: use devm_get_addr() to get base addressMasahiro Yamada2016-04-011-3/+6
|/ | | | | | | | | Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: Print send_cmd response only when return value is zeroBin Meng2016-03-271-38/+42
| | | | | | | | send_cmd response is valid only when no error happened. If an error occured, let mmc_send_cmd() print the return value to aid debugging. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: Fix switch..case indentionBin Meng2016-03-271-70/+70
| | | | | | | Correct the indention level of switch..case statements. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: bcm2835: fix 64-bit build warningStephen Warren2016-03-271-1/+1
| | | | | | | | Fixes: drivers/mmc/bcm2835_sdhci.c: In function ‘bcm2835_sdhci_init’: drivers/mmc/bcm2835_sdhci.c:181:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* dwmmc: Increase retry timeoutAlexander Graf2016-03-151-1/+1
| | | | | | | | | | | | | | When enable dcache on HiKey, we're running into MMC command timeouts because our retry loop is now faster than the eMMC (or an external SD card) can answer. Increase the retry count to the same as the timeout value for status reports. The real fix is obviously to not base this whole thing on a cycle counter but on real wall time, but that would be slightly more intrusive. Signed-off-by: Alexander Graf <agraf@suse.de>
* omap_hsmmc: Board-specific TWL6030 MMC power initializationPaul Kocialkowski2016-03-151-4/+2
| | | | | | | | | | Boards using the TWL6030 regulator may not all use the LDOs the same way. Some might also not use MMC1 at all, so VMMC would't have to be enabled. This delegates TWL6030 MMC power initializations to board-specific functions, that may still call twl6030_power_mmc_init for the default behavior. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* power: twl6030: Device-index-specific MMC power initializationPaul Kocialkowski2016-03-151-2/+2
| | | | | | | | Not every device has multiple MMC slots available, so it makes sense to enable only the required LDOs for the available slots. Generic code in omap_hsmmc will enable both VMMC and VAUX1, in doubt. Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-03-147-31/+31
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| * dm: block: Rename device number member dev to devnumSimon Glass2016-03-146-22/+22
| | | | | | | | | | | | | | | | | | This is a device number, and we want to use 'dev' to mean a driver model device. Rename the member. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * dm: part: Rename some partition functionsSimon Glass2016-03-141-1/+1
| | | | | | | | | | | | | | | | Rename three partition functions so that they start with part_. This makes it clear what they relate to. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
| * dm: Drop the block_dev_desc_t typedefSimon Glass2016-03-143-8/+8
| | | | | | | | | | | | | | | | | | Use 'struct' instead of a typdef. Also since 'struct block_dev_desc' is long and causes 80-column violations, rename it to struct blk_desc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* | lib/crc16.c: Rename cyg_crc16() to crc16_ccitt() and add crc start valueStefan Roese2016-03-141-2/+2
|/ | | | | | | | | | | | | The original name of this function is unclear. This patch renames this CRC16 function to crc16_ccitt() matching its name with its implementation. To make the usage of this function more flexible, lets add the CRC start value as parameter to this function. This way it can be used by other functions requiring different start values than 0 as well. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: uniphier: add driver for UniPhier SD/MMC host controllerMasahiro Yamada2016-02-293-0/+758
| | | | | | | Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: Kconfig: Add Arasan SDHCI entryMichal Simek2016-02-221-0/+6
| | | | | | Add Arasan SDHCI entry to Kconfig and fix all references. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* tegra: mmc: Fix comments in the MMC driver initSimon Glass2016-02-161-2/+2
| | | | | | | Fix the SoC names in two comments. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Use correct spelling of "U-Boot"Bin Meng2016-02-061-1/+1
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-02-021-3/+12
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| * mmc: atmel: Properly fix clock configurationGregory CLEMENT2016-01-271-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timing issue occurs on eMMC not only when modifying the frequency but also for all the switch command(CMD6). According to the MMC spec waiting 8 clocks after a switch command would be the thing to do. This patch allows fixing CPU hang observed when trying to changing the bus width on a eMMC on SAMA5D4. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV Acked-by: Marek Vasut <marex@denx.de> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100 Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | drivers: mmc: add driver for Microchip PIC32 SDHCI controller.Andrei Pistirica2016-02-014-1/+72
| | | | | | | | | | | | | | | | | | | | | | This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-01-271-5/+9
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| * | mmc: fsl_esdhc: set Abort command type for CMD12Yangbo Lu2016-01-271-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need to be set an Abort command type when they are sent. So, we remove all chip-specific #ifdefs and make it available for all platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | mmc: fsl_esdhc: increase data transaction timeout to 500msYangbo Lu2016-01-271-1/+8
| |/ | | | | | | | | | | | | | | | | | | The MMC spec says "It is strongly recommended for hosts to implement more than 500ms timeout value even if the card indicates the 250ms maximum busy length." Even the previous value of 300ms is known to be insufficient for some cards. So, increase the timeout to 500ms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mmc: zynq_sdhci: Added qurik to disable high speedSiva Durga Prasad Paladugu2016-01-271-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add quirk to disable high speed incase the high speed was broken.This solves the issue where the the controller is used in High Speed Mode and the the hold time requirement for the JEDEC/MMC 4.41 specification is NOT met. This timing issue is not on all boards and hence provided config option to enable it when required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | mmc: sdhci: Clear high speed if not supportedSiva Durga Prasad Paladugu2016-01-271-0/+4
| | | | | | | | | | | | | | | | | | Clear high speed bit if it was not supported by the driver. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sdhci: zynq: Remove hardcoded value zero as min frequencySiva Durga Prasad Paladugu2016-01-271-1/+6
|/ | | | | | | | | Remove hardcoded value zero as min frequency and use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ defined in board config Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* rockchip: Use a separate clock ID for clocksSimon Glass2016-01-211-8/+5
| | | | | | | | | | At present we use the same peripheral ID for clocks and pinctrl. While this works it is probably better to use the device tree clock binding ID for clocks. We can use the clk_get_by_index() function to find this. Update the clock drivers and the code that uses them. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: mmc: Use a pwrseq device if availableSimon Glass2016-01-211-0/+47
| | | | | | | Use the pwrseq uclass to find a suitable power sequence for the MMC device. If this is enabled in the device tree, we will pick it up automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Try to honour the sequence orderSimon Glass2016-01-201-5/+15
| | | | | | | | | | | | At present we add driver-model MMC devices in the order we find them. The 'alias' order is not honoured. It is difficult to fix this for the case where we have holes in the sequence. But for the common case where the devices are numbered from 0 without any gaps, we can add the devices to the internal data structures in this order. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-192-7/+2
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
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