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* imx: fec: add MAC reading from eFuses to READMEOlaf Mandel2015-09-021-0/+12
| | | | | | | | | | | | Extend the documentation of the fec_mxc configuration by describing its ability to read the ethaddr MAC address from the SoC eFuses. Also add an example how to program the fuses for an imx5 to clarify the byte order. Cc: Stefano Babic <sbabic at denx.de> Cc: Marek Vasut <marex at denx.de> Signed-off-by: Olaf Mandel <o.mandel at menlosystems.com>
* imx: Document fuse assignments for MAC addressesBenoît Thébaudeau2013-04-281-0/+6
| | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* mx5: Mark lowlevel_init board-specific codeBenoît Thébaudeau2012-11-191-0/+5
| | | | | | | | | | | | The mx5 lowlevel_init.S contains board-specific code based on the reference design. Let's keep it since it avoids creating new lowlevel_init files and it may be used by many boards. But add a config to make it optional in order not to cause issues on boards not following this part of the reference design. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Matt Sealey <matt@genesi-usa.com> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: MX51: PLL errata workaroundDavid Jander2011-09-041-0/+17
This is a port of the official PLL errata workaround from Freescale to mainline u-boot. The PLL's in the i.MX51 processor can go out of lock due to a metastable condition in an analog flip-flop when used at high frequencies. This workaround implements an undocumented feature in the PLL (dither mode), which causes the effect of this failure to be much lower (in terms of frequency deviation), avoiding system failure, or at least decreasing the likelihood of system failure. Signed-off-by: David Jander <david@protonic.nl>
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