summaryrefslogtreecommitdiffstats
path: root/doc/README.atmel_pmecc
Commit message (Collapse)AuthorAgeFilesLines
* arm:at91: enable ROM loadable atmel imageAndreas Bießmann2014-05-271-0/+21
| | | | | | | | For sama5d3xek we need to modify the SPL image for correct detection by ROM code. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Tested-by: Bo Shen <voice.shen@atmel.com>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2013-10-141-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: at91: atmel_nand: pmecc driver will select the galois table by sector sizeWu, Josh2013-08-221-14/+0
| | | | | | | | | | Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> [rebased on master] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* at91: atmel_nand: Update driver to support Programmable Multibit ECC controllerWu, Josh2012-09-011-0/+44
The Programmable Multibit ECC (PMECC) controller is a programmable binary BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller can be used to support both SLC and MLC NAND Flash devices. It supports to generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data. To use PMECC in this driver, the user needs to set the PMECC correction capability, the sector size and ROM lookup table offsets in board config file. This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference is in this version it uses registers structure access hardware instead of using macros. It is tested in 9x5 serial boards. Signed-off-by: Josh Wu <josh.wu@atmel.com> [rebase] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
OpenPOWER on IntegriCloud