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* board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPLPrabhakar Kushwaha2014-05-165-13/+267
| | | | | | | | | | | | | | | | | | | | | | In the earlier patches, the SPL/TPL fraamework was introduced. For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The SPL was loaded by the code from the internal on-chip ROM. The SPL initializes the DDR according to the SPD and loads the final uboot image into DDR, then jump to the DDR to begin execution. For NAND booting way, the nand SPL has size limitation on some board(e.g. P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD and loads the final uboot image into DDR,then jump to the DDR to begin execution. This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL. Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to execute, so the section .resetvec is no longer needed. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/t104xrdb: Toggle deep sleep management signals after resumeTang Yuantian2014-05-161-0/+2
| | | | | | | | | T104xrdb has several sleep management signals that are used for deep sleep. They are enabled by OS to enter deep sleep and should be disabled by u-boot when cores wake up. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* board/freescale: Move CRC32 offset in NXID v1 data formatEbony Zhu2014-05-161-3/+4
| | | | | | | | | | According to AN3638, CRC of NXID v1 is at the end of the 256-byte I2C memory. The wrong CRC32 offset prevents Uboot from reading system information from EEPROM. No NXID v0 is being used on Freescale boards. Signed-off-by: Ebony Zhu <b45385@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-05-1323-29/+1363
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| * powerpc/freescale: Change the return value of mac_read_from_eeprom()York Sun2014-05-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | The return value has not been checked by its caller, until recent change of using generic board architecture. The error of this function is not critical enough to hang the system. Printing the warning message is enough to catch user's attention. U-boot should continue to boot to give user a chance to fix the EEPROM. Chaning the return value to 0 to avoid hanging in the board_init_r(). Signed-off-by: York Sun <yorksun@freescale.com>
| * PPC 85xx QEMU: Always assume 1 coreAlexander Graf2014-05-131-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only need u-boot to bother about a single core in the QEMU machine. Everything that would require additional knowledge of more cores gets handled by QEMU and passed straight into the payload we execute. Because of this setup, it would be counterproductive to enable SMP support in u-boot. We would have to rip CPUs out of already existing spin tables and respin them from u-boot. It would be a pretty big mess. So only assume we have a single core. This fixes errors about CONFIG_MP being disabled. Signed-off-by: Alexander Graf <agraf@suse.de>
| * kmp204x: add workaround for A-004849Valentin Longchamp2014-05-131-6/+37
| | | | | | | | | | | | | | | | | | | | This should prevent the problems that the CCF can deadlock with certain traffic patterns. This also fixes the workaround for A-006559 that was not correctly implemented before. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * kmp204x: update the RCWValentin Longchamp2014-05-131-1/+1
| | | | | | | | | | | | | | | | Fix the IRQ/GPIO settings: all the muxed GPIO/external IRQs that are used as internal interrupts are defined as GPIOs to avoid confusion between the internal/external interrupts. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * kmp204x: complete the reset sequence and PRST configurationValentin Longchamp2014-05-134-19/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the reset support for the following devices that was until then not implemented: - BFTIC4 - QSFPs This also fixes the configuration of the prst behaviour for the other resets: Only the u-boot and kernel relevant subsystems are taken out of reset (pcie, ZL30158, and front eth phy). Most of the prst config move to misc_init_f(), except for the PCIe related ones that are in pci_init_board and the bftic and ZL30158 ones that should be done as soon as possible. Only the behavior of the Hooper reset is changed according to the documentation as the application is not able to not configure the switch when it is not reset. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * kmp204x: selftest/factory test pin supportValentin Longchamp2014-05-131-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch defines the post_hotkeys_pressed() function that is used for: - triggering POST memory regions test - starting the test application through the checktestboot command in a script by setting the active bank to testbank The post_hotkeys_pressed return the state of the SELFTEST pin. The patch moves from the complete POST-memory test that is too long in its SLOW version for our production HW test procedure to the much shorter POST-memory-regions test. Finally, the unused #defines for the not so relevant mtest command are removed. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * kmp204x: handle dip-switch for factory settingsStefan Bigler2014-05-133-0/+30
| | | | | | | | | | | | | | | | | | Add readout of dip-switch to revert to factory settings. If one or more dip-switch are set, launch bank 0 that contains the bootloader to do the required action. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * kmp204x: Add support for the unit LEDsStefan Bigler2014-05-133-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | The unit LEDs are managed by the QRIO CPLD. This patch adds support for accessing these LEDs in the QRIO. The LEDs then are set to a correct boot state: - UNIT-LED is red - BOOT-LED is on. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
| * powerpc/85xx: Add T4240RDB board supportChunhe Lan2014-05-1311-0/+697
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
| * board/b4qds: VID supportShaveta Leekha2014-05-131-0/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The fuse status register provides the values from on-chip voltage ID efuses programmed at the factory. These values define the voltage requirements for the chip. u-boot reads FUSESR and translates the values into the appropriate commands to set the voltage output value of an external voltage regulator. B4860QDS has a PowerOne ZM7300 programmable digital Power Manager which is programmed as per the value read from the fuses. Reference for this code is taken from t4qds VID implementation. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
| * board/freescale/common: ZM7300 driverShaveta Leekha2014-05-133-0/+258
| | | | | | | | | | | | | | | | | | | | | | Adds Support for PowerOne ZM7300 voltage regulator. This device is available on some Freescale Boards like B4860QDS and has to be programmed to adjust the voltage on the board. The device is accessible via I2C interface. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
* | fpga: xilinx: Simplify load/dump/info function handlingMichal Simek2014-05-132-1/+3
| | | | | | | | | | | | | | | | Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | fpga: xilinx: Fix the rest of CamelCasesMichal Simek2014-05-131-19/+19
| | | | | | | | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | fpga: xilinx: Avoid CamelCase for in Xilinx_descMichal Simek2014-05-139-15/+15
| | | | | | | | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | fpga: virtex2: Avoid CamelCaseMichal Simek2014-05-131-2/+2
| | | | | | | | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | fpga: spartan3: Avoid CamelCaseMichal Simek2014-05-137-10/+10
| | | | | | | | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | fpga: spartan2: Avoid CamelCaseMichal Simek2014-05-132-2/+2
|/ | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nand_spl: remove unused linker scripts u-boot-nand.ldsMasahiro Yamada2014-05-127-558/+0
| | | | | | | | | | | | | | | Commit 345b77ba removed some nand_spl boards but it missed to delete linker scripts. These linker scripts are not used now. And one more fix: amcc/acadia does not support nand_spl anymore, so remove #if !defined(CONFIG_NAND_U_BOOT) ... #endif Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de>
* cosmetic: delete misleading comment /* CONFIG_BOARDDIR */Masahiro Yamada2014-05-121-1/+1
| | | | | | | CONFIG_BOARDDIR is not referenced in these linker scripts. The comment /* CONFIG_BOARDDIR */ is misleading. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* blackfin: replace bfin_gen_rand_mac() with eth_random_addr()Masahiro Yamada2014-05-1215-30/+15
| | | | | | | | | | | bfin_gen_rand_mac() uses __DATE__ as the seed for random ethernet address. This makes the build non-deterministic. In the first place, it should not be implemented as a Bfin-specific function. Use eth_random_addr() instead. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Sonic Zhang <sonic.zhang@analog.com>
* net: rename and refactor eth_rand_ethaddr() functionMasahiro Yamada2014-05-121-1/+1
| | | | | | | | | | | | | | | | | | | | Some functions in include/net.h are ported from include/linux/etherdevice.h of Linux Kernel. For ex. is_zero_ether_addr() is_multicast_ether_addr() is_broadcast_ether_addr() is_valid_ether_addr(); So, we should use the same function name as that of Linux Kernel, eth_rand_addr(), for consistency. Besides, eth_rand_addr() has been implemented as an inline function. So it should not be surrounded by #ifdef CONFIG_RANDOM_MACADDR. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* bd_info: remove bi_barudrate member from struct bd_infoMasahiro Yamada2014-05-122-4/+5
| | | | | | | | | | | | | | | | | gd->bd->bi_baudrate is a copy of gd->baudrate. Since baudrate is a common feature for all architectures, keep gd->baudrate only. It is true that bi_baudrate was passed to the kernel in that structure but it was a long time ago. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
* Merge branch 'tom' of git://git.denx.de/u-boot-x86Tom Rini2014-05-093-181/+0
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| * sandbox: move source files from board/ to arch/sandbox/Masahiro Yamada2014-05-093-389/+0
| | | | | | | | | | | | | | | | | | | | | | | | Prior to commit 33a02da0, all boards must have board/${BOARD}/ or board/${VENDOR}/${BOARD}/ directory. Now this rule is obsolete. It looks weird that sandbox defines "vendor" and "board" just for meeting the old U-Boot directory structure. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org>
| * sandbox: Update and expand the READMESimon Glass2014-05-091-7/+215
| | | | | | | | | | | | | | Now that sandbox has a good base of features, the README is quite out of date. Update it, and document the new features. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'u-boot/master'Albert ARIBAUD2014-05-09147-23431/+1822
|\ \ | |/ | | | | | | | | | | Conflicts: drivers/net/Makefile (trivial merge)
| * ums: always initialize mmc before ums_disk_init()Mateusz Zalega2014-05-051-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In cases when MMC hadn't been initialized before, ie. by the user or other subsystem, it was still uninitialized while UMS media capacity check, leading to broken ums command. UMS has to initialize resources it uses. Tested on Samsung Goni. Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Tested-by: Mateusz Zalega <m.zalega@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
| * usb: dfu: fix boards wo USB cable detectionMateusz Zalega2014-05-054-20/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Former usb_cable_connected() patch broke compilation of boards which do not support this feature. I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added its default implementation to gadget downloader driver code. There's only one driver of this kind and it's unlikely there'll be another, so there's no point in keeping it in /common. Previously this function was declared in usb.h. I've moved it, since it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended for USB host implementation. Existing code, confronted with default -EOPNOTSUPP return value, continues as if the cable was connected. CONFIG_USB_CABLE_CHECK was removed. Change-Id: Ib9198621adee2811b391c64512f14646cefd0369 Signed-off-by: Mateusz Zalega <m.zalega@samsung.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
| * Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xxTom Rini2014-04-251-64/+101
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| | * ppc4xx: add support for new PMC440 revision with cleanupMatthias Fuchs2014-04-241-64/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the new PMC440 hardware revision 1.4. The board now uses Micrel KSZ9031 phys. Add missing i2c initialization before reading bootstrap eeprom. Fix a couple of coding style issues. Make local functions static. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxTom Rini2014-04-254-0/+219
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| | * | mpc83xx: add ids8313 supportHeiko Schocher2014-04-232-0/+219
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add support for the ids8313 board. CPU: e300c3, MPC8313, Rev: 2.1 at 396 MHz, CSB: 132 MHz I2C: ready SPI: ready DRAM: 128 MiB (DDR2, 32-bit, ECC off, 264 MHz) Flash: 8 MiB NAND: 128 MiB Net: TSEC0, TSEC1 [PRIME] public key on NOR flash start Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc, ids8247: create vendor board dir idsHeiko Schocher2014-04-232-0/+0
| | |/ | | | | | | | | | | | | | | | | | | | | | create vendor board directory ids and move ids8247 board to it. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-04-2539-77/+1503
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| | * powerpc/T4QDS: add two stage boot of nand/sdShaohui Xie2014-04-224-3/+158
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of 2 stage NAND/SD boot loader using SPL framework. PBL initialise the internal SRAM and copy SPL, this further initialise DDR using SPD and environment and copy u-boot from NAND/SD to DDR, finally SPL transfer control to u-boot. NOR uses CS1 instead of CS2 when NAND boot, fix it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * powerpc/t4240: updated RCW and PBI for rev2.0Shaohui Xie2014-04-222-17/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated the RCW for rev2.0 which uses new frequency settings as below: Clock Configuration: CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz, CPU3:1666.667 MHz, CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz, CPU7:1666.667 MHz, CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz, CPU11:1666.667MHz, CCB:733.333 MHz, DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:183.333 MHz FMAN1: 733.333 MHz FMAN2: 733.333 MHz QMAN: 366.667 MHz PME: 533.333 MHz Remove workaround of IFC bus speed and SERDES A-006031 of rev1.0. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * board/t2080rdb: some update for t2080rdbShengzhou Liu2014-04-223-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - update readme. - add CONFIG_SYS_CORTINA_FW_IN_* for loading Cortina PHY CS4315 ucode from NOR/NAND/SPI/SD/REMOTE. - update cpld vbank with SW3[5:7]=000 as default vbank0 instead of previous SW3[5:7]=111 as default vbank. - fix CONFIG_SYS_I2C_EEPROM_ADDR_LEN to 2. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * board/t208xrdb: Add support of 2-stage NAND/SPI/SD bootShengzhou Liu2014-04-225-16/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of 2-stage NAND/SPI/SD boot loader using SPL framework. PBL initializes the internal CPC-SRAM and copy SPL(160K) to it, SPL further initializes DDR using SPD and environment and copy u-boot(768K) from SPI/SD/NAND to DDR, finally SPL transfers control to u-boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * board/t208xqds: Add support of 2-stage NAND/SPI/SD bootShengzhou Liu2014-04-224-2/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of 2-stage NAND/SPI/SD boot loader using SPL framework. PBL initializes the internal CPC-SRAM and copy SPL(160K) to it, SPL further initializes DDR using SPD and environment and copy u-boot(768 KB) from SPI/SD/NAND to DDR, finally SPL transfers control to u-boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: fix boards.cfg for T2081QDS_SDCARD and _SPIFLASH] Reviewed-by: York Sun <yorksun@freescale.com>
| | * powerpc/t1040rdb: added a break in switch caseShaohui Xie2014-04-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | There should be a break for case PHY_INTERFACE_MODE_SGMII, otherwise it will fall into case PHY_INTERFACE_MODE_RGMII. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * board/t104xrdb: Add support of NAND, SD, SPI boot for T104xRDBPrabhakar Kushwaha2014-04-228-3/+256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of 2 stage NAND, SD, SPI boot loader using SPL framework. here, PBL initialise the internal SRAM and copy SPL(160KB). This further initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR. Finally SPL transer control to u-boot. Initialise/create followings required for SPL framework - Add spl.c which defines board_init_f, board_init_r - update tlb and ddr accordingly Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * board/b4qds:Add support of 2 stage NAND boot-loaderPrabhakar Kushwaha2014-04-224-3/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of 2 stage NAND boot loader using SPL framework. here, PBL initialise the internal SRAM and copy SPL(160KB). This further initialise DDR using SPD and environment and copy u-boot(768 KB) from NAND to DDR. Finally SPL transer control to u-boot. Initialise/create followings required for SPL framework - Add spl.c which defines board_init_f, board_init_r - update tlb and ddr accordingly Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * T1040QDS/U-QE: Add u-qe support to t1040qdsZhao Qiang2014-04-221-0/+27
| | | | | | | | | | | | | | | | | | | | | Add u-qe support for t1040qds Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * mpc85xx: Add deep sleep support on T104xRDBTang Yuantian2014-04-221-0/+10
| | | | | | | | | | | | | | | | | | | | | Add deep sleep support on T104xRDB platforms. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * mpc85xx: Add deep sleep support on T1040QDSTang Yuantian2014-04-221-0/+12
| | | | | | | | | | | | | | | | | | | | | Add deep sleep support on T1040QDS platform. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * board/t104xrdb: Add support of CPLDPrabhakar Kushwaha2014-04-224-0/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040RDB and T1042RDB_PI has CPLD. Here CPLD controls board mux/features. This support of CPLD includes - files and register defintion - Commands to swtich alternate bank and default bank Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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