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* t4240qds/eth: fixup ethernet for t4240qdsShengzhou Liu2013-05-141-14/+90
| | | | | | | | | | | 1, Implemented board_ft_fman_fixup_port() to fix port for kernel. 2, Implemented fdt_fixup_board_enet() to fix node status of different slots and interfaces. 3, Adding detection of slot present for XGMII interface. 4, There is no PHY for XFI, so removed related phy address settings. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/t4240qds: Add voltage ID supportYork Sun2013-05-141-0/+229
| | | | | | | | T4240 has voltage ID fuse. Read the fuse and configure the voltage correctly. Core voltage has higher tolerance on over side than below. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* powerpc/t4240qds: Update DDR timing tableYork Sun2013-05-141-22/+34
| | | | | | | | | | Update the timing table to support more rank density, based on the theory that similar density DIMMs have similar clock adjust and write level start timing. Update the timing for 1600 and 1866 MT/s. Tested with Micron MT18JSF1G72AZ-1G9E1 DIMMs, iDIMM M3CN-4GMJ3C0C-M92. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* T4/serdes: fix the serdes clock frequencyRoy Zang2013-05-141-2/+2
| | | | | | | | | | Reverse the bit sequence to set and display serdes clock frequency correctly. The correct bit maps in BRDCFG2 are 0 1 2 3 4 5 6 7 S1RATE[1:0] S2RATE[1:0] S3RATE[1:0] S4RATE[1:0] Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* openrisc: move board linker script(s) to a common in cpu/Stefan Kristiansson2013-05-101-77/+0
| | | | | | Unifies the openrisc boards linker scripts into a common one. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* openrisc: specify a memory region for u_boot_listsStefan Kristiansson2013-05-101-1/+1
| | | | | | | | Since there are two memory areas defined, vectors and ram, the linker will error when neither of them are specified for a section. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* Fix references to the documentation filesAnatolij Gustschin2013-05-1042-42/+42
| | | | | | | | | | | | Many boot image configuration files refer to the appropriate documentation file, but these references contain typos in the directory and file name. Fix them. Also fix reference to doc/README.SPL file. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* gpio: Add support for microblaze xilinx GPIOMichal Simek2013-05-091-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | Microblaze uses gpio which is connected to the system reset. Currently gpio subsystem wasn't used for it. Add gpio driver and change Microblaze reset logic to be done via gpio subsystem. There are various configurations which Microblaze can have that's why gpio_alloc/gpio_alloc_dual(for dual channel) function has been introduced and gpio can be allocated dynamically. Adding several gpios IP is also possible and supported. For listing gpio configuration please use "gpio status" command This patch also remove one compilation warning: microblaze-generic.c: In function 'do_reset': microblaze-generic.c:38:47: warning: operation on '*1073741824u' may be undefined [-Wsequence-point] Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-05-0210-13/+285
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| * powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PCXu Jiucheng2013-05-022-1/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When P1021RDB-PC reboot system, the board will hung at uboot DDR configuration. For P1021RDB-PC DDR reset pin is multiplex with QE, so uboot will reserve this pin for QE and skip DDR reset. Other platforms without QE will do this reset. This patch adds a slight code to reset DDR chip by QE CE_PB8 pin for NAND and NOR FLASH boot. For booting from SPI FALSH and SD card, it seems possible to use the rom on chip to write to the GPIO pins before configuring the DDR. Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1010rdb: Change flexcan compatible stringShengzhou Liu2013-05-021-1/+1
| | | | | | | | | | | | | | | | Change flexcan compatible string from "fsl,flexcan-v1.0" to "fsl,p1010-flexcan" to match the device tree. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * qoriq/p1_p2_rdb_pc: USB device-tree fixups for P1020Zhicheng Fan2013-05-021-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | Resolve P1020 second USB controller multiplexing with eLBC - mandatory to mention USB2 in hwconfig string to select it over eLBC, otherwise USB2 node is removed - works only for SPI and SD boot Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/b4860qds: Add the tlb entries for SRIO interfacesLiu Gang2013-05-021-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the tlb entries based on the configuration of the SRIO interfaces. Every SRIO interface has 256M space: #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/p1022ds: Add support for NAND and NAND boot using SPLMatthew McClintock2013-05-025-6/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add defines needed to access NAND, remove second flash bank that is actually connected to NAND. Add nand booting support for P1022DS with hardcoded DDR config using SPL framework from 2011 Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * board/freescale/common/cds_pci_ft.c: Fix rotate wrong cells in interrupt-map ↵Jiang Bin2013-05-021-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | property For linux 3.x, the size of each item in interrupt-map property is 9 not 7. Don't use the static value and calculate the size with following cells: PCI #address-cells, PCI #interrupt-cells, PIC address, PIC #address-cells, PIC #interrupt-cells. Signed-off-by: Bin Jiang <bin.jiang@windriver.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2013-05-021-6/+20
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| * mpc5200: a3m071/a4m2k: Miscellaneous updates and fixesStefan Roese2013-05-021-6/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The changes to a3m071/a4m2k in summary are: - Enable CAN1 on I2C in GPS Port Configuration - Enable SPI on PSC2 - Activate network console - New flash partitioning - Fix some typos - Pass host name to Linux - Change rootfs to squashfs,jffs2 - Enable UBI/UBIFS support - Enable FIT support Signed-off-by: Stefan Roese <sr@denx.de>
* | env_mmc: add support for redundant environmentMichael Heimpold2013-05-011-1/+1
|/ | | | | | | | This patch add support for storing the environment redundant on mmc devices. Substantially it re-uses the logic from the NAND implementation, that means using an incremental counter for marking newer data. Signed-off-by: Michael Heimpold <mhei@heimpold.de>
* sandbox: Switch over to generic boardSimon Glass2013-05-011-1/+1
| | | | | | | | | Add generic board support for sandbox. and remove the old board init code. Select CONFIG_SYS_GENERIC_BOARD for sandbox now that this is supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com>
* Merge branch 'microblaze' of git://www.denx.de/git/u-boot-microblazeTom Rini2013-05-012-3/+12
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| * watchdog: Add support for Xilinx Microblaze watchdogMichal Simek2013-04-302-0/+8
| | | | | | | | | | | | | | Watchdog can be used on Microblaze, PPC and Zynq hw designs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
| * microblaze: Disable all cpu features before resetMichal Simek2013-04-301-1/+2
| | | | | | | | | | | | | | | | | | | | Fix microblaze soft reset function and disable all cpu features. Especially disable caches because IRQs were off by disable_interrupts(). Reported-by: John Williams <john.williams@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Fix reset functionMichal Simek2013-04-301-2/+2
| | | | | | | | | | | | | | | | | | | | Remove CONFIG_SYS_RESET_ADDRESS macro. It was there from historical point of view when soft reset was just jump to u-boot text start (not used right now). Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ppc4xx: Add lcd4_lwmon5 supportStefan Roese2013-04-222-3/+76
|/ | | | | | | | | | | | | | This patch adds the fast booting LWMON5 derivat "lcd4_lwmon5". Its a stripped down version of the full blown lwmon5 support, without ECC, USB, POST and some other stuff. It used the newly introduced SPL infrastrucure for SPL from NOR flash booting on the PPC4xx. By setting the environment variable "boot_os" to "yes", Linux will be started from the SPL version. If not, the "normal" U-Boot will be started. Signed-off-by: Stefan Roese <sr@denx.de>
* exynos: fdt: Add TMU node for snowSimon Glass2013-04-171-0/+14
| | | | | | | | Snow is missing a TMU node, and with TMU support this is not allowed, so it fails to boot. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos5: Add support for USB download boot modeVivek Gautam2013-04-171-2/+38
| | | | | | | | | | | | Exynos5250 supports secondary USB device boot mode. If the iROM fails to download u-boot from the primary boot device (such as SD or eMMC), it will try to retrieve from the secondary boot device (such as USB). Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Tegra: T30: Beaver board support.Tom Warren2013-04-151-0/+71
| | | | | | | | Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu. Add a Beaver build so it can begin to be differentiated, if need be. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: Split tegra_get_chip_type() into soc & sku funcsTom Warren2013-04-151-1/+1
| | | | | | | | | | | As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true function, i.e. tegra_get_chip_sku(), which returns an ID like TEGRA_SOC_T25, TEGRA_SOC_T33, etc. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* Tegra: All Tamonten-derived boards use onboard NANDThierry Reding2013-04-152-11/+11
| | | | | | | | | Move the nand-controller node to the tegra20-tamonten.dtsi so that it can be shared between all derived boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* smdk5250, snow: convert to CONFIG_SPL_MAX_FOOTPRINTAlbert ARIBAUD2013-04-141-1/+1
| | | | | | | | This target wants to check full SPL size, BSS included. Remove CONFIG_SPL_MAX_SIZE definition and instead define CONFIG_SPL_MAX_FOOTPRINT. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINTAlbert ARIBAUD2013-04-141-1/+1
| | | | | | | | This target wants to check full SPL size, BSS included. Remove CONFIG_SPL_MAX_SIZE definition and instead define CONFIG_SPL_MAX_FOOTPRINT. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINTAlbert ARIBAUD2013-04-141-1/+1
| | | | | | | | This target wants to check full SPL size, BSS included. Remove CONFIG_SPL_MAX_SIZE definition and instead define CONFIG_SPL_MAX_FOOTPRINT. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* ARM: Fix __bss_start and __bss_end in linker scriptsAlbert ARIBAUD2013-04-135-20/+50
| | | | | | | | | | | | | | Commit 3ebd1cbc introduced compiler-generated __bss_start and __bss_end__ and commit c23561e7 rewrote all __bss_end__ as __bss_end. Their merge caused silent and harmless but potentially bug-inducing clashes between compiler- and linker- generated __bss_end symbols. Make __bss_end and __bss_start compiler-only, and create __bss_base and __bss_limit for linker-only use. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-1270-200/+104
|\ | | | | | | | | Conflicts: drivers/video/exynos_fb.c
| * nand: Extend nand_(read|write)_skip_bad with *actual and limit parametersTom Rini2013-04-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We make these two functions take a size_t pointer to how much space was used on NAND to read or write the buffer (when reads/writes happen) so that bad blocks can be accounted for. We also make them take an loff_t limit on how much data can be read or written. This means that we can now catch the case of when writing to a partition would exceed the partition size due to bad blocks. To do this we also need to make check_skip_len count not just complete blocks used but partial ones as well. All callers of nand_(read|write)_skip_bad are adjusted to call these with the most sensible limits available. The changes were started by Pantelis and finished by Tom. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Tom Rini <trini@ti.com>
| * replace last __bss_end__ occurrences with __bss_endAlbert ARIBAUD2013-04-0235-35/+35
| | | | | | | | | | | | | | | | | | | | Simon Glass' commit 3929fb0a141530551b3fce15ee08629f80d5ef2a, which changed all occurrences of __bss__end__ into __bss_end, left behind some untouched __bss_end__ occurrences in all 33 u-boot.lds.debug files, in board/mousse/u-boot.lds.ram and in board/mousse/u-boot.lds.rom. These are replaced here. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * Consolidate bool typeYork Sun2013-04-0131-134/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
| * Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2013-03-311-1/+2
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| | * menu: Add support for user defined item choice functionPali Rohár2013-03-291-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Selecting menu items is currently done in menu_interactive_choice() by reading the user input strings from standard input. Extend menu_interactive_choice() to support user defined function for selecting menu items. This function and its argument can be specified when creating the menu. Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | Merge branch 'for-v2013.04'Anatolij Gustschin2013-03-292-30/+2
| |\ \ | | |/ | |/| | | | | | | | | | | | | Conflicts: drivers/video/Makefile Signed-off-by: Anatolij Gustschin <agust@denx.de>
| | * lcd, fb: remove duplicated prototypes and unused codeJeroen Hofstee2013-03-211-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | cc: Anatolij Gustschin <agust@denx.de> cc: Cliff Brake <cliff.brake@gmail.com> cc: John Zhan <zhanz@sinovee.com> cc: Marek Vasut <marek.vasut@gmail.com> cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| | * common/lcd.c: remove global lcd_baseJeroen Hofstee2013-03-212-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lcd_base is available as gd->fb_base as well, there is no need to keep a seperate copy. For completeness the ack of Bo Shen is for the atmel part. Cc: Alessandro Rubini <rubini@unipv.it> Cc: Anatolij Gustschin <agust@denx.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stelian Pop <stelian@popies.net> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> [agust: also fix cm_t35 board while rebasing] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| | * common/lcd.c: cleanup use of global variablesJeroen Hofstee2013-03-212-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | console_col, console_row, lcd_line_length, lcd_console_address had to be declared in board / driver specific code, but were not actually used there on many boards. Get rid of the global variables. for completeness, the ack of Bo Shen is for the atmel part Cc: Alessandro Rubini <rubini@unipv.it> Cc: Anatolij Gustschin <agust@denx.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stelian Pop <stelian@popies.net> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> [agust: rebased and fixed cm_t35 board] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| | * common/lcd.c: cleanup use of global variablesWolfgang Denk2013-03-212-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | lcd_color_fg and lcd_color_bg had to be declared in board specific code, but were not actually used there; in addition, we have getter / setter functions for these, which were not used either. Get rid of the global variables, and use the getter function where needed (so far no setter calls are needed). Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Alessandro Rubini <rubini@unipv.it> Cc: Anatolij Gustschin <agust@denx.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Simon Glass <sjg@chromium.org> Cc: Stelian Pop <stelian@popies.net> Cc: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl> [agust: also fixed cm_t35 board while rebasing] Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-124-14/+43
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| * | | omap5912-osk: Fix device initialisationJon Hunter2013-04-102-4/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current u-boot, the device pin multiplexing and clock initialisation needs to be early during the boot process and before board_init() is called. U-boot is currently crashing on this board because this is not being done early enough. Therefore, add a s_init() function for the omap5912-osk board to do this. Also fix the stack pointer so that it is pointing to the end of the internal RAM and not the beginning as this was also causing the device to crash. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
| * | | omap5912-osk: Fix booting from NOR flashJon Hunter2013-04-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The omap5912-osk board is using a RAM based address as the linker location for code. This is causing several problems when attempting to run the latest u-boot code base on this board from flash. Update the default linker location for code to be in NOR flash at address 0x00000000. The omap5912-osk board only has 32MB of RAM and so fix the comment in the omap5912-osk config.mk file as well. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
| * | | omap5912-osk: Fix DRAM initialisationJon Hunter2013-04-101-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The size of the DRAM for the omap5912-osk board is getting setup in the dram_init() function. However, for the current u-boot release this is too late and needs to be done in dram_init_banksize(). Therefore, add a dram_init_banksize() function for the omap5912-osk board and setup the DRAM size there. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
| * | | am335x: Update timings for the beaglebone againTom Rini2013-04-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After further testing we can run DDR at 400MHz so update the timings again. Tested-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com>
* | | | arm: Make all linker scripts compatible with per-symbol sectionsBenoît Thébaudeau2013-04-126-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let all ARM linker scripts handle properly -ffunction-sections and -fdata-sections. This will be useful for future changes in order to create symbol-specific sections in common .S files. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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