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* am335x, shc: add support for the am335x based bosch shc boardHeiko Schocher2016-06-097-0/+1318
| | | | | | | | | | | | | | | | | | | | | | | U-Boot SPL 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:40:06) SHC C3-Sample MPU reference clock runs at 6 MHz Setting MPU clock to 594 MHz Enabling Spread Spectrum of 18 permille for MPU Trying to boot from MMC reading u-boot.img reading u-boot.img U-Boot 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:05:35 +0100) Watchdog enabled I2C: ready DRAM: 512 MiB reloc off 1f783000 MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Net: cpsw U-Boot# Signed-off-by: Heiko Schocher <hs@denx.de>
* Merge http://git.denx.de/u-boot-samsungTom Rini2016-06-069-175/+69
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/peach-pi_defconfig configs/peach-pit_defconfig
| * exynos: video: Drop old unused codeSimon Glass2016-05-251-153/+0
| | | | | | | | | | | | | | | | | | Now that we are using driver model, we can drop the weak functions and LCD init in the board file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Convert several boards to driver model for videoSimon Glass2016-05-251-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update several boards to use driver model for video. This involves changes to the EDP and FIMD (frame buffer) drivers. Existing PWM, simple-panel and pwm-backlight drivers are used. These work without additional configuration since they use the device tree settings in the same way as Linux. Boards converted are: - snow - spring - peach-pit - peach-pi All have been tested. Not converted: - MIPI display driver - s5pc210_universal - smdk5420 - smdk5250 - trats - trats2 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Simplify calling of exynos_dp_phy_ctrl()Simon Glass2016-05-251-5/+0
| | | | | | | | | | | | | | | | This function controls enabling the EDP PHY. Rename it and drop the existing weak functions, which are confusing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Disable LCD display for boards we can't convertSimon Glass2016-05-252-0/+4
| | | | | | | | | | | | | | | | Some boards have the LCD enabled but I cannot test operation for the driver model conversion. Disable the LCD on these to avoid build errors. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Allow CONFIG_MISC_COMMON to be build without an LCDSimon Glass2016-05-251-0/+10
| | | | | | | | | | | | | | | | This file currently requires LCD support. Adjust it so that it can still be built without LCD support (even thought it won't work fully). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * board: samsung: add initial Espresso7420 board supportThomas Abraham2016-05-255-2/+55
| | | | | | | | | | | | | | | | | | | | Espresso7420 is a development/evaluation board for Exynos7420 SoC. It includes multiple onboard compoments (EMMC/Codec) and various interconnects (USB/HDMI). Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | ARM: DRA7xx: Enable FIT for hs platformsLokesh Vutla2016-06-061-0/+1
| | | | | | | | | | | | | | Use a single defconfig for all DRA7xx hs platforms by enabling FIT and delete the platform specific defconfigs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | strider: Support con-dp flavorDirk Eibach2016-06-062-0/+38
| | | | | | | | | | | | | | | | There is a new strider console flavor with DisplayPort video. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
* | gdsys: osd: Allow osdsize on valid screens onlyDirk Eibach2016-06-061-0/+3
| | | | | | | | | | | | | | Limit "osdsize"-command to access valid screens only. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ioep-fpga: Support intempo compressionDirk Eibach2016-06-061-6/+11
| | | | | | | | | | | | | | | | There is a new "intempo" compression type that can be reported on startup. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-06-064-18/+65
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| * | ARM64: zynqmp: Add support for standard distro boot commandsMichal Simek2016-06-061-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nand and QSPI are not defined now but this will be extended. Based on selected bootmode boot_targets are rewritten. Patch also contains detection if variables are saved. If yes don't rewrite boot_targets variable. Also move variable setup to the end of file because SCSI needs to be defined before others macros are using it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Alexander Graf <agraf@suse.de>
| * | microblaze: Move MSR instruction selection to KconfigMichal Simek2016-06-062-1/+4
| | | | | | | | | | | | | | | | | | Select MSR instructions via Kconfig instead of xparameters.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | microblaze: Add option to pass cpu version numberMichal Simek2016-06-062-0/+8
| | | | | | | | | | | | | | | | | | Toolchain can use some flags by default based on cpu version. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | microblaze: Select compilation flags via KconfigMichal Simek2016-06-062-10/+26
| | | | | | | | | | | | | | | | | | Remove autogenerated config.mk and select CPU options via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-0434-93/+77
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| * | | freescale: Tweak various Makefiles to remove redundancy, fix aestheticsRobert P. J. Day2016-06-0314-65/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No intended functional change, just remove redundancies in some Makefiles, and make whitespace aesthetics uniform. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | board/freescale: Use unified setup_ddr_tlbs for spl boot and non-spl bootShengzhou Liu2016-06-038-28/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should use unified setup_ddr_tlbs() for spl boot and non-spl boot to make sure 'M' bit is set for DDR TLB to maintain cache coherence. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | powerpc/board: SPL: Enable malloc flag in global data.Sumit Garg2016-06-0312-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For malloc to work in SPL framework enable GD_FLG_FULL_MALLOC_INIT flag in global data after allocating memory using mem_malloc_init. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | | Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-0417-19/+19
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| * | | | mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_dataScott Wood2016-06-035-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are part of the Linux 4.6 sync. They are being added before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | | | nand: Embed mtd_info in struct nand_chipScott Wood2016-06-0312-12/+12
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-0438-332/+1148
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| * | | | armv8: ls1012a: Add support of ls1012afrdm boardPrabhakar Kushwaha2016-06-035-0/+278
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development platform, with a complete debugging environment. The LS1012AFRDM board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls1012a: Add support of ls1012ardb boardPrabhakar Kushwaha2016-06-035-0/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls1012a: Add support of ls1012aqds boardPrabhakar Kushwaha2016-06-036-0/+356
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A Development System (LS1012AQDS) is a high-performance development platform, with a complete debugging environment. The LS1012AQDS board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | board: freescale: common: Add flag for LBMAP brdcfg reg offsetAbhimanyu Saini2016-06-031-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add QIXIS_LBMAP_BRDCFG_REG to the save offset of LBMAP configuration register instead of hardcoding it in set_lbmap() function. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | board: freescale: common: Conditionally compile IFC QXIS funcAbhimanyu Saini2016-06-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check if qixis supports memory-mapped read/write before compiling IFC based qixis read/write functions. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: fsl-layerscape: Organize SoC overview at common locationPrabhakar Kushwaha2016-06-034-154/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoC overviews are getting repeated across board folders. So, Organize SoC overview at common location i.e. fsl-layerscape/doc Also move README.lsch2 and README.lsch3 in same folder. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls1043aqds: fix usb PWRFAULT settingShaohui Xie2016-06-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SCFG_USBPWRFAULT_DEDICATED instead of SCFG_USBPWRFAULT_SHARED should be used for USB 3 & 2. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | board: ls2080ardb: qds: Fix compiling issue when FSL_MC_ENET not definedYork Sun2016-06-032-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot should continue to work without management complex (MC). Fix compiling errors and warnings. Signed-off-by: York Sun <york.sun@nxp.com>
| * | | | board: ls102xa: Fix ICID setupVincent Siles2016-06-031-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS102A ref manual dictates that ICID have to be written to the MSB of the ICID register, not to the LSB. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com>
| * | | | board/freescale: Update ddr clk_adjustShengzhou Liu2016-06-0313-172/+172
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates clk_adjust to actual value for boards with T-series and LS-series SoCs to match the setting of clk_adjust in latest ddr driver. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-06-0319-380/+415
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| * | | ARM: tegra: add p2771-0000 board supportStephen Warren2016-05-314-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | P2771-0000 is a P3310 CPU board married to a P2597 I/O board. The combination contains SoC, DRAM, eMMC, SD card slot, HDMI, USB micro-B port, Ethernet, USB3 host port, SATA, PCIe, and two GPIO expansion headers. Currently, due to U-Boot's level of support for Tegra186, the only features supported by U-Boot are the console UART and the on-board eMMC. Additional features will be added over time. U-Boot has so far been tested by replacing the kernel image on the device with a U-Boot binary. It is anticipated that U-Boot will eventually replace the CCPLEX bootloader binary, as on previous chips. This hasn't yet been tested. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | ARM: tegra: use DT bindings for GPIO namingStephen Warren2016-05-3115-380/+381
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | There are currently many places that define the list of all Tegra GPIOs; the DT binding header and custom Tegra-specific header file gpio.h. Fix the redundancy by replacing everything with the DT binding header file. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-06-027-0/+1425
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| * | | arm: socfpga: Add samtec VIN|ING boardMarek Vasut2016-06-017-0/+1425
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for board based on the popular Altera Cyclone V SoC. This board has the following properties: - 1 GiB of DRAM - 1 Gigabit ethernet - 1 USB gadget port - 1 USB host port with an on-board hub - 2 QSPI NORs connected to the Cadence QSPI core - Multiple I2C EEPROMs and one I2C temperature sensor Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com> --- V2: Update the defconfig as per Tom's request
* | | ARM: k2g: Configure reset mux to device resetLokesh Vutla2016-06-021-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BOOTCFG_RSTMUX8 register controls the reset mux associated with the ARM. Timer5(dedicated to ARM) when used as WatchDog timer, the events it generates are routed to the above mux. Following are the 3 events that can controlled bt the reset mux: - Device Reset - An interrupt to the ARM_GIC - An interrupt to the ARM_GIC followed by a device reset. Right now to give a default watchdog behaviour "Device reset" is being selected. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
* | | arm: am57xx: Fix alignment where necessaryKeerthy2016-06-021-45/+45
| | | | | | | | | | | | | | | | | | This just fixes alignment for better readability. Signed-off-by: Keerthy <j-keerthy@ti.com>
* | | arm: am57xx: Fix omap_vcores assignment for am572x-idkKeerthy2016-06-021-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently omap_vcores is wrongly assigned a default value of beagle_x15_volts. Hence populating a new structure for am572x-idk and assigning it to omap_vcores in the vcores_init function. Fixes: c020d355c45ed40fe12a ("board: ti: am57xx: Add support for am572x idk in SPL") Reported-by: Suman Anna <s-anna@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com>
* | | ARM: DRA7: Consolidate voltage macros across different SoCsAnna, Suman2016-06-021-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The voltage values for each voltage domain at an OPP is identical across all the SoCs in the DRA7 family. The current code defines one set of macros for DRA75x/DRA74x SoCs and another set for DRA72x macros. Consolidate both these sets into a single set. This is done so as to minimize the number of macros used when voltage values will be added for other OPPs as well. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | ARM: DRA7: Define common macros for efuse register offsetsAnna, Suman2016-06-021-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define a set of common macros for the efuse register offsets (different for each OPP) that are used to get the AVS Class 0 voltage values and ABB configuration values. Assign these common macros to the register offsets for OPP_NOM by default for all voltage domains. These common macros can then be redefined properly to point to the OPP specific efuse register offset based on the desired OPP to program a specific voltage domain. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | ARM: AM57xx: AM43xx: Fix USB hostRoger Quadros2016-06-022-57/+55
|/ / | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_USB_XHCI_OMAP can be set for host mode without setting CONFIG_USB_DWC3 which is meant for gadget mode only. board_usb_init() was not being defined for CONFIG_USB_XHCI_OMAP resulting in a data abort on usb start. Define board_usb_init() for CONFIG_USB_XHCI_OMAP case. Move gadget specific handling to within CONFIG_USB_DWC3. Fixes: 6f1af1e358b7 ("board: ti: invoke clock API to enable and disable clocks") Signed-off-by: Roger Quadros <rogerq@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-3111-7/+97
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| * | mips: ath79: ap143: Reset ethernet on bootWills Wang2016-05-311-0/+2
| | | | | | | | | | | | | | | | | | This patch reset the ethernet controller for ap143 board Signed-off-by: Wills Wang <wills.wang@live.com>
| * | mips: ath79: ap121: Enable ethernetWills Wang2016-05-311-0/+2
| | | | | | | | | | | | | | | | | | | | | This patch enable network function for ap121 board. Signed-off-by: Wills Wang <wills.wang@live.com> Acked-by: Marek Vasut <marex@denx.de>
| * | MIPS: Split I & D cache line size configPaul Burton2016-05-317-7/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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