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* ARM: zynq: Remove sparse warningsMichal Simek2014-05-141-7/+9
| | | | | | | | | | | | | | Warnings: board/xilinx/zynq/board.c:17:13: warning: symbol 'fpga' was not declared. Should it be static? board/xilinx/zynq/board.c:20:13: warning: symbol 'fpga010' was not declared. Should it be static? board/xilinx/zynq/board.c:21:13: warning: symbol 'fpga015' was not declared. Should it be static? board/xilinx/zynq/board.c:22:13: warning: symbol 'fpga020' was not declared. Should it be static? board/xilinx/zynq/board.c:23:13: warning: symbol 'fpga030' was not declared. Should it be static? board/xilinx/zynq/board.c:24:13: warning: symbol 'fpga045' was not declared. Should it be static? board/xilinx/zynq/board.c:25:13: warning: symbol 'fpga100' was not declared. Should it be static? board/xilinx/zynq/board.c:120:5: warning: symbol 'board_mmc_init' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: xilinx: Avoid CamelCase for in Xilinx_descMichal Simek2014-05-131-7/+7
| | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Add OF ram initialization supportMichal Simek2014-03-041-1/+21
| | | | | | Read ram size directly from DTB. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Move bootmode to headersMichal Simek2014-02-191-6/+0
| | | | | | These numbers will be reused by SPL. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Use board_eth_init if CMD_NET is not enabledMichal Simek2014-02-191-2/+0
| | | | | | | board_eth_init can be also called in cases where CMD_NET is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Do not explicitely enable icacheMichal Simek2014-02-191-2/+0
| | | | | | icache is already enabled by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: zynqpl: Add support for zc7015 deviceMichal Simek2014-02-061-0/+4
| | | | | | Just extend tables with this new device. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* zynq: Add support to find bootmodeJagannadha Sutradharudu Teki2014-01-101-0/+25
| | | | | | | | | | | Added support to find the bootmodes by reading slcr bootmode register. this can be helpful to autoboot the configurations w.r.t a specified bootmode. Added this functionality on board_late_init as it's not needed for normal initializtion part. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-141-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'Albert ARIBAUD2013-09-031-0/+19
|\ | | | | | | | | | | | | Conflicts: arch/arm/include/asm/arch-zynq/hardware.h The conflict above was trivial and solved during merge.
| * zynq: Enable axi ethernet and emaclite driver initializationMichal Simek2013-08-121-0/+17
| | | | | | | | | | | | | | | | Zynq can have axi ethernet and emaclite IPs in programmable logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * zynq: Add new ddrc driver for ECC supportMichal Simek2013-08-121-0/+2
| | | | | | | | | | | | | | | | | | | | The first 1MB is not initialized by first stage bootloader. Check if memory is setup to 16bit mode and ECC is enabled. If it is, clear the first 1MB. Also u-boot should report only the half size of memory. Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | fpga: zynqpl: Add support for zc7100 device.Michal Simek2013-08-121-0/+4
|/ | | | | | | | | | - Add support for zc7100 device. - FPGA programming on few of the SOC(zc7100) takes more than 1sec, hence increased the program time by 4sec to sync' all soc's. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* fpga: zynq: Add support for loading bitstreamMichal Simek2013-05-061-0/+37
| | | | | | | | | | | | | Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* mmc: Add support for Xilinx Zynq sdhci controllerMichal Simek2013-04-301-0/+17
| | | | | | | Add support for SD, MMC and eMMC card on Xilinx Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* net: gem: Preserve clk on emio interfaceDavid Andrey2013-04-301-2/+2
| | | | | | | | | | | Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL if the Ethernet interface is connect on EMIO Do not enable emio for this standard board configuration for now. Signed-off-by: David Andrey <david.andrey@netmodule.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* net: gem: Pass phy address to initDavid Andrey2013-04-301-2/+4
| | | | | | | | | Pass the PHY address to the driver init to allow parallel use of both interfaces Signed-off-by: David Andrey <david.andrey@netmodule.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* zynq: Move macros to hardware.hMichal Simek2013-04-301-3/+9
| | | | | | | | Add all fixed addresses to hardware.h and change petalinux configuration to support this. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* xilinx: Add new Zynq boardMichal Simek2012-10-041-0/+54
Add support for Xilinx Zynq board. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Marek Vasut <marex@denx.de> CC: Joe Hershberger <joe.hershberger@gmail.com>
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