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* mx6: mx6qsabrelite/nitrogen6x: Remove incorrect setting of gpio CS signalAndrew Gabbasov2013-06-031-1/+0
| | | | | | | | | | | | | | | | | The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro (shifted and or'ed with chip select), so it's incorrect to pass that macro directly as an argument to gpio_direction_output() call. Also, SPI driver sets the direction and initial value of a gpio, used as a chip select signal, before any actual activity happens on the bus. So, it is safe to just remove the gpio_direction_output call, that works incorrectly, thus making no effect, anyway. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by: Robert Winkler <robert.winkler@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* imx: iomux-v3: Include PKE and PUE to pad control pull definitionsBenoît Thébaudeau2013-04-281-17/+13
| | | | | | | | | | | | | | | | | PUE requires PKE to mean something, as do pull values with PUE, so do not compell users to explicitly use PKE and PUE everywhere. This is also what is done on Linux and what has already been done for i.MX51. By the way, remove some unused pad control definitions. There is no change of behavior. Note that SPI_PAD_CTRL was defined by several boards with a pull value, but without PKE or PUE, which means that no pull was actually enabled in the pad. This might be a bug in those boards, but this patch does not change the behavior, so it just removes the meaningless pull value from those definitions. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* i.MX6: mx6qsabrelite: README: don't pass chip-select to sf probe commandJavier Martinez Canillas2013-04-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | board/freescale/mx6qsabrelite/README explain a procedure to update the SPI-NOR on the SabreLite board without Freescale manufacturing tool but following this procedure leads to both "sf erase" and "sf write" failing on a mx6qsabrelite board: MX6QSABRELITE U-Boot > sf probe 1 MX6QSABRELITE U-Boot > sf erase 0 0x40000 SPI flash erase failed MX6QSABRELITE U-Boot > sf write 0x10800000 0 0x40000 SPI flash write failed This is because the chip-select 1 is wrong and the correct value is 0x7300. Since commit c1173bd0 ("sf command: allow default bus and chip selects") the chip-select and bus arguments for the sf probe command are optional so let's just remove it and use "sf probe" instead. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
* mx6: Fix get_board_rev() for the mx6 solo caseFabio Estevam2013-04-031-5/+0
| | | | | | | | | | | | | | | | | | When booting a Freescale kernel 3.0.35 on a Wandboard solo, the get_board_rev() returns 0x62xxx, which is not a value understood by the VPU (Video Processing Unit) library in the kernel and causes the video playback to fail. The expected values for get_board_rev are: 0x63xxx: For mx6quad/dual 0x61xxx: For mx6dual-lite/solo So adjust get_board_rev() accordingly and make it as weak function, so that we do not need to define it in every mx6 board file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a boardAbbas Raza2013-04-031-0/+3
| | | | | | | | | | | | | | | | | | Maximum bus width supported by some i.MX6 boards is not 8bit like others. In case where both host controller and card support 8bit transfers, they agree to communicate on 8bit interface while some boards support only 4bit interface. Due to this reason the mmc 8bit default mode fails on these boards. To rectify this, define maximum bus width supported by these boards (4bit). If max_bus_width is not defined, it is 0 by default and 8bit width support will be enabled in host capabilities otherwise host capabilities are modified accordingly. It is tested with a MMCplus card. Signed-off-by: Abbas Raza <Abbas_Raza@mentor.com> cc: stefano Babic <sbabic@denx.de> cc: Andy Fleming <afleming@gmail.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
* mx6qsabrelite: README: No need to pass 'u-boot.imx'Fabio Estevam2013-04-031-1/+1
| | | | | | | The u-boot.imx binary is generated by default, so no need to pass it in the 'make' line. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6: Provide a structure for accessing HDMI registersFabio Estevam2013-03-071-17/+11
| | | | | | | | Provide a structure for accessing HDMI registers, so that we can use proper read/write accessors. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX6: consolidate pad names for multi-CPU boardsEric Nelson2013-03-071-95/+95
| | | | | | | | | | | Rename all i.MX6 pad declarations to MX6_PAD_x, so a board may support either i.MX6Quad/Dual (MX6Q) or i.MX6Dual-Lite/Solo (MX6DL) by including the proper header. Boards mx6qarm2, mx6qsabreauto, mx6qsabrelite, and mx6qsabresd only support MX6Q, so they include mx6q_pins.h. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX6: mx6qsabrelite: indent with tabsEric Nelson2013-03-071-53/+53
| | | | | | | This patch has no functional changes and simply replaces leading spaces with tabs. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx6qsabrelite: search mii phy address 4-7Troy Kisky2013-01-281-3/+21
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* i.MX6: mx6qsabrelite: Add splash screen supportEric Nelson2012-10-161-0/+329
| | | | | | | | | | | | | | | | | | | | | Adds support for HDMI, two LVDS panels and one RGB panel to the SABRE-Lite board. Displays supported: HDMI - 1024 x 768 for maximum compatibility Hannstar-XGA - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1) wsvga-lvds - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600) wvga-rgb - 800 x 480 RGB (Boundary p/n Nit6X_800x480) Since the ipuv3_fb display driver currently supports only a single display, this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect or the I2C touch controller of the LVDS and RGB displays in the priority listed above. Setting 'panel' environment variable to one of the names above will override auto-detection. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* i.MX: declare iomux_v3_cfg_t arrays as constEric Nelson2012-10-161-9/+9
| | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mxc: Fix SDHC multi-instance clockBenoît Thébaudeau2012-10-161-0/+3
| | | | | | | | | | | | | | | | | | On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
* mx6q: Factor out common DDR3 init codeFabio Estevam2012-10-151-170/+0
| | | | | | | Factor out common DDR3 initialization code, allowing easier maintainance of such scripts. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6qsabrelite:Use IMX_GPIO_NR MacroAshok Kumar Reddy2012-09-101-12/+12
| | | | Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
* fsl_esdhc: Remove cache snooping for i.MXBenoît Thébaudeau2012-09-011-2/+2
| | | | | | | | | | | | | | | The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so disable it globally for this architecture. This avoids setting no_snoop for all i.MX boards, and it prevents setting a reserved bit of a reserved register if fsl_esdhc_mmc_init() is used on i.MX, like in arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init(). Since no_snoop was only used on i.MX, get rid of it BTW. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com>
* MX: Set a common gpio.h for all i.MXStefano Babic2012-09-011-14/+14
| | | | | | | | | Each i.MX has its own gpio.h, defining the same structure. The internal GPIO controller has the same layout (at least for the register used by u-boot) and can be shared. Signed-off-by: Stefano Babic <sbabic@denx.de> Tested-by: Matt Sealey <matt@genesi-usa.com>
* mx6qsabrelite: add boot_mode supportTroy Kisky2012-09-011-0/+14
| | | | | | | This allows a watchdog reset to start the ROM's usb downloader, or boot from an sdcard. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* iomux: move IOMUX_GPR13_xxx definesTroy Kisky2012-09-011-0/+1
| | | | | | | Move mx6 specific defines to arch-mx6 directory. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6qsabrelite: add i2c multi-bus supportTroy Kisky2012-07-311-4/+46
| | | | | | | This includes bus recovery support. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Jason Liu <r64343@freescale.com>
* i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky2012-07-311-2/+2
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* doc: cleanup - move board READMEs into respective board directoriesWolfgang Denk2012-07-291-0/+72
| | | | | | | | | | | | | | | | Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Jason Jin <jason.jin@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* mx6qsabrelite: add i2c supportTroy Kisky2012-07-111-0/+11
| | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6: Avoid writing to read-only bits in imximage.cfgVikram Narayanan2012-07-071-1/+1
| | | | | If in case this is valid according to the latest datasheet, ignore this patch. Acked-by: Marek Vasut <marex@denx.de>
* mx6qsabrelite: Remove unused SOBJSFabio Estevam2012-07-071-4/+3
| | | | | | | | There is no .S file in this directory, so just remove SOBJS. Cc: Jason Liu <r64343@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Jason Liu <r64343@freescale.com>
* i.MX6: mx6q_sabrelite: add SATA bindingsEric Nelson2012-05-151-0/+31
| | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: stefano Babic <sbabic@denx.de>
* i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flowEric Nelson2012-05-151-2/+120
| | | | | | | | | Uses the 'magic_keys' idiom as described in doc/README.kbd: http://lists.denx.de/pipermail/u-boot/2012-April/122502.html Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6qsabrelite: No need to set the direction for GPIO3_23 againFabio Estevam2012-05-151-1/+1
| | | | | | | | | | There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is already established. Use gpio_set_value() for changing the GPIO output then. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Dirk Behme <dirk.behme@googlemail.com>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-161-28/+28
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAGEric Nelson2012-03-271-0/+5
| | | | | | | | | | | | | | This is needed to support Freescale-supplied userspaces. At the moment, both the IPU and VPU libraries provided by Freescale in the "imx-lib" package contain routines which scrape the system revision from /proc/cpuinfo. In the VPU library, this information is used to load the proper firmware, allowing a single binary to be used across various i.MX processors. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use ↵Eric Nelson2012-03-271-4/+4
| | | | | | for environment Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* mx6qsabrelite: add and enable USB Host 1 supportWolfgang Grandegger2012-03-261-0/+18
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Signed-off-by: Wolfgang Grandegger <wg@denx.de>
* i.mx6q: mx6qsabrelite: Update the network configurationTroy Kisky2012-02-271-33/+14
| | | | | | | | | | | | | | | | | | | Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* mx6q: mx6qsabrelite: Provide default serial flash bus and chip-selectEric Nelson2012-02-271-1/+1
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platformEric Nelson2012-02-272-1/+26
| | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* i.mx6q: mx6qsabrelite: Add the ethernet function supportJason Liu2012-02-121-0/+108
| | | | | | | Signed-off-by: Jason Liu <jason.hui@linaro.org> Signed-off-by: Eric Miao <eric.miao@linaro.org> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de>
* i.mx6q: mx6qsabrelite: Setup uart1 pinmuxTroy Kisky2012-02-121-0/+6
| | | | | | | | | | | This allows the Linux kernel to use UART1 before pinmux support is added for UART1 Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Jason Liu <jason.hui@linaro.org> CC: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite boardJason Liu2012-01-163-0/+363
Add the initial support for Freescale i.MX6Q Sabre Lite board Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Jason Liu <jason.hui@linaro.org> CC: Eric Nelson <eric.nelson@boundarydevices.com>
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