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* powerpc/mpc8610hpcd: set pci1_hose.config_table after fsl_setup_hoseZhao Chenhui2011-09-091-6/+5
| | | | | | | | The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC8xxx: drop redundant boot messagesWolfgang Denk2011-07-291-1/+1
| | | | | | | | | | | | | | | Current code would print RAM size information like this: DRAM: DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off) Turn a number of printf()s into debug() to get rid of the redundant "DDR: " string like this: DRAM: 256 MiB (DDR1, 64-bit, CL=2, ECC off) Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: display boot device and bank on the MPC8610 HPCDTimur Tabi2011-07-111-2/+23
| | | | | Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe codeKumar Gala2011-01-141-57/+15
| | | | | | | | Remove duplicated code in MPC8610HPCD board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configuredKumar Gala2011-01-141-7/+4
| | | | | | | Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: Clean up printing of PCI boot infoPeter Tyser2010-11-141-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org
* fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo ↵Timur Tabi2010-09-211-5/+1
| | | | | | | | | | features The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO). So delete the 8610-specific code and use the built-in features instead. Signed-off-by: Timur Tabi <timur@freescale.com>
* powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliasesKumar Gala2010-07-201-10/+2
| | | | | | | | | | | Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: improve the PIXIS code and fix a few bugsTimur Tabi2010-04-071-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor and document the Freescale PIXIS code, used on most 85xx and 86xx boards. This makes the code easier to read and more flexible. Delete pixis.h, because none of the exported functions were actually being used by any other file. Make all of the functions in pixis.c 'static'. Remove "#include pixis.h" from every file that has it. Remove some unnecessary #includes. Make 'pixis_base' into a macro, so that we don't need to define it in every function. Add "while(1);" loops at the end of functions that reset the board, so that execution doesn't continue while the reset is in progress. Replace in_8/out_8 calls with clrbits_8, setbits_8, or clrsetbits_8, where appropriate. Replace ulong/uint with their spelled-out equivalents. Remove unnecessary typecasts, changing the types of some variables if necessary. Add CONFIG_SYS_PIXIS_VCFGEN0_ENABLE and CONFIG_SYS_PIXIS_VBOOT_ENABLE to make it easier for specific boards to support variations in the PIXIS registers sets. No current boards appears to need this feature. Fix the definition of CONFIG_SYS_PIXIS_VBOOT_MASK for the MPC8610 HPCD. Apparently, "pixis_reset altbank" has never worked on this board. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc86xx: set the DDR BATs after calculating true DDR sizeTimur Tabi2010-03-301-0/+2
| | | | | | | | | | | | | | | | | | | | After determining how much DDR is actually in the system, set DBAT0 and IBAT0 accordingly. This ensures that the CPU won't attempt to access (via speculation) addresses outside of actual memory. On 86xx systems, DBAT0 and IBAT0 (the BATs for DDR) are initialized to 2GB and kept that way. If the system has less than 2GB of memory (typical for an MPC8610 HPCD), the CPU may attempt to access this memory during speculation. The zlib code is notorious for generating such memory reads, and indeed on the MPC8610, uncompressing the Linux kernel causes a machine check (without this patch). Currently we are limited to power of two sized DDR since we only use a single bat. If a non-power of two size is used that is less than CONFIG_MAX_MEM_MAPPED u-boot will crash. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* PCIe, USB: Replace 'end point' references with 'endpoint'Peter Tyser2010-01-171-2/+2
| | | | | | | | | When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* ppc/86xx: Clean up MPC8610 HPCD PCI setup codeKumar Gala2010-01-051-137/+62
| | | | | | | Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Remove redundant code in initdramBecky Bruce2009-11-041-5/+0
| | | | | | | | The same code exists both inside an #ifdef and outside of it. Remove the extra code for all the 86xx boards. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8610hpcd: Use common 86xx fdt fixup codePeter Tyser2009-09-241-13/+1
| | | | | | | | Using the common 86xx fdt fixups removes some board-specific code and should make the mpc8610hpcd easier to maintain in the long run. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/8xxx: Refactor code to determine if PCI is enabled & agent/hostKumar Gala2009-09-081-7/+5
| | | | | | | | | | | Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_initKumar Gala2009-08-281-9/+0
| | | | | | | | Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_initKumar Gala2009-08-281-9/+3
| | | | | | | | Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boardsKumar Gala2009-07-221-11/+14
| | | | | | | The pixis code used in8/out8 all over the place. Replace it with in_8/out_8 macros. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fieldsPeter Tyser2009-07-221-2/+2
| | | | | | | | Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match the 86xx user's manual and other Freescale architectures Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_pci: Move prototypes into fsl_pci.h and remove explicit externsKumar Gala2009-04-041-6/+0
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.hKumar Gala2009-04-041-1/+1
| | | | | | | Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 86xx: Reset updatePeter Tyser2009-02-161-0/+8
| | | | | | | | | | Update the 86xx reset sequence to try executing a board-specific reset function. If the board-specific reset is not implemented or does not succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard reset procedure than the previous method and allows all board peripherals to be reset if needed. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* mpc8610hpcd: Fix PCI mapping conceptsBecky Bruce2009-01-131-6/+6
| | | | | | | | | Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
* Merge commit 'wd/master'Jon Loeliger2008-11-101-1/+1
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| * Coding Style cleanup, update CHANGELOGWolfgang Denk2008-11-021-1/+1
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | 86xx: Make dram_size a phys_size_tBecky Bruce2008-11-031-3/+3
|/ | | | | | It's currently a long and should be phys_size_t. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* 86xx: remove the unused ddr_enable_ecc in the board fileDave Liu2008-10-301-11/+0
| | | | | | | | | The DDR controller of 86xx processors have the ECC data init feature, and the new DDR code is using the feature, we don't need the way with DMA to init memory again. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Kumar Gala <kumar.gala@freescale.com>
* 86xx: Convert all fsl_pci_init users to new APIsKumar Gala2008-10-241-54/+24
| | | | | | | | | | | | Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> Acked-by: Jon Loeliger <jdl@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-181-37/+37
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Introduce netdev.h header file and remove externsBen Warren2008-09-021-6/+2
| | | | | | | This addresses all drivers whose initializers have already been moved to board_eth_init()/cpu_eth_init(). Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Moved initialization of ULI526X Ethernet driver to board code.Ben Warren2008-08-261-0/+10
| | | | | | | The only board using this driver is the Freescale MPC8610HPCD board. Removed initialization for the driver from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* FSL DDR: Convert MPC8610HPCD to new DDR code.Jon Loeliger2008-08-271-1/+2
| | | | | Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Fix some more print() format errors.Wolfgang Denk2008-07-111-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* MPC8610HPCD: Report board id, board version and fpga version.Kumar Gala2008-06-191-1/+4
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Change initdram() return type to phys_size_tBecky Bruce2008-06-121-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* mpc86xx: Removed unused and unconfigured memory test code.Jon Loeliger2008-05-191-36/+0
| | | | | | Besides, other common code exists. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docsKumar Gala2008-04-291-1/+1
| | | | | | | All the 85xx and 86xx UM describe the register as timing_cfg_3 not as ext_refrec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Remove erroneous or extra spd.h #includers.Jon Loeliger2008-03-051-5/+1
| | | | | | | | | | Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 86xx: Fix GUR PCI config registers properly.Jon Loeliger2008-02-201-2/+4
| | | | | | | | | | | | | | Back in commit 975a083a5ef785c414b35f9c5b8ae25b26b41524 where I tried to "8610HPCD: Fix typos in two PCI setup registers", I botched it due to not realizing that 8610 and 8641 had different Global Utility Register defintions, one of which was like 85xx, and the other wasn't. Correct this problem by introducing two symbols, one for each 86xx SoC, but neither of which is named anything like 85xx. My bad. Lovely Wednesday with git bisect. You know. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 8610HPCD: Fix typos in two PCI setup registers.Jon Loeliger2008-02-191-3/+2
| | | | | | | | | The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA were erroneously present as 85xx names and values, leftover from the clone wars. Fix this by removing the 85xx cruft from the 86xx codebase. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* Convert MPC8610HPCD to use libfdt.Jon Loeliger2008-01-091-33/+40
| | | | | | | | | Assumes the presence of the aliases node in the DTS to locate the pci and serial nodes for fixups. Use consistent fdtaddr and fdtfile in environment variables. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 8610: Fix lingering compile warnings.Jon Loeliger2008-01-091-1/+4
| | | | | | Turn off DEBUG. Signed-off-by: Jon Loeliger <jdl@freescale.com>
* 8610: Add 8610 DIU display driverYork Sun2007-11-071-3/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1280x1024 and 1024x768 @ 32 bpp are supported now. DVI, Single-link LVDS, Double-link LVDS are all supported. Environmental variable "monitor" is used to specify monitor port. A new command "diufb" is introduced to reinitialize monitor and display a BMP file in the memory. So far, 1-bit, 4-bit, 8-bit and 24-bit BMP formats are supported. diufb init - initialize the diu driver Enable the port specified in the environmental variable "monitor" diufb addr - display bmp file in memory. The bmp image should be no bigger than the resolution, 1280x1024 for DVI and double-link LVDS, 1024x768 for single-link LVDS. Note, this driver allocate memory but doesn't free it after use It is written on purpose -- to avoid a failure of reallocation due to memory fragement. ECC of DDR is disabled for DIU performance. L2 data cache is also disabled. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Jon loeliger <jdl@freescale.com>
* Initial mpc8610hpcd board files.Jon Loeliger2007-10-171-0/+507
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Jon Loeliger <jdl@freescale.com>
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