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* x86: Add FDT SPI node for linkSimon Glass2013-03-191-0/+11
| | | | | | Add a memory-mapped 8GB SPI chip. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Adjust link device tree include fileSimon Glass2013-03-041-1/+1
| | | | | | | | This is currently set to coreboot.dtsi, but we cannot support this on old device tree compilers (dtc <= 1.3), so adjust to use ARCH_CPU_DTS to let the Makefile preprocessor sort this out. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: fdt: Create basic .dtsi file for corebootSimon Glass2012-12-062-12/+30
| | | | | | | | This contains just the minimum information for a coreboot-based board. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add a minimal device tree for alex x86Gabe Black2012-11-301-0/+30
The device tree now includes the necessary console configuration information. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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