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* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* gpio: Add driver for Altera's PIO coreJoachim Foerster2011-10-281-0/+8
| | | | | | | | | | | | This driver may handle multiple PIO cores and thus needs to be setup by calling the altera_pio_init() function within the early board setup routine. The driver comes with some extras, see below the copyleft header. Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com> Tested-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* altera_tse: Add support for dedicated descriptor memoryJoachim Foerster2011-10-261-1/+9
| | | | Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
* nios2: reset cfi flash before reading envThomas Chou2011-04-081-0/+16
| | | | | | | | | | Flash might be in unknown state when u-boot is started with jtag. And got wrong env data. So reset it in board early init. We cannot use generic cfi flash routines, because flash_init() is not run yet. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* nios2: add nios2-generic boardThomas Chou2010-04-241-0/+68
This is a generic approach to port u-boot for nios2 boards. You may find the usage of this approach on the nioswiki, http://nioswiki.com/DasUBoot A fpga parameter file, which contains base address information and drivers declaration, is generated from Altera's hardware system description sopc file using tools. The example fpga parameter file is compatible with EP1C20, EP1S10 and EP1S40 boards. So these boards can be removed after this commit. Though epcs controller is removed to cut the dependency of altera_spi driver. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
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