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* x86: Remove ISR timerSimon Glass2013-05-132-119/+0
| | | | | | | | This is no longer used since we prefer the more accurate TSC timer, so remove the dead code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Add TSC timerSimon Glass2013-05-132-0/+104
| | | | | | | | | | | | | | This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass <sjg@chromium.org>base Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Rationalise kernel booting logic and bootstageSimon Glass2013-05-132-12/+7
| | | | | | | | | | The 'Starting linux' message appears twice in the code, but both call through the same place. Unify these and add calls to bootstage to mark the occasion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Michael Spang <spang@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Declare global_data pointer when it is usedSimon Glass2013-05-134-0/+8
| | | | | | | | Several files use the global_data pointer without declaring it. This works because the declaration is currently a NOP. But still it is better to fix this so that x86 lines up with other archs. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Remove legacy board init codeSimon Glass2013-05-134-533/+0
| | | | | | | Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Remove unused bios/pci codeSimon Glass2013-05-133-359/+0
| | | | | | | Graeme Russ pointed out that this code is no longer used. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* lib: consolidate hang()Andreas Bießmann2013-05-011-7/+0
| | | | | | | | | Delete all occurrences of hang() and provide a generic function. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> [trini: Modify check around puts() in hang.c slightly] Signed-off-by: Tom Rini <trini@ti.com>
* x86: Move PCI init before SPI initSimon Glass2013-03-191-4/+4
| | | | | | | It is possible that our PCI bus will provide the SPI controller, so change the init order to make this work. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Enable generic board supportSimon Glass2013-03-151-0/+3
| | | | | | | This enables generic board support so that x86 boards can define CONFIG_SYS_GENERIC_BOARD. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Use sections header to obtain link symbolsSimon Glass2013-03-153-0/+3
| | | | | | | These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org>
* Introduce generic pre-relocation board_f.cSimon Glass2013-03-153-6/+6
| | | | | | | | | | | | This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* x86: Add error checking to x86 relocation codeSimon Glass2013-03-041-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This does not actually change normal behaviour, but adds a check that should detect corruption of relocation data (e.g. by using BSS data prior to relocation). Also add additional debugging output when enabled. During this investigation, two situations have been seen: 1. calculate_relocation_address(): uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start; turns into 111166f: b8 83 c4 17 01 mov $0x117c483,%eax whih is beyond the end of bss: 0117b484 g .bss 00000000 __bss_end Somehow the __bss_end here is 255 bytes ahead. 2. do_elf_reloc_fixups(): uintptr_t size = (uintptr_t)&__bss_end - (uintptr_t)&__text_start; Here the __text_start is 0 in the file: 1111d9f: bb a0 e0 13 01 mov $0x113e0a0,%ebx 1111da4: 81 ef 00 00 00 00 sub $0x0,%edi As it happens, both of these are in pre-relocation code. For these reasons we silent check and ignore bad relocations. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Support relocation of FDT on start-upSimon Glass2013-03-044-2/+42
| | | | | | | With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add an __end symbol to signal the end of the U-Boot binarySimon Glass2013-03-041-1/+1
| | | | | | | With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Permit bootstage and timer data to be used prior to relocationSimon Glass2013-03-041-5/+4
| | | | | | | | | It is useful to be able to access the timer before U-Boot has relocated so that we can fully support bootstage. Add new global_data members to support this. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add function to get top of usable ramSimon Glass2013-03-041-10/+18
| | | | | | | | | | | | | The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Remove unused real mode codeSimon Glass2013-02-1410-1758/+0
| | | | | | | This code is pretty old and we want to support only 32-bit systems now. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Build vga video code only if CONFIG_VIDEO_VGA is definedSimon Glass2012-12-061-2/+2
| | | | | | | When running from coreboot we don't want this code, so make it optional. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add support for CONFIG_OF_CONTROLGabe Black2012-12-062-0/+36
| | | | | | | Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add CONFIG_DELAY_ENVIRONMENT to delay environment loadingStefan Reinauer2012-12-061-1/+27
| | | | | | | | | | | | | | | | This option delays loading of the environment until later, so that only the default environment will be available to U-Boot. This can address the security risk of untrusted data being used during boot. When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a run-time way of enabling loadinlg of the environment. Add this to the fdt as /config/delay-environment. Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/ Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
* x86: Make calculate_relocation_address an overridable functionGabe Black2012-12-061-1/+2
| | | | | | | | | Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Make the upper bound on relocated symbols closed instead of openGabe Black2012-12-061-1/+1
| | | | | | This seems to be a bug. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Reorder x86's post relocation memory layoutGabe Black2012-12-061-3/+4
| | | | | | | | | | | | | | | | | | | | | | | This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Initialise SPI if enabledGabe Black2012-12-062-0/+12
| | | | | | | | If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org>
* x86: Implement arch_phys_memset so that it can wipe memory above 4GBGabe Black2012-12-062-0/+229
| | | | | | | | | | | | | | | | | | | | | | Implement arch_phys_memset so that it can set memory at physical addresses above 4GB using PAE paging. Because there are only 5 page tables in PAE mode, 1 PDPT and 4 PDTs, those tables are statically allocated in the BSS. The tables must be 4K page aligned and are declared that way, and because U-Boot starts as 4K aligned and the relocation code relocates it to a 4K aligned address, the tables work as intended. While paging is turned on, all 4GB are identity mapped except for one 2MB page which is used as the window into high memory. This way, U-Boot will continue to work as expected when running code that expects to access memory freely, but the code can still get at high memory through its window. The window is put at 2MB so that it's 2MB page aligned, low in memory to be out of the way of things U-Boot is likely to care about, and above the lowest 1MB where lots of random things live. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Fix off-by-one error in do_elf_reloc_fixups()Duncan Laurie2012-12-061-1/+1
| | | | | | | | | | The use of post-increment with a do-while loop results in the loop going one step too far when handling relocation fixups. In about 1/100 cases this would cause it to hang. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Fix indirect jmp warning in zimage.cSimon Glass2012-12-061-3/+3
| | | | | | | | | | | | | | This fixes the following warning: zimage.c:312: Warning: indirect jmp without `*' Also fixed these warnings to keep checkpatch quiet: warning: arch/x86/lib/zimage.c,311: unnecessary whitespace before a quoted newline warning: arch/x86/lib/zimage.c,312: unnecessary whitespace before a quoted newline warning: arch/x86/lib/zimage.c,313: unnecessary whitespace before a quoted newline Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Provide a function to clean up just before booting a zimageStefan Reinauer2012-12-061-0/+11
| | | | | | | | This function can be used by boards which want to do some clean-up before booting a zImage. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add a CBMEM timestamp generated right before the kernel startup.Vadim Bendebury2012-12-061-0/+6
| | | | | | | | | | To maintain the initialization state of the timestamp facility, thesq pointer to the CBMEM section containing the timestamp table should be kept in the .data section (so that it is maintained across u-boot relocation). Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add function to read time stamp counterVadim Bendebury2012-12-061-0/+17
| | | | | | | | | | | Put this function in the u-boot-x86.h header file. We could instead create timer.h perhaps. We support setting a base time, and reading the time relative to this base. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Fix typo in pcat_timer.cStefan Reinauer2012-11-301-1/+1
| | | | | | | Fix a small comment typo. Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Allow compiling out realmode/bios codeGabe Black2012-11-303-5/+10
| | | | | | | | We don't want this for coreboot, so provide a way of compiling it out. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Remove duplicate PCI initGraeme Russ2012-11-281-3/+0
| | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Put global data on the stackGraeme Russ2012-11-282-37/+2
| | | | | | | | | | Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Forward declare gd_tGraeme Russ2012-11-281-1/+1
| | | | | | | | So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* serial: Remove CONFIG_SERIAL_MULTI from remaining sourcesMarek Vasut2012-10-151-2/+0
| | | | | | | | | | | | Remove the parts depending either on disabled CONFIG_SERIAL_MULTI or ifdefs around CONFIG_SERIAL_MULTI parts since CONFIG_SERIAL_MULTI is now enabled by default. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de>
* net: move bootfile init into eth_initializeMike Frysinger2012-05-152-15/+0
| | | | | | | | All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* net: punt bd->bi_ip_addrMike Frysinger2012-05-152-11/+0
| | | | | | | | | This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* x86: Convert board_init_f_r to a processing loopGraeme Russ2012-01-043-125/+168
| | | | | | | | | | | | | | Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
* x86: Split init functions out of board.cGraeme Russ2012-01-044-221/+357
| | | | | | This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
* x86: Move relocation code out of board.cGraeme Russ2012-01-043-67/+118
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* x86: Move setup_pcat_compatibility() out of board.cGraeme Russ2012-01-042-7/+7
| | | | | | | | | This function simply does not belong in board.c -- Changes for v2: - Added commit message
* x86: Move do_go_exec() out of board.cGraeme Russ2012-01-043-27/+65
| | | | | | -- Changes for v2: - None
* CHECKPATCH: arch/x86/lib/*Graeme Russ2012-01-042-73/+122
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* x86: Allow cache before copy to RAMGraeme Russ2012-01-041-5/+10
| | | | | | -- Changes for v2: - None
* x86: Create weak init_cache() and default enable_caches() functionsGraeme Russ2012-01-041-0/+1
| | | | | | -- Changes for v2: - Tweaked commit title
* x86: Set GD_FLG_RELOC after entering in-RAM copy of U-BootGraeme Russ2012-01-041-2/+2
| | | | | | -- Changes for v2: - None
* x86: Use fs for global dataGraeme Russ2012-01-041-17/+39
| | | | | | | | | | | | | | | | | | | | | | Use the base address of the 'F' segment as a pointer to the global data structure. By adding the linear address (i.e. the 'D' segment address) as the first word of the global data structure, the address of the global data relative to the 'D' segment can be found simply, for example, by: fs movl 0, %eax This makes the gd 'pointer' writable prior to relocation (by reloading the Global Desctriptor Table) which brings x86 into line with all other arches NOTE: Writing to the gd 'pointer' is expensive (but we only do it twice) but using it to access global data members (read and write) is still fairly cheap -- Changes for v2: - Rebased against changes made to patch #3 - Removed extra indent - Tweaked commit message
* x86: Rework relocation calculationsGraeme Russ2012-01-041-12/+11
| | | | | | | | | | This commit introduces no functional changes - It simply re-arranges the calculations so that adding to them in future commits will be cleaner -- Changes for v2: - Fixed typo in title - Added commit message
* x86: Simplify Flash-to-RAM code execution transitionGraeme Russ2012-01-041-3/+22
| | | | | | | | | | | Move the relocation offset calculation out of assembler and into C. This also paves the way for the upcoming init sequence simplification by adding the board_init_f_r flash to RAM transitional function -- Changes for v2: - Added commit message - Minor adjustment to new stack address comment
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