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* x86: Remove calculate_relocation_address()Bin Meng2015-08-261-50/+1
| | | | | | | Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-181-8/+0
| | | | | | | | | | | | Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Test mtrr support flag before accessing mtrr msrBin Meng2015-01-231-1/+3
| | | | | | | | | | On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: Commit the current MTRRs before relocationSimon Glass2015-01-131-0/+8
| | | | | | | | Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Remove unnecessary find_fdt(), prepare_fdt() functionsSimon Glass2014-11-211-27/+0
| | | | | | | These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dts: re-write dts/Makefile more simply with KbuildMasahiro Yamada2014-02-191-1/+1
| | | | | | | | | | | Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* x86: Remove legacy board init codeSimon Glass2013-05-131-98/+0
| | | | | | | Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
* x86: Use sections header to obtain link symbolsSimon Glass2013-03-151-0/+1
| | | | | | | These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org>
* Introduce generic pre-relocation board_f.cSimon Glass2013-03-151-1/+1
| | | | | | | | | | | | This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* x86: Support relocation of FDT on start-upSimon Glass2013-03-041-2/+21
| | | | | | | With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add an __end symbol to signal the end of the U-Boot binarySimon Glass2013-03-041-1/+1
| | | | | | | With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add function to get top of usable ramSimon Glass2013-03-041-10/+18
| | | | | | | | | | | | | The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Add support for CONFIG_OF_CONTROLGabe Black2012-12-061-0/+29
| | | | | | | Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Make calculate_relocation_address an overridable functionGabe Black2012-12-061-1/+2
| | | | | | | | | Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Reorder x86's post relocation memory layoutGabe Black2012-12-061-3/+4
| | | | | | | | | | | | | | | | | | | | | | | This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Initialise SPI if enabledGabe Black2012-12-061-0/+9
| | | | | | | | If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org>
* x86: Put global data on the stackGraeme Russ2012-11-281-36/+1
| | | | | | | | | | Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Forward declare gd_tGraeme Russ2012-11-281-1/+1
| | | | | | | | So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* net: move bootfile init into eth_initializeMike Frysinger2012-05-151-12/+0
| | | | | | | | All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* net: punt bd->bi_ip_addrMike Frysinger2012-05-151-8/+0
| | | | | | | | | This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* x86: Convert board_init_f_r to a processing loopGraeme Russ2012-01-041-0/+75
| | | | | | | | | | | | | | Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
* x86: Split init functions out of board.cGraeme Russ2012-01-041-0/+142
This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
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