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* x86: queensbay: Implement PIRQ routingBin Meng2015-04-291-2/+37
| | | | | | | | Implement Intel Queensbay platform-specific PIRQ routing support. The chipset PIRQ routing setup is called in the arch_misc_init(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: queensbay: Avoid using PCH prefixBin Meng2015-04-291-2/+1
| | | | | | | | | | The prefix PCH was taken from ivybridge port. However Queensbay platform official document does not mention PCH. It is composed of TunnelCreek processor and Topcliff IOH chipset. For accuracy, avoid using PCH prefix in the macro. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* x86: crownbay: Add SPI flash supportBin Meng2014-12-181-0/+15
The Crown Bay board has an SST25VF016B flash connected to the Tunnel Creek processor SPI controller used as the BIOS media where U-Boot is stored. Enable this flash support. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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