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* MIPS: Abstract cache op loops with a macroPaul Burton2016-05-311-41/+18
| | | | | | | | | | | The various cache maintenance routines perform a number of loops over cache lines. Rather than duplicate the code for performing such loops, abstract it out into a new cache_loop macro which performs an arbitrary number of cache ops on a range of addresses. This reduces duplication in the existing L1 cache maintenance code & will allow for not adding further duplication when introducing L2 cache support. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* MIPS: Split I & D cache line size configPaul Burton2016-05-312-17/+9
| | | | | | | | | | | | Allow L1 Icache & L1 Dcache line size to be specified separately, since there's no architectural mandate that they be the same. The [id]cache_line_size functions are tidied up to take advantage of the fact that the Kconfig entries are always present to simply check them for zero rather than needing to #ifdef on their presence. Signed-off-by: Paul Burton <paul.burton@imgtec.com> [removed CONFIG_SYS_CACHELINE_SIZE in include/configs/pic32mzdask.h] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: Move cache sizes to KconfigPaul Burton2016-05-312-4/+4
| | | | | | | | | | | | Move details of the L1 cache line sizes & total sizes into Kconfig, defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is introduced to allow platforms to select auto-detection of cache sizes, and it defaults to being enabled if none of the cache sizes are set by the configuration (ie. sizes are all the default 0), and code is adjusted to #ifdef on that rather than on the definition of the sizes (which will always be defined even if 0). Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* MIPS: Use unchecked immediate addition/subtractionPaul Burton2016-05-211-1/+1
| | | | | | | | | | | | In MIPS assembly there have historically been 2 variants of immediate addition - the standard "addi" which traps if an overflow occurs, and the unchecked "addiu" which does not trap on overflow. In release 6 of the MIPS architecture the trapping variants of immediate addition & subtraction have been removed. In preparation for supporting MIPSr6, stop using the trapping instructions from assembly & switch to their unchecked variants. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* MIPS: bootm: Add fixup of '/memory' node.Purna Chandra Mandal2016-04-191-2/+3
| | | | | | | | | | | | MIPS arch do not update 'reg' property of /memory node. As a result Linux bootup will not work unless board.dts file contains right /memory offset-size information or board implements required memory fixup. Fixing by renaming (unused) _arch_fixup_memory_node_ to _arch_fixup_fdt_ in arch/mips/lib/bootm.c inline with ARM arch. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: Support dynamic I/O port base addressPaul Burton2016-02-012-13/+0
| | | | | | | | | | | | The existing mips_io_port_base variable isn't suitable for use early during boot since it will be stored in the .data section which may not be writable pre-relocation. Fix this by moving the I/O port base address into struct arch_global_data. In order to avoid adding this field for all targets, make this dependant upon a new Kconfig entry CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a non-zero I/O port base, so select this option only for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* mips: cache: Bulletproof the code against cornercasesMarek Vasut2016-02-011-0/+8
| | | | | | | | | | | | | | | | | | | This patch makes sure that the flush/invalidate_dcache_range() functions can handle corner-case calls like this -- invalidate_dcache_range(0, 0, 0); This call is valid and is happily produced by USB EHCI code for example. The expected behavior of the cache function(s) in this case is that they will do no operation, since the size is zero. The current implementation though has a problem where such invocation will result in a hard CPU hang. This is because under such conditions, where the start_addr = 0 and stop = 0, the addr = 0 and aend = 0xffffffe0 . The loop will then try to iterate over the entire address space, which in itself is wrong. But iterating over the entire address space might also hit some odd address which will cause bus hang. The later happens on the Atheros MIPS. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
* MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck2016-01-162-10/+10
| | | | | | | Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: use CONFIG_IS_ENABLED() everywhereDaniel Schwierzeck2015-11-061-19/+14
| | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* MIPS: bootm: rework and fix broken bootm codeDaniel Schwierzeck2015-11-061-85/+78
| | | | | | | | | | | | | | | | | | | | | The move to 'generic board' as well as changes in the generic bootm code broke the boot of FIT uImage's. Especially uImage's with additional initramfs images or FDT's do not work anymore. Refactor the bootm code to work again with the generic bootm code. Always relocate ramdisk and FDT in step 'bootm prep' because the generic bootm code does this only for legacy uImage's. Move the step 'bootm cmdline' to 'bootm prep' because the Linux kernel parameters rd_start and rd_size have to be initialized after the relocation of the ramdisk. Furthermore support the step 'bootm fake'. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MIPS: fix syntax for fdt_chosen/initrd.Govindraj Raja2015-08-211-2/+2
| | | | | | | | | | | The syntax for the fdt_chosen/initrd functions seem to deprecated in usage from MIPS bootm implementation. Third parameter is no more used in these api's Refer to : include/fdt_support.h Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com>
* MIPS: implement device-tree handover to Linux kernelDaniel Schwierzeck2015-04-241-1/+5
| | | | | | | | | | | Add device-tree handover to Linux kernel conforming with MIPS UHI [1]. Register $a0 will be set to the reserved value -2. The address of the device-tree blob will be stored as KSEG0 address in $a1. $a2 and $a3 are set to zero. [1] http://prplfoundation.org/wiki/MIPS_documentation Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: clear TagLo select 2 during cache initPaul Burton2015-01-291-2/+8
| | | | | | | | | | Current MIPS cores from Imagination Technologies use TagLo select 2 for the data cache. The architecture requires that it is safe for software to write to this register even if it isn't present, so take the trivial option of clearing both selects 0 & 2. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: allow systems to skip loads during cache initPaul Burton2015-01-291-6/+13
| | | | | | | | | | | | | Current MIPS systems do not require that loads be performed to force the parity of cache lines, a simple invalidate by clearing the tag for each line will suffice. Thus this patch makes the loads & subsequent second invalidation conditional upon the CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD option, and defines that for existing mips32 targets. Exceptions are malta where this is known to be unnecessary, and qemu-mips where caches are not implemented. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: inline mips_init_[id]cache functionsPaul Burton2015-01-291-58/+28
| | | | | | | | | | | The mips_init_[id]cache functions are small & only called once from a single callsite. Inlining them allows mips_cache_reset to avoid having to bother moving arguments around & leaves it a leaf function which is thus able to simply keep the return address live in the ra register throughout, simplifying the code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: refactor cache loops to a macroPaul Burton2015-01-291-17/+13
| | | | | | | | Reduce duplication by performing loops through cache tags using an assembler macro. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: refactor L1 cache config reads to a macroPaul Burton2015-01-291-56/+41
| | | | | | | | | Reduce duplication between reading the configuration of the L1 dcache & icache by performing both using a macro which calculates the appropriate line & cache sizes from the coprocessor 0 Config1 register. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: unify cache initialization codePaul Burton2015-01-292-0/+278
| | | | | | | | | | | | | | The mips32 & mips64 cache initialization code differs only in that the mips32 code supports reading the cache size from coprocessor 0 registers at runtime. Move the more developed mips32 version to a common arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in order to reduce duplication. The temporary registers used are shuffled slightly in order to work for both mips32 & mips64 builds. The RA register is defined differently to suit mips32 & mips64, but will be removed by a later commit in the series after further cleanup. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: unify cache maintenance functionsPaul Burton2015-01-292-0/+119
| | | | | | | | | Move the more developed mips32 version of the cache maintenance functions to a common arch/mips/lib/cache.c, in order to reduce duplication between mips32 & mips64. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add bootstage reportingDaniel Schwierzeck2015-01-211-2/+6
| | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: prepare a flattened device tree for the kernelDaniel Schwierzeck2015-01-211-2/+36
| | | | | | | | | | | | Add the initial code to prepare a flattened device tree for the kernel like relocating the FDT blob and fixing up the /chosen and /memory nodes. The final hand over to the kernel is not yet implemented. After the community agreed on the MIPS boot interface for device trees, the corresponding code will be added. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add mem, rd_start and rd_size to kernel command lineDaniel Schwierzeck2015-01-211-0/+26
| | | | | | | | If the user wants to boot a kernel without legacy environment, information like memory size, initrd address and size should be handed over to the kernel in the command line. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: refactor preparation of Linux kernel environmentDaniel Schwierzeck2015-01-211-1/+13
| | | | | | | | Move preparation of Linux kernel environment in a separate function and mark it as legacy. Add a Kconfig option to make that legacy mode configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: refactor preparation of Linux kernel command lineDaniel Schwierzeck2015-01-211-2/+14
| | | | | | | | Move preparation of Linux kernel command line in a separate function and mark it as legacy. Add a Kconfig option to make that legacy mode configurable. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: remove unused or redundant header filesDaniel Schwierzeck2014-11-271-3/+0
| | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add missing initramfs relocationDaniel Schwierzeck2014-11-271-0/+20
| | | | | | | | | The initramfs is currently only relocated if the user calls the bootm ramdisk subcommand. If bootm should be used without subcommands, the arch-specific bootm code needs to implement the relocation. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: remove board.cDaniel Schwierzeck2014-11-272-323/+0
| | | | | | | After all MIPS boards are switched to generic-board, the MIPS specific board.c can be removed. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* bd_info: remove bi_barudrate member from struct bd_infoMasahiro Yamada2014-05-121-1/+0
| | | | | | | | | | | | | | | | | gd->bd->bi_baudrate is a copy of gd->baudrate. Since baudrate is a common feature for all architectures, keep gd->baudrate only. It is true that bi_baudrate was passed to the kernel in that structure but it was a long time ago. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
* MIPS: drop incaip boardDaniel Schwierzeck2014-04-201-3/+0
| | | | | | | | | This is dead hardware and no one is interested in making the necessary changes for upcoming features like generic board or driver model. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wolfgang Denk <wd@denx.de>
* MIPS: allow use of generic boardPaul Burton2014-04-201-0/+2
| | | | | | | | This patch allows MIPS boards to make use of generic board, replacing arch/mips/lib/board.c with common/board_{f,r}.c and struct bd_info with the asm-generic version. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* MIPS: move mips_io_port_base out of board.cPaul Burton2014-04-203-6/+14
| | | | | | | | Move the definition of this variable out of arch/mips/lib/board.c in preparation for allowing use of generic board on MIPS, which will lead to this file not being compiled. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* kbuild: add CONFIG_ prefix to USE_PRIVATE_LIBGCCMasahiro Yamada2014-03-071-6/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, USE_PRIVATE_LIBGCC was defined in arch-specific config.mk and referenced in arch/$(ARCH)/lib/Makefile. We are not happy about parsing config.mk again and again. We have to keep the same behavior with a different way. By adding "CONFIG_" prefix, this macro appears in include/autoconf.mk, include/spl-autoconf.mk. (And treating USE_PRIVATE_LIBGCC as CONFIG macro is reasonable enough.) Tegra SoC family defined USE_PRIVATE_LIBGCC as "yes" in arch/arm/cpu/arm720t/tegra*/config.mk, whereas did not define it in arch/arm/cpu/armv7/tegra*/config.mk. It means Tegra enables PRIVATE_LIBGCC only for SPL. We can describe the same behavior by adding #ifdef CONFIG_SPL_BUILD # define CONFIG_USE_PRIVATE_LIBGCC #endif to include/configs/tegra-common.h. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
* mips: don't hardcode Malta env baudratePaul Burton2013-11-261-2/+4
| | | | | | | | | The baudrate passed to Linux in the environment was hardcoded at 38400. Instead pass the correct baudrate from global data, allowing Linux to correctly inherit the baudrate used by U-boot when console setup is not explicitly specified. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* qemu-malta: rename to just "malta"Paul Burton2013-11-091-6/+6
| | | | | | | | | This is in preparation for adapting this board to function correctly on a physical MIPS Malta board. The board is moved into an "imgtec" vendor directory at the same time in order to ready us for any other boards supported by Imagination in the future. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* mips: convert makefiles to Kbuild styleMasahiro Yamada2013-10-311-39/+5
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: bootm: drop obsolete Qemu specific bootm implementationDaniel Schwierzeck2013-08-132-66/+0
| | | | | | | | | | | | | | | | | | | | | | | | The Qemu specific bootm implementation was intended for a special Qemu target in Linux kernel. But this target has been dropped in v2.6.25-rc1 by commit 302922e5f6901eb6f29c58539631f71b3d9746b8 Author: Ralf Baechle <ralf@linux-mips.org> Date: Tue Jan 29 10:15:02 2008 +0000 [MIPS] Qemu: Remove platform. The Qemu platform was originally implemented to have an easily supportable platform until Qemu reaches a state where it emulates a real world system. Since the latest release Qemu is capable of emulating the MIPSsim and Malta platforms, so this goal has been reached. The Qemu plaform is also rather underfeatured so less useful than a Malta emulation. Thus the special bootm implementation is obsolete by now and can be dropped. The Qemu support in U-Boot is going to be replaced by MIPS Malta board support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add YAMON style Linux preparation/jump code for Qemu MaltaDaniel Schwierzeck2013-08-131-2/+20
| | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add support for generic relocation of init ramdisksDaniel Schwierzeck2013-08-131-2/+6
| | | | | | | | All linux kernels after v2.6 require a page-aligned location of an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to support this with the generic U-Boot relocation code. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: refactor initialisation of kernel environmentDaniel Schwierzeck2013-08-131-33/+29
| | | | | | Move initialisation of Linux environment to separate functions. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: refactor initialisation of kernel cmdlineDaniel Schwierzeck2013-08-131-47/+83
| | | | | | | Move initialisation of Linux command line to separate functions. Also add support for bootm subcommand 'cmdline'. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: add support for LMBDaniel Schwierzeck2013-08-131-0/+21
| | | | | | | | This is required for init ramdisk relocation and device tree support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: optimize kernel entry callDaniel Schwierzeck2013-08-131-7/+4
| | | | | | | Fix signature of kernel entry function. Mark the kernel entry with __noreturn for better code optimisation. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm: fix checkpatch.pl warningsDaniel Schwierzeck2013-08-131-6/+7
| | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-244-68/+4
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTMDirk Eibach2013-07-161-2/+2
| | | | | | | | MAKEALL is fine for ppc4xx and mpc85xx. Run checks were done on our controlcenterd hardware. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Andy Fleming <afleming@freescale.com>
* lib: consolidate hang()Andreas Bießmann2013-05-011-7/+0
| | | | | | | | | Delete all occurrences of hang() and provide a generic function. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> [trini: Modify check around puts() in hang.c slightly] Signed-off-by: Tom Rini <trini@ti.com>
* MIPS: board.c: remove manual relocation of env_name_specDaniel Schwierzeck2013-02-151-8/+0
| | | | | | | | Remove the manual relocation of env_name_spec. This has been missed in the previous patch series for introducing dynamic relocation on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: add dynamic relocation supportGabor Juhos2013-02-121-9/+0
| | | | | | | | | | | | | | | | | | | | | | The code handles relocation entries with the following relocation types only: mips32: R_MIPS_REL32 mips64: R_MIPS_REL+R_MIPS_64 xburst: R_MIPS_REL32 Other relocation entries are skipped without processing. The code must be extended if other relocation types must be supported. Add -pie to LDFLAGS_FINAL to generate the .rel.dyn fixup table, which will be applied to the relocated image before transferring control to it. The CONFIG_NEEDS_MANUAL_RELOC is not needed after the patch, so remove that as well. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: board.c: switch to new symbols __bss_end and __image_copy_endDaniel Schwierzeck2013-02-121-2/+3
| | | | | | | Use the newly introduced symbols __image_copy_end and __bss_end for setting up the memory area for the relocated U-Boot. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: bootm.c: add support for 'prep' and 'go' subcommandsGabor Juhos2013-01-161-2/+13
| | | | | | | | | | | The bootm command supports subcommands since long time however those subcommands are not yet usable on MIPS. The patch is based on the ARM implementation, and it adds support for the 'prep' and 'go' subcommands only. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
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