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* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2012-10-172-9/+9
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| * MIPS: don't use camel-case styleZhi-zhou Zhang2012-10-162-9/+9
| | | | | | | | | | | | Replace camel-case style with upper-case style globally. Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>
* | split AU1X00 specific code from cmd_ide.cPavel Herrmann2012-10-172-1/+33
| | | | | | | | | | | | move special case of ide_swap_read() for AU1X00 SoC into SoC-specific directory. Signed-off-by: Pavel Herrmann <morpheus.ibis@gmail.com>
* | serial: Use default_serial_puts() in driversMarek Vasut2012-10-172-16/+2
|/ | | | | | | | | | Replace the in-place ad-hoc implementation of serial_puts() within the drivers with default_serial_puts() call. This cuts down on the code duplication quite a bit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com>
* usb: lowlevel interface change to support multiple controllersLucas Stach2012-10-151-2/+2
| | | | | | | | | | | Carry an index in the lowlevel usb functions to make specify the respective usb controller. Also pass through an controller struct from lowlevel_init to the creation of the root usb device of this controller. Signed-off-by: Lucas Stach <dev@lynxeye.de> Reviewed-by: Marek Vasut <marex@denx.de>
* serial: Remove CONFIG_SERIAL_MULTI from serial driversMarek Vasut2012-10-152-64/+0
| | | | | | | | | | | | Remove the support for not-CONFIG_SERIAL_MULTI part from serial port drivers and some board files. Since CONFIG_SERIAL_MULTI is now enabled by default, that part is a dead code. Remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* serial: mips: Implement CONFIG_SERIAL_MULTI into asc serial driverMarek Vasut2012-10-151-6/+61
| | | | | | | | | | | | | Implement support for CONFIG_SERIAL_MULTI into asc serial driver. This driver was so far only usable directly, but this patch also adds support for the multi method. This allows using more than one serial driver alongside the asc driver. Also, add a weak implementation of default_serial_console() returning this driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* serial: mips: Implement CONFIG_SERIAL_MULTI into au1x00 serial driverMarek Vasut2012-10-151-10/+64
| | | | | | | | | | | | | Implement support for CONFIG_SERIAL_MULTI into au1x00 serial driver. This driver was so far only usable directly, but this patch also adds support for the multi method. This allows using more than one serial driver alongside the au1x00 driver. Also, add a weak implementation of default_serial_console() returning this driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Rini <trini@ti.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: move CONFIG_STANDALONE_LOAD_ADDR to CPU config makefilesDaniel Schwierzeck2012-08-241-0/+2
| | | | | | Prepare for upcoming MIPS64 CPU support. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* MIPS: factor out endianess flag handling to arch config.mkDaniel Schwierzeck2012-08-241-18/+1
| | | | | | This is CPU independent and should be configured architecture-wide. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* net: Fix remaining API interface breakageJoe Hershberger2012-05-231-1/+2
| | | | | | | | | | | These are all the files which use the API incorrectly but did not get built using MAKEALL -a powerpc|arm. I have no compiler for them, but the remaining issues should be far less than without this patch. Any outstanding issues are left to the maintainers of boards that use these drivers. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* MIPS: fix endianess handlingDaniel Schwierzeck2012-04-021-6/+15
| | | | | | | | | | | | | | | | | Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* MIPS: fix inconsistency in config option for cache operation modeDaniel Schwierzeck2012-04-021-1/+5
| | | | | | | | | | Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to use the new config option in dcache_enable(). Fix this to avoid inconsistencies if someone wants to disable and enable D-caches. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* usb: replace wait_ms() with mdelay()Mike Frysinger2012-03-191-14/+14
| | | | | | | | | | | | | | | | | | | | | | | Common code has a mdelay() func, so use that instead of the usb-specific wait_ms() func. This also fixes the build errors: ohci-hcd.c: In function 'submit_common_msg': /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1519:9: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1816:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1827:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1844:10: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1563:11: sorry, unimplemented: called from here /usr/local/src/u-boot/blackfin/include/usb.h:202:44: sorry, unimplemented: inlining failed in call to 'wait_ms': function body not available ohci-hcd.c:1583:9: sorry, unimplemented: called from here make[1]: *** [ohci-hcd.o] Error 1 Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Marek Vasut <marex@denx.de>
* consolidate mdelay by providing a common function for all usersAnatolij Gustschin2011-10-221-1/+0
| | | | | | | | | There are several mdelay() definitions in the driver and board code. Remove them all and provide a common mdelay() in lib/time.c. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* MIPS: mips32: fix wrong loop bound in flush_cache()Yao Cheng2011-09-031-0/+4
| | | | | | | | | | | The issue is found when calling flush_cache() with zero "size" argument. The bound of loop is miscalculated in this case and flush_cache() enters a wrong flushing loop. Signed-off-by: Yao Cheng <saturdaycoder@gmail.com> Cc: Shinya Kuribayashi <skuribay@pobox.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: make cache operation mode configurableDaniel Schwierzeck2011-07-311-1/+5
| | | | | | | | | | | Currently the cache operation mode is hard-coded to CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs which operate at a different mode. This patch makes the cache operation mode configurable via board config. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFGDaniel Schwierzeck2011-07-311-3/+10
| | | | | | | | | This define is a board-specific config option and should be renamed to follow the U-Boot naming convention. Additionally, add an explaining comment for this option. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Acked-by: Thomas Langer <thomas.langer@lantiq.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* Timer: Remove reset_timer() for non-Nios2 archesGraeme Russ2011-07-261-6/+0
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* Timer: Remove set_timer completelyGraeme Russ2011-07-261-6/+0
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* MIPS: Move timer code to arch/mips/cpu/$(CPU)/Shinya Kuribayashi2011-05-102-1/+99
| | | | | | | | | | | | | | Current timer routines (arch/mips/lib/timer.c) are implemented assuming that MIPS32 coprocessor (CP0) resources, Counter and Compare registers in this case, are available. But this doesn't always work. We need to make sure that all MIPS-based systems don't necessarily use CP0 counter/compare registers as time keeping resources. And some MIPS variant processors might come with different hardware specs with genuine MIPS32 CP0 registers. With this change, each $(CPU)/ directory can have its own timer code. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: Coding style cleanups on common assembly filesShinya Kuribayashi2011-05-072-107/+93
| | | | | | | | | | Fix style issues and alignments globally. No logical changes. - Replace C comments with AS line comments where possible - Use ifndef where possible, rather than if !defined for simplicity - An instruction executed in a delay slot is now indicated by a leading space, not by C comment Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: Remove mips_cache_lock() featureShinya Kuribayashi2011-05-072-100/+0
| | | | | | | | | As requested in commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd ([MIPS] Request for the 'mips_cache_lock()' removal), such feature is no longer needed for current MIPS implementation of U-Boot, and no one in the tree uses it for years. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: Au1x00: Move all Au1x00 specific code to separate subdirectoryDaniel Schwierzeck2011-04-027-2/+69
| | | | | | | | | Au1x00 is a SoC and its specific code should reside in an own SoC subdirectory. Also add -mtune=4kc flag for CPU optimization. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Thomas Lange <thomas@corelatus.se> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: IncaIP: Move all IncaIP specific code to separate subdirectoryDaniel Schwierzeck2011-04-027-2/+70
| | | | | | | | | IncaIP is a SoC and its specific code should reside in an own SoC subdirectory. Also add -mtune=4kc flag for CPU optimization. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: Optimize the setup of CPU optimization flagsDaniel Schwierzeck2011-04-021-7/+8
| | | | | | | | | | | | | | | | | The current MIPS CPU config.mk code always expects a MIPS 4kc core. This is not appropiate for other CPUs and SoCs. Replace the current MIPSFLAGS code by cc-option macro and use -march=mips32r2 as default optimization level for all MIPS32 CPUs. Note: Since commit f62fb99941c625605aa16a0097b396a5c16d2c88 all toolchains with binutils prior to v2.16 are not working anymore. As agreed with Shinya Kuribayashi the support for those toolchains will be dropped officially with this patch. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* MIPS: Move content of arch/mips/cpu to arch/mips/cpu/mips32Daniel Schwierzeck2011-04-0214-0/+4187
All current CPUs and SoCs are based on MIPS32 arch. The complete code resides in the global arch/mips/cpu directory. This is not suitable if other MIPS architectures like MIPS64 or Octeon should be supported in the future. To achieve this the current CPU code is moved to its own mips32 subdirectory. All MIPS32 boards have to use mips32 as config switch in board.cfg. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Cc: Vlad Lungu <vlad.lungu@windriver.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
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