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* EXYNOS: Add clock for SPIHatim RV2012-11-152-0/+126
| | | | | | | | | | | Add api to calculate and set the clock for SPI channels Signed-off-by: James Miller <jamesmiller@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add pinmux support for SPIRajeshwari Shinde2012-11-152-0/+56
| | | | | | | | | This patch adds pinmux support for SPI channels Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add clock for I2SRajeshwari Shinde2012-11-153-0/+153
| | | | | | | | | This patch adds clock support for I2S Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add I2S base addressRajeshwari Shinde2012-11-151-0/+3
| | | | | | | | | This patch adds base address for I2S Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add pinmux for I2SRajeshwari Shinde2012-11-152-0/+14
| | | | | | | | This patch adds pinmux support for I2S1 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add parameters required by I2SRajeshwari Shinde2012-11-151-0/+44
| | | | | | | | | This patch adds the audio parameters required by the I2S to play the predefined audio data. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Add I2S registersRajeshwari Shinde2012-11-151-0/+66
| | | | | | | | | This patch add I2S registers Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: arm1176: Define arch_cpu_init() for s3c64xxAshok Kumar Reddy2012-11-152-1/+27
| | | | | | | | arch_cpu_init() is removed from cpu level to SOC level for arm1176 in commit 4ea6d6b,the same is done for s3c64xx Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: wdt: Move s5p watchdog timer to drivers/watchdog/Marek Vasut2012-11-152-60/+0
| | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: David Müller <d.mueller@elsoft.ch> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: Clock: Add common function for pll rate calculationMinkyu Kang2012-11-151-64/+38
| | | | | | | | Moved the common code to calculate pll clock rate to new function exynos_get_pll_clk(). Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* ARCH: EXYNOS: add support to match product idMinkyu Kang2012-11-151-0/+9
| | | | | | | | Based upon single SoC there can be multiple variants. This patch add support to match the complete product ID. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* arm:exynos4:pinmux: Modify the gpio function for mmcPiotr Wilczek2012-11-152-0/+59
| | | | | | | | | This patch add pinmux settings for Exynos4 for mmc0 and mmc2 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* gpio:fix: Proper handling of GPIO subsystem parts at Samsung devicesŁukasz Majewski2012-11-152-1/+25
| | | | | | | | | | | | | | Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first. Test HW: - Exynos4210 - Trats - S5PC110 - goni Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* arm1136: Fix enable_caches()Benoît Thébaudeau2012-11-101-10/+12
| | | | | | | | enable_caches() did not enable icache if CONFIG_SYS_ICACHE_OFF was not defined but CONFIG_SYS_DCACHE_OFF was. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* arch-mx6: add mx6dl_pins.hTroy Kisky2012-11-101-0/+149
| | | | | | | Only the values used in the sabrelite board are added currently. Add more as other boards use them. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* imx-common: cpu: add imx_ddr_sizeTroy Kisky2012-11-103-0/+52
| | | | | | | | | | Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololiteTroy Kisky2012-11-105-17/+51
| | | | | | | | | | Previously, the same value was returned for both mx6dl and mx6solo. Check number of processors to differeniate. Also, a freescale patch says that sololite has its cpu/rev stored at 0x280 instead of 0x260. I don't have a sololite to verify. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* Merge git://git.denx.de/u-bootStefano Babic2012-11-1068-7077/+548
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| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-0522-272/+1435
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| | * socfpga/spl: Remove malloc.hVikram Narayanan2012-11-041-1/+0
| | | | | | | | | | | | | | | | | | Remove unused header Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
| | * socfpga/spl: Remove timer_init from spl_board_initVikram Narayanan2012-11-041-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Timer is initialized already in board_init_r function in (common/spl/spl.c) No need to initialize it again Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com>
| | * Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-034-13/+59
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| | | * omap3: Rework board.c for !CONFIG_SYS_L2CACHE_OFFTom Rini2012-10-301-13/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings currently. Re-order functions so that we don't have that anymore. Signed-off-by: Tom Rini <trini@ti.com>
| | | * arm bootm: Allow to pass board specified atagsPali Rohár2012-10-302-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Board can implement function setup_board_tags which is used for adding atags Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
| | | * am33xx: Enable UART{1,2,3,4,5} clocksAndrew Bradford2012-10-251-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232 cape or the am335x_evm daughterboard, enable the required clocks for the UART in use. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
| | * | arm720t: add back common.h includeAllen Martin2012-10-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add back common.h header that was removed in previous patch so that CONFIG_TEGRA can be evaluated correctly. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra20: initialize variable to avoid compiler warningAllen Martin2012-10-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize this variable to avoid a compiler warning about possible use of uninitialized variable with gcc 4.4.6. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | tegra: move to common SPL frameworkAllen Martin2012-10-292-77/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | ARM: enhance u-boot.lds to detect over-sized SPLStephen Warren2012-10-291-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE. Different .lds files implement this check in two possible ways: 1) An ASSERT() like this 2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all linker output into that region. Since u-boot.lds is used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented. Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com> Acked-by: Tom Rini <trini@ti.com> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-10-2712-177/+1327
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| * | | | include/linux/byteorder: import latest endian definitions from linuxKim Phillips2012-11-041-4/+0
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot's byteorder headers did not contain endianness attributions for use with sparse, causing a lot of false positives. Import the kernel's latest definitions, and enable them by including compiler.h and types.h. They come with 'const' added for some swab functions, so fix those up, too: include/linux/byteorder/big_endian.h:46:2: warning: passing argument 1 of '__swab64p' discards 'const' qualifier from pointer target type [enabled by default] Also, note: u-boot's historic __BYTE_ORDER definition has been preserved (for the time being at least). We also remove ad-hoc barrier() definitions, since we're including compiler.h in files that hadn't in the past: macb.c:54:0: warning: "barrier" redefined [enabled by default] In addition, including compiler.h in byteorder changes the 'noinline' definition to expand to __attribute__((noinline)). This fixes arch/powerpc/lib/bootm.c: bootm.c:329:16: error: attribute '__attribute__': unknown attribute bootm.c:329:16: error: expected ')' before '__attribute__' bootm.c:329:25: error: expected identifier or '(' before ')' token powerpc sparse builds yield: include/common.h:356:22: error: marked inline, but without a definition the unknown-reason inlining without a definition is considered obsolete given it was part of the 2002 initial commit, and no arm version was 'fixed.' also fixed: ydirectenv.h:60:0: warning: "inline" redefined [enabled by default] and: Configuring for devconcenter - Board: intip, Options: DEVCONCENTER make[1]: *** [4xx_ibm_ddr2_autocalib.o] Error 1 make: *** [arch/powerpc/cpu/ppc4xx/libppc4xx.o] Error 2 powerpc-fsl-linux-size: './u-boot': No such file 4xx_ibm_ddr2_autocalib.c: In function 'DQS_autocalibration': include/asm/ppc4xx-sdram.h:1407:13: sorry, unimplemented: inlining failed in call to 'ppc4xx_ibm_ddr2_register_dump': function body not available 4xx_ibm_ddr2_autocalib.c:1243:32: sorry, unimplemented: called from here and: In file included from crc32.c:50:0: crc32table.h:4:1: warning: implicit declaration of function '___constant_swab32' [-Wimplicit-function-declaration] crc32table.h:4:1: error: initializer element is not constant crc32table.h:4:1: error: (near initialization for 'crc32table_le[0]') Signed-off-by: Kim Phillips <kim.phillips@freescale.com> [trini: Remove '#endif' in include/common.h around setenv portion] Signed-off-by: Tom Rini <trini@ti.com>
| * | | ARM: fix u-boot.lds for -ffunction-sections/-fdata-sectionsStephen Warren2012-10-261-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When -ffunction-sections or -fdata-section are used, symbols are placed into sections such as .data.eserial1_device and .bss.serial_current. Update the linker script to explicitly include these. Without this change (at least with my gcc-4.5.3 built using crosstool-ng), I see that the sections do end up being included, but __bss_end__ gets set to the same value as __bss_start. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Allen Martin <amartin@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * | | arm: ks8695: use defined constants for UARTYann Vernier2012-10-261-3/+3
| | | | | | | | | | | | | | | | CONFIG_BAUDRATE and KS8695_UART_LINEC_WLEN8 used for UART registers
| * | | arm720: Remove CONFIG_ARM7_REVDMarek Vasut2012-10-261-11/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is a dead code, remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | arm720: Further clean up the arm720t directoryMarek Vasut2012-10-263-79/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up away old macros and such, so the file doesn't start piling up cruft. Signed-off-by: Marek Vasut <marex@denx.de> clean
| * | | stdio: Remove the CLPS7111 serial driverMarek Vasut2012-10-262-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | This driver is no longer used, remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | arm: Remove support for NETARMMarek Vasut2012-10-2611-1437/+10
| | | | | | | | | | | | | | | | | | | | | | | | This stuff has been rotting in the tree for a while now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | arm: Remove support for s3c4510Marek Vasut2012-10-266-528/+2
| | | | | | | | | | | | | | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | arm: Remove support for lpc2292Marek Vasut2012-10-2613-1175/+3
| | | | | | | | | | | | | | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
| * | | Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-10-261-0/+15
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| | * | | ARM: at91sam9x5: enable MCI0 support for 9x5ek board.Wu, Josh2012-10-171-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | | Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-10-2613-400/+372
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| | * | | am33xx/ddr_defs.h: rename DDR2/DDR3 defines to their actual part numbersPeter Korsgaard2012-10-251-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So other parts can be added. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | | am33xx: support board specific ddr settingsPeter Korsgaard2012-10-252-104/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the hardcoded ddr2/ddr3 settings for the ti boards to board code, so other boards can use different types/timings. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make apply with rtc32k_enable() in the file] Signed-off-by: Tom Rini <trini@ti.com>
| | * | | am33xx: move generic parts of pinmux handling out from board/ti/am335xPeter Korsgaard2012-10-253-0/+295
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So they are available for other boards. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | | am33xx/board: use cpu_mmc_init() for default mmc initializationPeter Korsgaard2012-10-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So platforms can override it with board_mmc_init() if needed. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | | am33xx: move ti i2c baseboard header handling to board/ti/am335x/Peter Korsgaard2012-10-252-288/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2c header is specific to ti(-derived) boards, and not generic for all am335x boards. Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com> [trini: Make re-apply with rtc32k_enable() applied] Signed-off-by: Tom Rini <trini@ti.com>
| | * | | am33xx/board.c: make wdtimer/uart_base staticPeter Korsgaard2012-10-251-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only used here (and uart_base only for SPL). Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
| | * | | am33xx: Add SPI SPL as an optionTom Rini2012-10-252-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the required config.mk logic for this SoC as well as the BOOT_DEVICE define. Finally, enable the options on the am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| | * | | VIDEO: add macro to set LCD size for DSS driverStefano Babic2012-10-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
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