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* usb: tegra: combine header fileStefan Agner2014-04-175-753/+225
| | | | | | | | | | | Combine the Tegra USB header file into one header file for all SoCs. Use ifdef to account for the difference, especially Tegra20 is quite different from newer SoCs. This avoids duplication, mainly for Tegra30 and newer devices. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* usb: tegra: fix PHY configurationStefan Agner2014-04-172-6/+6
| | | | | | | | | | | | | | | | On Tegra30 and later, the PTS (parallel transceiver select) and STS (serial transceiver select) are part of the HOSTPC1_DEVLC_0 register rather than PORTSC1_0 register. Since the reset configuration usually matches the intended configuration, this error did not show up on Tegra30 devices. Also use the slightly different bit fields of first USB, (USBD) on Tegra20 and move those definitions to the Tegra20 specific header file. Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: add Jetson TK1 boardStephen Warren2014-04-172-0/+85
| | | | | | | | Jetson TK1 is an NVIDIA Tegra124 reference board, which shares much of its design with Venice2. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Tegra124 pinmux cleanupStephen Warren2014-04-174-577/+539
| | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra124_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. There are differences in the set of drive groups. I have validated this against the TRM. There are differences order of pin definitions in pinmux.c; these previously had significant mismatches with the correct order:-( I adjusted a few entries in pinmux-config-venice2.h since the set of legal functions for some pins was updated to match the TRM. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Tegra114 pinmux cleanupStephen Warren2014-04-174-573/+500
| | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra114_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted a few entries in pinmux-config-dalmore.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Tegra30 pinmux cleanupStephen Warren2014-04-173-678/+609
| | | | | | | | | | | | | | | | | | | | | | This renames all the pinmux pins, drive groups, and functions so they have a prefix which matches the type name. These lists are also auto- generated using scripts that were also used to generate the kernel pinctrl drivers. This ensures that the lists are consistent between the two. The entries in tegra30_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. This introduces a few changes to pin/group/function naming and the set of available functions for each pin. The new values now exactly match the TRM; the chip documentation. I adjusted one entry in pinmux-config-cardhu.h due to this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Tegra20 pinmux cleanupStephen Warren2014-04-173-374/+359
| | | | | | | | | | | | | | This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pinmux naming consistency fixesStephen Warren2014-04-1711-127/+131
| | | | | | | | | | | | | | | Clean up the naming of pinmux-related objects: * Refer to drive groups rather than pad groups to match the Linux kernel. * Ensure all pinmux API types are prefixed with pmux_, values (defines) are prefixed with PMUX_, and functions prefixed with pinmux_. * Modify a few type names to make their content clearer. * Minimal changes to SoC-specific .h/.c files are made so the code still compiles. A separate per-SoC change will be made immediately following, in order to keep individual patch size down. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: reduce public pinmux APIStephen Warren2014-04-172-8/+2
| | | | | | | | | | | Remove a few unused functions from the pinmux header. They aren't currently used, and removing them prevents any new usage from appearing. This will ease moving to just pinmux_config_table() and padgrp_config_table() in the future. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pinctrl: remove duplicationStephen Warren2014-04-1711-2072/+732
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Much of arch/arm/cpu/tegra*-common/pinmux.c is identical. Remove the duplication by creating pinmux-common.c for all the identical code. This leaves: * arch/arm/include/asm/arch-tegra*/pinmux.h defining only the names of the various pins/pin groups, drive groups, and mux functions. * arch/arm/cpu/tegra*-common/pinmux.c containing only the lookup table stating which pin groups support which mux functions. The code in pinmux-common.c is semantically identical to that in the various original pinmux.c, but had some consistency and cleanup fixes applied during migration. I removed the definition of struct pmux_tri_ctlr, since this is different between SoCs (especially Tegra20 vs all others), and it's much simpler to deal with this via the new REG/MUX_REG/... defines. spl.c, warmboot.c, and warmboot_avp.c needed updates due to this, since they previously hijacked this struct to encode the location of some non-pinmux registers. Now, that code simply calculates these register addresses directly using simple and obvious math. I like this method better irrespective of the pinmux code cleanup anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: use apb_misc.h in more placesStephen Warren2014-04-175-8/+16
| | | | | | | | | | | | | | | | | Tegra's "APB misc" register region contains various miscellaneous registers and the Tegra pinmux registers. Some code that touches the misc registers currently uses struct pmux_tri_ctlr, which is intended to be a definition of pinmux registers, rather than struct apb_misc_pp_ctrl, which is intended to be a definition of the miscellaneous registers. Convert all such code to use struct apb_misc_pp_ctrl, since struct pmux_tri_ctlr goes away in the next patch. This requires adding a missing field definition to struct apb_misc_pp_ctrl, and moving the header into a more common location. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: prototype pinmux_init() in board.hStephen Warren2014-04-174-9/+1
| | | | | | | | | pinmux_init() is a board-level function, not a pinmux driver function. Move the prototype to a board header rather than the driver header. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pinctrl: make pmux_func values consistent on Tegra20Stephen Warren2014-04-172-11/+10
| | | | | | | | | | | | | | | | | For consistency with other SoCs, modify Tegra20's enum pmux_func to: * Remove PMUX_FUNC values that aren't real * Use the same PMUX_FUNC_RSVD[1-4] values, and ensure (RSVD1 & 3)==0; this will be assumed by pinmux_set_func() in a future patch. Unfortunately, PMUX_FUNC_RSVD is still used in the pin macros. Use a private define inside the driver to prevent this from causing compilaton errors. This will be cleaned up when the pin tables are re-written in a later patch in this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pinctrl: remove vddioStephen Warren2014-04-178-86/+0
| | | | | | | | | | This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: pinctrl: remove func_safeStephen Warren2014-04-178-24/+0
| | | | | | | | | | This field isn't used anywhere, so remove it. Note that PIN() macros are left unchanged for now, to avoid many diffs to them; later commits will completely rewrite them just one time. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-0818-323/+266
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * tegra: fix Makefile to pass per-file CFLAGSMasahiro Yamada2014-03-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | Since Kbuild was introduced, warmboot_avp.o has been compiled without -march=armv4t. Makefile should be adjusted to pass a per-file option. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
| * cpu: exynos4: add ace sha base addressPrzemyslaw Marczak2014-03-281-4/+4
| | | | | | | | | | Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com>
| * spl: Fix guardian macros in spl.hMarek Vasut2014-03-286-6/+6
| | | | | | | | | | | | | | | | | | Fix the macros guarding the spl.h header for various platforms. Due to a typo and a propagation of it, the macros went out-of-sync with their ifdef check, so fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
| * kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/libMasahiro Yamada2014-03-286-310/+248
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has supported two kinds of asm-offsets.h. One is generic for all architectures and its source is located at ./lib/asm-offsets.c. The other is SoC specific and its source is under SoC directory. The problem here is that only boards with SoC directory can use the asm-offsets infrastructure. Putting asm-offsets.c right under CPU directory does not work. Now a new demand is coming. PowerPC folks want to use asm-offsets. But no PowerPC boards have SoC directory. It seems inconsistent that some boards add asm-offsets.c to SoC directoreis and some to CPU directories. It looks more reasonable to put asm-offsets.c under arch/$(ARCH)/lib. This commit merges asm-offsets.c under SoC directories into arch/$(ARCH)/lib/asm-offsets.c. By the way, I doubt the necessity of some entries in asm-offsets.c. I am leaving refactoring to the board maintainers. Please check "TODO" in the comment blocks in arch/{arm,nds32}/lib/asm-offsets.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Yuantian Tang <Yuantian.Tang@freescale.com>
| * kbuild: Rename UIMAGE to MKIMAGEMarek Vasut2014-03-282-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot uses the 'mkimage' tool to produce various image types, not only uImage image type. Rename the invocation name from UIMAGE to MKIMAGE. The following command was used to do the replacement: git grep 'quiet_cmd_mkimage.* = UIMAGE' | cut -d : -f 1 | \ xargs -i sed -i "s@\(quiet_cmd_mkimage\)\(.*\) = UIMAGE @\1\2 = MKIMAGE@" {} Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * mmc: Split mmc struct, rework mmc initialization (v2)Pantelis Antoniou2014-03-242-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that struct mmc was implemented was a bit of a mess; configuration and internal state all jumbled up in a single structure. On top of that the way initialization is done with mmc_register leads to a lot of duplicated code in drivers. Typically the initialization got something like this in every driver. struct mmc *mmc = malloc(sizeof(struct mmc)); memset(mmc, 0, sizeof(struct mmc); /* fill in fields of mmc struct */ /* store private data pointer */ mmc_register(mmc); By using the new mmc_create call one just passes an mmc config struct and an optional private data pointer like this: struct mmc = mmc_create(&cfg, priv); All in tree drivers have been updated to the new form, and expect mmc_register to go away before long. Changes since v1: * Use calloc instead of manually calling memset. * Mark mmc_register as deprecated. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* | arm64 patch: gicv3 supportDavid Feng2014-04-086-114/+290
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add gicv3 support to uboot armv8 platform. Changes for v2: - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S - move smp_kick_all_cpus() from gic.S to start.S, it would be implementation dependent. - Each core initialize it's own ReDistributor instead of master initializeing all ReDistributors. This is advised by arnab.basu <arnab.basu@freescale.com>. Signed-off-by: David Feng <fenghua@phytium.com.cn>
* | bootstage: arm: fix fdt stashing codeMela Custodio2014-04-071-2/+1
| | | | | | | | | | | | The conditional is using a variable that is not defined. Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com>
* | ARMv8: fix bug for flush data cache by set/wayLeo Yan2014-04-071-3/+1
| | | | | | | | | | | | | | | | | | When flush the d$ with set/way instruction, it need calculate the way's offset = log2(Associativity); but in current uboot's code, it use below formula to calculate the offset: log2(Associativity * 2 - 1), so finally it cannot flush data cache properly. Signed-off-by: Leo Yan <leoy@marvell.com>
* | armv8: Flush dcache before switching to EL2York Sun2014-04-071-0/+1
| | | | | | | | | | | | | | | | | | | | For ARMv8, U-boot has been running at EL3 with cache and MMU enabled. Without proper setup for EL2, cache and MMU are both disabled (out of reset). Before switching, we need to flush the dcache to make sure the data is in the main memory. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: David.Feng <fenghua@phytium.com.cn>
* | arm: vf610: add enet1 supportMarcel Ziswiler2014-04-073-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains several changes required for second Ethernet (enet1/RMII1) port on vf610 - ANADIG PLL5 control definitions required for Ethernet RMII1 clock - Secondary Ethernet (enet1) MAC RMII1 base address definition - RMII1 iomux definitions - VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for internal (e.g. crystal-less) Ethernet clocking. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: add uart0 clock/iomux definitionsMarcel Ziswiler2014-04-072-0/+3
| | | | | | | | | | | | | | | | | | Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux definitions for UART0 (aka. SCI0). Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: fix anadig register structMarcel Ziswiler2014-04-071-25/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The anadig_reg structure started at the wrong offset (fixed by adding reserved_0x000[4]), was missing some reserved field required for alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl) and further contained a too short reserved field causing further miss- alignment (reserved_0x0C4[7]). Also, rename all the reserved fields and using a memory offset based scheme for. Discovered and tested by temporarily putting the following debug instrumentation into board_init(): struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR; printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl); printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl); Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | build:arm: Remove setting of CROSS_COMPILE environment variableŁukasz Majewski2014-04-071-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Kbuild introduction, the CROSS_COMPILE environment variable has been set to some default value (prefix arm-linux-). This shall be removed since it breaks building u-boot for native arm target (like qemu ARM). Moreover not all compilers have arm-linux- prefix. Additionally the u-boot cross compiles with CROSS_COMPILE= set explicitly- e.g.: CROSS_COMPILE=/ .... /arm-v7a-linux-gnueabi- make Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-071-1/+6
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| * | ARM: Add workaround for Cortex-A9 errata 761320Nitin Garg2014-04-071-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | ARM: Add workaround for Cortex-A9 errata 794072Nitin Garg2014-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* | | armv8/cache: Change cache invalidate and flush functionYork Sun2014-04-074-20/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | armv8/cache: Flush D-cache, invalidate I-cache for relocationYork Sun2014-04-072-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | armv8/cache: Consolidate setting for MAIR and TCRYork Sun2014-04-072-25/+19
| | | | | | | | | | | | | | | | | | | | | | | | Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | arm: Handle .gnu.hash section in ldscriptsAndreas Färber2014-04-071-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | socfpga: Adding Clock Manager driverChin Liang See2014-04-075-1/+657
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* | arm: mxs: Add support for generating signed BootStreamMarek Vasut2014-04-042-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the groundwork for generating signed BootStream, which can be used by the HAB library in i.MX28. We are adding a new target, u-boot-signed.sb , since the process for generating regular non-signed BootStream is much easier. Moreover, the signed bootstream depends on external _proprietary_ _binary-only_ tool from Freescale called 'cst', which is available only under NDA. To make things even uglier, the CST or HAB mandates a kind-of circular dependency. The problem is, unlike the regular IVT, which is generated by mxsimage, the IVT for signed boot must be generated by hand here due to special demands of the CST. The U-Boot binary (or SPL binary) and IVT are then signed by the CST as a one block. But here is the problem. The size of the entire image (U-Boot, IVT, CST blocks) must be appended at the end of IVT. But the size of the entire image is not known until the CST has finished signing the U-Boot and IVT. We solve this by expecting the CST block to be always 3904B (which it is in case two files, U-Boot and the hand-made IVT, are signed in the CST block). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-arm into masterStefano Babic2014-04-0459-590/+1007
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * \ Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-256-15/+16
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| | * kirkwood: kwbimage: refactor CONFIG_SYS_KWD_CONFIGMasahiro Yamada2014-03-121-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull out "$(SRCTREE)/" from CONFIG_SYS_KWD_CONFIG and push it into the top Makefile. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michael Walle <michael@walle.cc> Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Dave Purdy <david.c.purdy@gmail.com> Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net> Cc: Luka Perkov <luka@openwrt.org> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Jason Cooper <u-boot@lakedaemon.net> Cc: Siddarth Gore <gores@marvell.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Eric Cooper <ecc@cmu.edu> Cc: Suriyan Ramasami <suriyan.r@gmail.com>
| | * kbuild,mxs: use short logs for MXS imagesMasahiro Yamada2014-03-125-14/+15
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com> Acked-by: Marek Vasut <marex@denx.de>
| * | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-1310-0/+878
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| | * | arm: exynos: Squash bogus warnings in pinmuxMarek Vasut2014-03-131-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Squash these warnings in pinmux.c found with GCC 4.8: /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_config': /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'count' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:16: note: 'count' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'start' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:9: note: 'start' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:689:19: warning: 'bank' may be used uninitialized in this function [-Wmaybe-uninitialized] s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); ^ /arch/arm/cpu/armv7/exynos/pinmux.c:662:24: note: 'bank' was declared here struct s5p_gpio_bank *bank; ^ /arch/arm/cpu/armv7/exynos/pinmux.c: In function 'exynos_pinmux_config': /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'count' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:16: note: 'count' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:687:28: warning: 'start' may be used uninitialized in this function [-Wmaybe-uninitialized] for (i = start; i < start + count; i++) { ^ /arch/arm/cpu/armv7/exynos/pinmux.c:663:9: note: 'start' was declared here int i, start, count; ^ /arch/arm/cpu/armv7/exynos/pinmux.c:689:19: warning: 'bank' may be used uninitialized in this function [-Wmaybe-uninitialized] s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2)); ^ /arch/arm/cpu/armv7/exynos/pinmux.c:662:24: note: 'bank' was declared here struct s5p_gpio_bank *bank; ^ Note that the warning is bogus, the function can never be called with invalid 'peripheral' argument. GCC just cannot analyze this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Cc: Akshay Saraswat <akshay.s@samsung.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com> Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | board:trats2: Enable device tree on Trats2Piotr Wilczek2014-03-122-1/+436
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables to run Trats2 board on device tree. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | board:trats: Enable device tree on TratsPiotr Wilczek2014-03-122-1/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables to run Trats board on device tree. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | board:universal: Enable device tree on UniversalPiotr Wilczek2014-03-122-1/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables to run Universal board on device tree. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | board:origen: Enable device tree on OrigenPiotr Wilczek2014-03-122-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables to run Origen board on device tree. Uart, DRAM and MMC init functions are removed as their generic replacements form the common board file are used. The config file is modified to contain only board specific options. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Chander Kashyap <k.chander@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * | arm:exynos: add common DTS file for exynos 4Piotr Wilczek2014-03-122-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds common dtsi file and config header for all Exynos 4 based boards. Patch additionaly adds board specific (weak) functions for board_early_init_f and board_power_init functions. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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