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* ARM: uniphier: add PH1-LD11 SoC supportMasahiro Yamada2016-05-261-0/+3
| | | | | | This is a low-cost ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add PH1-LD20 SoC supportMasahiro Yamada2016-04-241-1/+2
| | | | | | This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add sg_set_iectrl_range()Masahiro Yamada2016-04-241-0/+8
| | | | | | | | For PH1-LD20 or later, per-pin input-enable control is supported, that is, we need to set-up IECTRL registers for a group of pins. This helper function will be useful for a bunch of register settings. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add sg_set_iectrl() functionMasahiro Yamada2016-03-241-0/+11
| | | | | | | This helper function would be useful for new SoCs with per-pin input enable controlling, such as PH1-LD20, PH1-LD11, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix warnings reported by aarch64 compilerMasahiro Yamada2016-03-011-1/+1
| | | | | | | | | | | | The UniPhier SoC family has not supported ARMv8 yet, but these would cause warnings if they were compiled with a 64bit compiler. Before adding the ARMv8 support really, fix them now. Because UniPhier SoCs do not support Large Physical Address Extension, casting "phys_addr_t" into "unsigned long" would carry the address as is. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move headers out of include/mach directoryMasahiro Yamada2016-01-131-0/+120
These headers are only included locally in arch/arm/mach-uniphier/. There is no reason to export them by putting in the mach/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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