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* ARM: uniphier: prepare directory structure for ARMv8 SoC supportMasahiro Yamada2016-03-011-156/+0
| | | | | | | | | | Before adding ARMv8 support, this commit refactors the directory structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32 to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the "select CPU_V7" to the lower-level menu because we will have to select ARM64 instead of CPU_V7 for ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: set active ways to really enable outer cacheMasahiro Yamada2016-01-201-0/+2
| | | | | | Each way must be unlocked to make it effective. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix range invalidate for outer cacheMasahiro Yamada2016-01-201-0/+23
| | | | | | | If invalidate operation is invoked against a cache-unaliged region, the both ends of the region should be flushed, not invalidated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: factor out outer cache sync as a helper functionMasahiro Yamada2016-01-201-4/+8
| | | | | | Avoid repeating the same code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor outer cache operation slightlyMasahiro Yamada2016-01-201-2/+4
| | | | | | Improve readability without changing the behavior. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: move headers out of include/mach directoryMasahiro Yamada2016-01-131-1/+2
| | | | | | | These headers are only included locally in arch/arm/mach-uniphier/. There is no reason to export them by putting in the mach/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: replace <asm/io.h> with <linux/io.h>Masahiro Yamada2015-05-311-4/+2
| | | | | | | In the Linux coding style, it is recommended to include <linux/io.h> rather than <asm/io.h>. Follow this trend. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: remove unnecessary ifdef conditionalMasahiro Yamada2015-03-241-2/+0
| | | | | | | | The callee (arch/arm/lib/cache-cp15.c) has a #ifdef CONFIG_SYS_DCACHE_OFF conditional. The same conditional in the caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: disable L2 cache by lowlevel_init of U-Boot properMasahiro Yamada2015-03-241-17/+0
| | | | | | | | | | | | The L2 cache is used as a temporary SRAM on SPL. Now the secondary CPUs store the necessary code for jumping to Linux on their L1 I-caches. So, the L2 cache can be disabled much earlier, at the very entry of U-Boot proper (lowlevel_init). This makes the boot sequence clearer. Also, as the L1 cache has been disabled by the start.S, enable_caches() does not need to do it again. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: optimize kicking secondary CPUs codeMasahiro Yamada2015-03-241-11/+2
| | | | | | | | | | | | | | Currently, the secondary CPU(s) are kicked three times: Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux. It makes the boot sequence very complicated. This commit merges the first and the second kicks, so the secondary CPU(s) can directly jump from SPL to Linux. arch/arm/mach-uniphier/smp.S is no longer necessary. Linux boot test passed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: include <mach/*.h> instead of <asm/arch/*.h>Masahiro Yamada2015-03-011-1/+1
| | | | | | | | | Since commit 0e7368c6c426 (kbuild: prepare for moving headers into mach-*/include/mach), we can replace #include <asm/arch/*.h> with <mach/*.h> so we do not need to create the symbolic link during the build. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* ARM: UniPhier: move SoC sources to mach-uniphierMasahiro Yamada2015-03-011-0/+154
Move arch/arm/cpu/armv7/uniphier/* -> arch/arm/mach-uniphier/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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