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* ARM: tegra: simplify GPU setupAlexandre Courbot2015-11-121-0/+20
| | | | | | | | | | Enable the GPU node in the system-wide ft_system_setup() hook instead of the board-specific ft_board_hook(). This allows us to enable GPU per SoC generation instead of per-board as we did initially. Reported-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: represent RAM in 1 or 2 banksStephen Warren2015-08-131-14/+106
| | | | | | | | | | | | | | | | | | | | | Represent all available RAM in either one or two banks. The first bank describes any RAM below 4GB. The second bank describes any RAM above 4GB. This split is driven by the following requirements: - The NVIDIA L4T kernel requires separate entries in the DT /memory/reg property for memory below and above the 4GB boundary. The layout of that DT property is directly driven by the entries in the U-Boot bank array. - On systems with RAM beyond a physical address of 4GB, the potential existence of a carve-out at the end of RAM below 4GB can only be represented using multiple banks, since usable RAM is not contiguous. While making this change, add a lot more comments re: how and why RAM is represented in banks, and implement a few more "semantic" functions that define (and perhaps later detect at run-time) the size of any carve-out. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move VPR configuration to a later stageAlexandre Courbot2015-08-061-0/+3
| | | | | | | | | | | | | | | | U-boot is responsible for enabling the GPU DT node after all necessary configuration (VPR setup for T124) is performed. In order to be able to check whether this configuration has been performed right before booting the kernel, make it happen during board_init(). Also move VPR configuration into the more generic gpu.c file, which will also host other GPU-related functions, and let boards specify individually whether they need VPR setup or not. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: restrict usable RAM size furtherStephen Warren2015-08-061-2/+11
| | | | | | | | | | | | | | Additionally, ARM64 devices typically run a secure monitor in EL3 and U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3 code and data. These carve-outs are located at the top of 32-bit address space. Restrict U-Boot's RAM usage to well below the location of those carve-outs. Ideally, we would the secure monitor would inform U-Boot of exactly which RAM it could use at run-time. However, I'm not sure how to do that at present (and even if such a mechanism does exist, it would likely not be generic across all forms of secure monitor). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* T210: P2571: Turn CPU fan onTom Warren2015-08-051-0/+3
| | | | | | | | CPU board (E2530) has a fan - turn it on via GPIO to keep the SoC cool. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Initialize timer earlierThierry Reding2015-07-281-0/+6
| | | | | | | | | | | | | A subsequent patch will enable the use of the architected timer on ARMv8. Doing so implies that udelay() will be backed by this timer implementation, and hence the architected timer must be ready when udelay() is first called. The first time udelay() is used is while resetting the debug UART, which happens very early. Make sure that arch_timer_init() is called before that. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: Restrict usable RAM to 32-bit on 64-bit SoCsThierry Reding2015-07-281-0/+16
| | | | | | | | | | | | | | | Most peripherals on Tegra can do DMA only to the lower 32-bit address space, even on 64-bit SoCs. This limitation is typically overcome by the use of an IOMMU. Since the IOMMU is not entirely trivial to set up and serves no other purpose (I/O protection, ...) in U-Boot, restrict 64-bit Tegra SoCs to the lower 32-bit address space for RAM. This ensures that the physical addresses of buffers that are programmed into the various DMA engines are valid and don't alias to lower addresses. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* dm: usb: tegra: Drop legacy USB codeSimon Glass2015-06-101-3/+0
| | | | | | Drop the code that doesn't use driver model for USB. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: tegra: usb: Move USB to driver modelSimon Glass2015-06-101-0/+2
| | | | | | | | | | Somehow this change was dropped in the various merges. I noticed when I came to turn off the non-driver-model support for Tegra. We need to make this change (and deal with any problems) before going further. Change-Id: Ib9389a0d41008014eb0df0df98c27be65bc79ce6 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* tegra: Allow board-specific initSimon Glass2015-06-091-2/+6
| | | | | | | Add a hook to allows boards to add their own init to board_init(). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: move NVIDIA common files to arch/arm/mach-tegraMasahiro Yamada2015-05-131-0/+273
All the Tegra boards borrow the files from board/nvidia/common/ directory, i.e., board/nvidia/common/* are not vendor-common files, but SoC-common files. Move NVIDIA common files to arch/arm/mach-tegra/ to clean up Makefiles. As arch/arm/mach-tegra/board.c already exists, this commit renames board/nvidia/common/board.c to arch/arm/mach-tegra/board2.c, expecting they will be consolidated as a second step. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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