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* exynos5: Add DT based driver for SMC911X ethernetHatim RV2012-12-261-0/+18
| | | | | | | | | Add device tree based ethernet driver for SMC911X controller on SMDK5250 boards. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12Chander Kashyap2012-12-261-0/+85
| | | | | | | This patch adds gpio structure for Exynos4x12. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12Chander Kashyap2012-12-261-0/+276
| | | | | | | This patch adds clock structure for Exynos4x12. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addressesChander Kashyap2012-12-261-6/+42
| | | | | | | This patch populates base addresses of Exynos4x12 registers. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
*---. Merge samsung, imx, tegra into u-boot-arm/masterAlbert ARIBAUD2012-12-2212-7/+168
|\ \ \ | | | | | | | | | | | | | | | | | | | | This commit merges branches from samsung, imx and tegra meant to fix merge issues between u-boot/master and u-boot-arm/master, as well as a few manual merge fixes.
| | | * Merge remote-tracking branch 'u-boot/master' into u-boot-arm-mergedAllen Martin2012-12-199-3/+159
| | | |\ | |_|/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README arch/arm/cpu/armv7/exynos/clock.c board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| | | * exynos:cpu: Add Exynos4 I2C spacingPiotr Wilczek2012-12-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add the spacing for i2c for Exynos4 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
| | | * mxs: i2c: Implement algorithm to set up arbitrary i2c speedMarek Vasut2012-12-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This algorithm computes the values of TIMING{0,1,2} registers for the MX28 I2C block. This algorithm was derived by using a scope, but the result seems correct. The resulting values programmed into the registers do not correlate with the contents in datasheet. When using the values from the datasheet, the I2C clock were completely wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
| | * | Merge branch 'master' of git://git.denx.de/u-boot into masterStefano Babic2012-12-087-3/+156
| | |\ \ | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/woodburn_common.h board/woodburn/woodburn.c These boards still use the old old PMIC framework, so they do not merge properly after the power framework was merged into mainline. Fix all conflicts and update woodburn to use Power Framework. Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | mx28: Rename regs-power.h to regs-power-mx28.hMarek Vasut2012-12-042-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX23 has different register layout and bit placement in the power supply. Thus, in order to be able to add support for MX23, rename the MX28's regs-power.h to regs-power-mx28.h . Moreover, add ifdef around inclusion of regs-*-mx28.h in imx-regs.h so the MX23 boards will include proper set of registers. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| | * | mx28: Remove SET, CLR, TOG ops from PLLxCTRL1 registersMarek Vasut2012-12-041-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These registers don't have _SET, _CLR and _TOG at the respective offsets available, these registers has to be toggled via R-M-W if needed. Thus do not export these offsets anymore. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
| * | | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-107-3/+156
| |\ \ \ |/ / / / | | | _ | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * | EXYNOS: mmc: support DesignWare Controller for Samsung-SoCJaehoon Chung2012-11-271-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | Support DesignWare MMC Controller for Samsung Specific. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * | musb-new: omap2plus backend driverIlya Yanok2012-11-201-0/+4
| | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI OMAP2/3/4 (tested only on OMAP3 Beagle). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | OMAP3: am35x: add musb functionsIlya Yanok2012-11-201-0/+28
| | | | | | | | | | | | | | | | | | AM35XX specific functions for integrated USB PHY/MUSB IP. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | OMAP3: am35x_def.h: add USB definesIlya Yanok2012-11-201-0/+27
| | | | | | | | | | | | | | | | | | Add defines for MUSB IP block on AM35X SoCs. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | musb-new: am35x backend driverIlya Yanok2012-11-201-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI AM35x. It seems that on AM35X interrupt status registers can be updated _before_ core registers. As we don't use true interrupts in U-Boot and poll interrupt status registers instead this can result in interrupt handler being called with non-updated core registers. This confuses the code and result in hanged transfers. Add a small delay in am35x_interrupt as a workaround. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | am33xx: init OTG hardware and new musb gadget driverIlya Yanok2012-11-202-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | AM33xx has support for dual port MUSB OTG controller. This patch adds initialization for the controller using new MUSB gadget driver and ether gadget. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | musb-new: dsps backend driverIlya Yanok2012-11-201-0/+25
| | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI AM33xx and TI81xx SoCs (tested with AM33xx only). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
| * | mx51evk: Fix build error when CONFIG_VIDEO is disabledVikram Narayanan2012-11-141-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The inclusion of LCD patch into mx51evk breaks the build when CONFIG_VIDEO is disabled. Fix this by splitting the video related stuff to a new file. Also rename the function lcd_iomux to setup_iomux_lcd to make the namings aligned with the other iomux functions. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2012-11-255-31/+9
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| * | mx28: Fix typo in POWER_DCLIMITS_NEGLIMIT_OFFSETMarek Vasut2012-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The POWER_DCLIMITS_NEGLIMIT_OFFSET bit in mx28 power supply block is not called POWER_DCLIMITS_NETLIMIT_OFFSET, but POWER_DCLIMITS_NEGLIMIT_OFFSET. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | mx28: Fix typo in POWER_MINPWR_VBG_OFFMarek Vasut2012-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The POWER_MINPWR_VBG_OFF bit in mx28 power supply block is not called POWER_MINPWR_FBG_OFF, but POWER_MINPWR_VBG_OFF. Correct the name in the header file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | mx5: Align SPI CS naming with i.MX53 reference manualFabio Estevam2012-11-191-3/+3
| | | | | | | | | | | | | | | | | | Align SPI chip select naming with i.MX53 reference manual. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | ehci-mxc: Add support for i.MX35Benoît Thébaudeau2012-11-161-0/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | ehci-mxc: Define host offsetsBenoît Thébaudeau2012-11-162-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | mx31: Move EHCI definitions to ehci-fsl.hBenoît Thébaudeau2012-11-161-26/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | The EHCI definitions in i.MX31's imx-regs.h are MXC-generic, so move them to ehci-fsl.h so that all MXC SoCs can use them. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | | arm: Add control over cachability of memory regionsSimon Glass2012-11-191-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for adjusting the L1 cache behavior by updating the MMU configuration. The mmu_set_region_dcache_behaviour() function allows drivers to make these changes after the MMU is set up. It is implemented only for ARMv7 at present. This is needed for LCD support, where we want to make the LCD frame buffer write-through (or off) rather than write-back. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add SOC support for display/lcdWei Ni2012-11-192-0/+697
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the LCD peripheral at the Tegra2 SOC level. A separate LCD driver will use this functionality to configure the display. Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Mayuresh Kulkarni: - changes to remove bitfields and clean up for submission Signed-off-by: Simon Glass <sjg@chromium.org> Simon Glass: - simplify code, move clock control into here, clean-up Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Add support for PWMSimon Glass2012-11-191-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | The pulse width/frequency modulation peripheral supports generating a repeating pulse. It is useful for controlling LCD brightness. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | tegra: Use const for pinmux_config_pingroup/table()Simon Glass2012-11-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | These two functions don't actually modify their arguments so add a const keyword. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | | SPI: Add SPI Driver for EXYNOS.Rajeshwari Shinde2012-11-151-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds SPI driver for EXYNOS. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: jy0922.shim@samsung.com Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS5: Add base address for SPIHatim RV2012-11-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add base address definition for SPI device on Exynos. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add clock for SPIHatim RV2012-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add api to calculate and set the clock for SPI channels Signed-off-by: James Miller <jamesmiller@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS5: Add pinmux support for SPIRajeshwari Shinde2012-11-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux support for SPI channels Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add clock for I2SRajeshwari Shinde2012-11-152-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds clock support for I2S Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add I2S base addressRajeshwari Shinde2012-11-151-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds base address for I2S Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Chander Kashyap <chander.kashyap@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add pinmux for I2SRajeshwari Shinde2012-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds pinmux support for I2S1 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add parameters required by I2SRajeshwari Shinde2012-11-151-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the audio parameters required by the I2S to play the predefined audio data. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | EXYNOS: Add I2S registersRajeshwari Shinde2012-11-151-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add I2S registers Signed-off-by: R. Chandrasekar <rcsekar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | ARCH: EXYNOS: add support to match product idMinkyu Kang2012-11-151-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Based upon single SoC there can be multiple variants. This patch add support to match the complete product ID. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
* | | arm:exynos4:pinmux: Modify the gpio function for mmcPiotr Wilczek2012-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add pinmux settings for Exynos4 for mmc0 and mmc2 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | gpio:fix: Proper handling of GPIO subsystem parts at Samsung devicesŁukasz Majewski2012-11-152-1/+25
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Now proper GPIO parts numbering is handled at Samsung devices. This fix is necessary for code using GPIO located at other banks than first. Test HW: - Exynos4210 - Trats - S5PC110 - goni Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | arch-mx6: add mx6dl_pins.hTroy Kisky2012-11-101-0/+149
| | | | | | | | | | | | | | Only the values used in the sabrelite board are added currently. Add more as other boards use them. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | imx-common: cpu: add imx_ddr_sizeTroy Kisky2012-11-102-0/+2
| | | | | | | | | | | | | | | | | | | | Read memory setup registers to determine size of available ram. This routine works for mx53/mx6x I need this because when mx6solo called get_ram_size with a too large maximum size, the system hanged. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | mx6: soc: update get_cpu_rev and get_imx_type for mx6solo/sololiteTroy Kisky2012-11-103-2/+18
| | | | | | | | | | | | | | | | | | | | Previously, the same value was returned for both mx6dl and mx6solo. Check number of processors to differeniate. Also, a freescale patch says that sololite has its cpu/rev stored at 0x280 instead of 0x260. I don't have a sololite to verify. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* | Merge git://git.denx.de/u-bootStefano Babic2012-11-1022-1932/+333
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| * Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-031-0/+5
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| | * arm bootm: Allow to pass board specified atagsPali Rohár2012-10-301-0/+5
| | | | | | | | | | | | | | | | | | Board can implement function setup_board_tags which is used for adding atags Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
| * | tegra: move to common SPL frameworkAllen Martin2012-10-291-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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