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* armv8: fsl-lsch3: Rewrite MMU translation table entriesAlison Wang2015-09-011-1/+7
| | | | | | | | | This patch rewrites MMU translation table entries. To start, all table entries are written as "invalid", then "device-ngnrnr" and "normal" are written to the entries to enable access to specific addresses. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* armv8: Fix TCR macros for shareability attributeZhichun Hua2015-07-201-2/+2
| | | | | | | | For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit position [13:12] of TCR_ELx register. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Change normal memory shareabilityYork Sun2015-02-241-1/+2
| | | | | | | According to hardware implementation, a single outer shareable global coherence group is defined. Inner shareable has not bee enabled. Signed-off-by: York Sun <yorksun@freescale.com>
* ARMv8: Adjust MMU setupYork Sun2014-07-031-0/+24
| | | | | | | Make MMU function reusable. Platform code can setup its own MMU tables. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* arm64: core supportDavid Feng2014-01-091-0/+111
Relocation code based on a patch by Scott Wood, which is: Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: David Feng <fenghua@phytium.com.cn>
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