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* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-041-2/+0
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| * arm: omap3: fix SRAM copy and execution sequenceAlbert ARIBAUD2013-08-281-2/+0
| | | | | | | | | | | | | | Fix size calculation in copy of go_to_speed into SRAM. Use SRAM_CLK_CODE in call to SRAM-based go_to_speed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | SPDX-License-Identifier: fixing some problematic GPL-2.0 filesWolfgang Denk2013-08-191-18/+1
|/ | | | | | | | | | | | | | | | | Unlike the other patches in this series so far, this commit fixes a ambiguity in the license terms for some OMAP files: the code was originally derived from the Linux kernel sources, where it was clearly marked as GPL-2.0 (i. e. without the "or later" part), but the U-Boot version had a GPL-2.0+ file header added, apparently without permission / relicensing from the original authors of the code. Insert a GPL-2.0 SPDX-License-Identifier to fix this. Signed-off-by: Wolfgang Denk <wd@denx.de> cc: Tom Rix <Tom.Rix@windriver.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Acked-by: Tom Rini <trini@ti.com>
* ARM: omap3: Implement dpll5 (HSUSB clk) workaround for OMAP36xx/AM/DM37xx ↵Naumann Andreas2013-08-152-0/+23
| | | | | | | | | | | | | | according to errata sprz318e. In chapter 'Advisory 2.1 USB Host Clock Drift Causes USB Spec Non-compliance in Certain Configurations' of the TI Errata it is recommended to use certain div/mult values for the DPLL5 clock setup. So far u-boot used the old 34xx values, so I added the errata recommended values specificly for 36xx init only. Also, the FSEL registers exist no longer, so removed them from init. Tested this on a AM3703 board with 19.2MHz oscillator, which previously couldnt lock the dpll5 (kernel complained). As a consequence the EHCI USB port wasnt usable in U-Boot and kernel. With this patch, kernel panics disappear and USB working fine in u-boot and kernel. Signed-off-by: Andreas Naumann <anaumann@ultratronik.de> [trini: Add extern to <asm/arch-omap3/clock.h> Signed-off-by: Tom Rini <trini@ti.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-2417-267/+19
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* ARM: OMAP: GPIO: Fix valid range and enable usage of all GPIOs on OMAP5Axel Lin2013-07-021-0/+2
| | | | | | | | | | | | | | | | The omap_gpio driver is used by AM33XX, OMAP3/4, OMAP54XX and DRA7XX SoCs. These SoCs have different gpio count but currently omap_gpio driver uses hard coded 192 which is wrong. This patch fixes this issue by: 1. Move define of OMAP_MAX_GPIO to all arch/arm/include/asm/arch-omap*/gpio.h. 2. Update gpio bank settings and enable GPIO modules 7 & 8 clocks for OMAP5. Thanks for Lubomir Popov to provide valuable comments to fix this issue. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com> Acked-by: Heiko Schocher <hs@denx.de>
* ARM: OMAP2+: Rename asm/arch/clocks.h asm/arch/clock.hLokesh Vutla2013-06-101-0/+0
| | | | | | | To be consistent with other ARM platforms, renaming asm/arch-omap*/clocks.h to asm/arch-omap*/clock.h Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* OMAP3+: introduce generic ABB supportAndrii Tseglytskyi2013-06-101-0/+7
| | | | | | | | | | | | | | | | | Adaptive Body Biasing (ABB) modulates transistor bias voltages dynamically in order to optimize switching speed versus leakage. Adaptive Body-Bias ldos are present for some voltage domains starting with OMAP3630. There are three modes of operation: * Bypass - the default, it just follows the vdd voltage * Foward Body-Bias - applies voltage bias to increase transistor performance at the cost of power. Used to operate safely at high OPPs. * Reverse Body-Bias - applies voltage bias to decrease leakage and save power. Used to save power at lower OPPs. Signed-off-by: Andrii Tseglytskyi <andrii.tseglytskyi@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
* OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMCTom Rini2013-04-081-0/+3
| | | | | | | | | | | | | | | In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because in addition to being nonsensical, it leads to a hang. This is why we have a test currently for the boot mode being within range. The problem however is that on some platforms we get MMC2_2 as the boot mode and not the defined value for MMC2, and in others we get the value for MMC2_2. This is required to fix eMMC booting on omap5_uevm. Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC). Signed-off-by: Tom Rini <trini@ti.com>
* omap_gpmc: change nandecc commandAndreas Bießmann2013-04-081-1/+1
| | | | | | | | | | | | | With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernelAndreas Bießmann2013-04-081-0/+17
| | | | | | | | | | | | This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
* asm/omap_gpmc.h: consolidate common definesAndreas Bießmann2013-04-081-57/+0
| | | | | | | | | | | | | arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header. Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* omap3/cpu.h: add BCH supportAndreas Bießmann2013-04-081-0/+6
| | | | | | | | | | This patch adds the BCH result registers to register mapping for OMAP3 gpmc. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
* SPL: ONENAND: Fix some ONENAND related defines.Enric Balletbo i Serra2013-03-081-1/+1
| | | | | | | | Some ONENAND related defines use the term ONE_NAND instead of ONENAND, as the technology name is ONENAND this patch replaces all these defines. Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
* omap3: allow dynamic selection of gfx_formatNikita Kiryanov2013-03-081-0/+1
| | | | | | | | | | | | | | | | | Currently, omap3_dss_panel_config() sets gfx_format to a value that is hardcoded in the code. This forces anyone who wants to use a different gfx_format to make adjustments after calling omap3_dss_panel_config(). This could be avoided if the value of gfx_format were parameterized as input for omap3_dss_panel_config(). Make gfx_format a field in struct panel_config, and update existing structs to set this field to the value that was originally hard coded. Cc: Wolfgang Denk <wd@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* omap3: add useful dss definesNikita Kiryanov2013-03-081-0/+30
| | | | | | | | | | | | Add useful omap3 dss defines for: polarity, TFT data lines, lcd display type, gfx burst size, and gfx format Cc: Anatolij Gustschin <agust@denx.de> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* omap: consolidate common mmc definitionsNikita Kiryanov2013-03-081-137/+2
| | | | | | | | | The various mmc_host_def.h files are almost identical. Reduce code duplication by moving the similar definitions to a common header file. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-081-2/+11
|\ | | | | | | | | This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
| * Pass sdrc timing values through board_sdrc_timings structurePeter Barada2012-12-101-2/+11
| | | | | | | | | | | | | | | | | | Instead of passing individual registers by value to board_get_mem_timings, pass a board_mem_timings structure pointer for the board files to fill in. Pass same structure pointer to write_sdrc_timings. This saves about 90 bytes of space in SPL. Signed-off-by: Peter Barada <peter.barada@logicpd.com>
* | OMAP3: am35x: add musb functionsIlya Yanok2012-11-201-0/+28
| | | | | | | | | | | | AM35XX specific functions for integrated USB PHY/MUSB IP. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | OMAP3: am35x_def.h: add USB definesIlya Yanok2012-11-201-0/+27
|/ | | | | | Add defines for MUSB IP block on AM35X SoCs. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* VIDEO: add macro to set LCD size for DSS driverStefano Babic2012-10-251-0/+1
| | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>Tom Rini2012-09-271-0/+34
| | | | | | | Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: video: add macros to set display parametersStefano Babic2012-09-041-0/+10
| | | | | | | Add a common macros to set the registers for horizontal and vertical timing. Signed-off-by: Stefano Babic <sbabic@denx.de>
* video: drop duplicate set of DISPC_CONFIG registerStefano Babic2012-09-041-1/+0
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* OMAP3: add definition of CTRL_WKUP_CTRL registerArnout Vandecappelle (Essensium/Mind)2012-09-041-0/+5
| | | | | | | | | AM/DM37x SoCs add the CTRL_WKUP_CTRL register. It contains the GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads of gpio_126, gpio_127 and gpio_129. Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be> Cc: Tom Rini <trini@ti.com>
* OMAP3: mem: Add Numonyx OneNAND 200MHz timing informationJavier Martinez Canillas2012-09-011-0/+29
| | | | Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
* ARM: OMAP3+: Detect reset typeLokesh Vutla2012-07-072-0/+3
| | | | | | | | | | | | Certain modules are not affected by means of a warm reset and need not be configured again. Adding an API to detect the reset reason warm/cold. This will be used to skip the module configurations that are retained across a warm reset. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com>
* omap3_dss: cosmetic changesJeroen Hofstee2012-05-251-20/+4
| | | | | | | | | | | Remove unnecessary brackets. Unwrap lines which are below 80 chars. Single line comment as single line (as the rest). Moved init values to the source code. cc: s-paulraj@ti.com cc: khasim@ti.com Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
* omap3_dss: add optional framebufferJeroen Hofstee2012-05-251-2/+35
| | | | | | | | | | | | | | The beagle board uses the background color to show an orange screen during startup. This patch adds the ability to add a frame buffer, with the intention not to break the beagle board use case (I don't have one). videomodes.c is not used. Scrolling depends on this patch: http://patchwork.ozlabs.org/patch/155662/ cc: trini@ti.com cc: s-paulraj@ti.com cc: khasim@ti.com Signed-off-by: Jeroen Hofstee <jhofstee@victronenergy.com>
* OMAP3: pandora: pin mux updates for DM3730 board variantGrazvydas Ignotas2012-05-151-0/+6
| | | | | | | DM3730 needs some additional pin mux configuration for GPIOs 126-129 to work, add it. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
* OMAP3+: reset: Create a common reset layer.SRICHARAN R2012-05-151-3/+2
| | | | | | | | | The reset.S has the function to do a warm reset on OMAP based socs. Moving this to a reset.c file so that this acts a common layer to add any reset related functionality for the future. Signed-off-by: R Sricharan <r.sricharan@ti.com>
* ARM:OMAP+:MMC: Add parameters to MMC initJonathan Solnit2012-05-151-2/+6
| | | | | | | | | | Add parameters to the OMAP MMC initialization function so the board can mask host capabilities and set the maximum clock frequency. While the OMAP supports a certain set of MMC host capabilities, individual boards may be more restricted and the OMAP may need to be configured to match the board. The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example. Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
* omap_hsmmc: Wait for CMDI to be clearTom Rini2012-02-151-1/+1
| | | | | | | | | | | | | | | | | Before we can send a command we need both the DATI (command inhibit on mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear. The previous behavior of only checking on DATI was insufficient on some cards and incorrect behavior in any case. This makes the code check for both bits being clear and makes the error print more clear as to what happened. DATI_CMDDIS is removed as it was unused elsewhere in the code and stood for 'DATI is set, cmds are disabled still'. Fix originally spotted by Peter Bigot. Tested-by: Peter A. Bigot <bigotp@acm.org> Tested-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
* ARMV7: Fix duplicate use of "b" parameter in ACTIM_CTRLA definitionPeter Barada2012-02-121-28/+29
| | | | | | | | ACTIM_CTRLA macro errently passes "b" parameter to ACTIM_CTRLA_TRAS() instead of "c". To make usage more clear, replace all single-letter macro parameters with more descriptive parameter names. Signed-off-by: Peter Barada <peter.barada@logicpd.com>
* AM3517: Changed default clock rate for AM3517Schuyler Patton2012-02-121-1/+1
| | | | | | | | | | | | AM3517: Changed default clock rate for AM3517 Changed #define MPU_M_13_ES2 from 0x1F4 to 0x258, this allows the AM3517 to boot up at 600MHz instead of 500 MHz Signed-off-by: Schuyler Patton <spatton@ti.com> CC: Tom Rini <tom.rini@gmail.com> CC: Simon Schwarz <simonschwarzcor@gmail.com> CC: Stefano Babic <sbabic@denx.de>
* OMAP3+: Clock: Adding ehci clock enablingGovindraj.R2012-02-121-0/+1
| | | | | | | | | | Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from clock framework. Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
* ehci-omap: Clean up added ehci-omap.cGovindraj.R2012-02-121-24/+21
| | | | | | | | | | | | | | | | | | Clean up added ehci-omap.c and make it generic for re-use across omap-soc having same ehci ip block. Also pass the modes to be configured from board file and configure the ports accordingly. All usb layers are not cache aligned, till then keep cache off for usb ops as ehci will use internally dma for all usb ops. * Add a generic common header ehci-omap.h having common ip block data and reg shifts. * Rename and modify ehci-omap3 to ehci.h retain only conflicting sysc reg shifts remove others and move to common header file. * pass the board data for beagle/panda accordinly to use ehci ports. Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
* overo: add SPL supportAndreas Müller2012-01-161-0/+26
| | | | | | | | | | * implementation based on ti beagleboard/omap3evm * timing data and i2c workaround for revision 0 boards taken from x-loader * run-tested with overo revision 0 and 1 / boot from NAND and SDcard * run-tested with x-loader Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to omap3_evmTom Rini2011-12-061-0/+26
| | | | | | | Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>. This also changes CONFIG_SYS_TEXT_BASE to 0x80100000. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add SPL support to BeagleboardTom Rini2011-12-061-0/+29
| | | | | | | | | | | | | | | | | | This introduces 200MHz Micron parts timing information based on x-loader to <asm/arch-omap3/mem.h> and Numonyx MCFG calculation. The memory init logic is also based on what x-loader does in these cases. Note that while previously u-boot would be flashed in with SW ECC in this case it now must be flashed with HW ECC. We also change CONFIG_SYS_TEXT_BASE to 0x80100000. Cc: Dirk Behme <dirk.behme@gmail.com> Beagleboard rev C5, xM rev A: Tested-by: Tom Rini <trini@ti.com> Beagleboard xM rev C: Tested-by: Matt Ranostay <mranostay@gmail.com> Beagleboard rev B7, C2, xM rev B: Tested-by: Matt Porter <mporter@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Add identify_nand_chip functionTom Rini2011-12-061-0/+1
| | | | | | | | | | A number of boards are populated with a PoP chip for both DDR and NAND memory. Other boards may simply use this as an easy way to identify board revs. So we provide a function that can be called early to reset the NAND chip and return the result of NAND_CMD_READID. All of this code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3 SPL: Rework memory initalization and devkit8000 supportTom Rini2011-12-062-26/+2
| | | | | | | | | This changes to making the board be responsible for providing the memory initialization timings in SPL and converts the devkit8000 to this framework. In SPL we try and initialize both CS0 and CS1. Cc: Frederik Kriewitz <frederik@kriewitz.eu> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Suffix all Micron memory timing parts with their speedTom Rini2011-12-061-10/+11
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Add optimal SDRC autorefresh control valuesTom Rini2011-12-061-5/+11
| | | | | | | | This adds the optimal SDRC autorefresh control register values for 100Mhz, 133MHz, 165MHz and 200MHz clocks. We switch to using this to provide the default 165MHz value. Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Add MCFG helper macroTom Rini2011-12-061-16/+30
| | | | | | | | | This adds an MCFG macro to calculate the correct value, similar to the ACTIMA/ACTIMB macros and adds a comment that all of the potential values here are documented in the TRM. Then we convert the Micron value to use this macro. Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: Remove get_mem_type prototypeTom Rini2011-12-061-1/+0
| | | | | | This function doesn't exist for omap3 Signed-off-by: Tom Rini <trini@ti.com>
* omap3: mem: Comment enable_gpmc_cs_config moreTom Rini2011-12-061-0/+4
| | | | | | | Expand the "enable the config" comment to explain what the bit shifts are and define out two of the magic numbers. Signed-off-by: Tom Rini <trini@ti.com>
* AM3517: move AM3517 specific mux defines to generic headerIlya Yanok2011-12-061-0/+41
| | | | | | | AM3517 specific CONTROL_PADCONF_* defines moved from board-specific files to <asm/arch-omap3/mux.h> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* AM35xx: add EMAC supportIlya Yanok2011-12-062-0/+59
| | | | | | AM35xx has DaVinci-compatible EMAC. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
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