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* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-05-241-2/+3
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| * armv8/ls1043a: update the node for QSPI supportYuan Yao2016-05-181-2/+3
| | | | | | | | | | | | | | | | The address value and size value set for QSPI dts node "reg" property have type of u64 on arm64. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-05-242-1/+3
|\ \ | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/zynq_gem.c
| * | arm: dts: dra7: fix ethernet name with proper device addressMugunthan V N2016-05-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix typo error for cpsw device name with proper device address Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | arm: dts: dra7: add syscon node to cpsw to read mac addressMugunthan V N2016-05-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add syscon node to cpsw device node to read mac address from efuse. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | arm: dts: am4372: add syscon node to cpsw to read mac addressMugunthan V N2016-05-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add syscon node to cpsw device node to read mac address from efuse. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSIMichal Simek2016-05-241-0/+5
| | | | | | | | | | | | | | | | | | Add missing u-boot,dm-pre-reloc to get IPs initialized. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | ARM64: zynqmp: Align gic ranges for 64k in device treeAlexander Graf2016-05-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GIC ranges in the zynqmp device tree are only 4kb aligned. Since commit 12e14066f we automatically deal with aliases GIC regions though, so we can map them transparently into guests even on 64kb page size systems. This patch makes use of that features and sets GICC and GICV to 64kb aligned and sized regions. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-busMasahiro Yamada2016-05-241-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9f56917ab88a ("dm: core: make simple-bus compatible to simple-mfd") made possible to import the following commit: Linux commit: bc5ba9b98435bf76d92e0954da1784695aa449f1 The SLCR (System-Level Control Registers) block is an MFD (Multi Function Device) rather than a bus. "simple-mfd" seems a more suitable compatible string than "simple-bus". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | dm: spi: soft_spi: switch to use linux compatible stringPeng Fan2016-05-171-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Support compatible string "spi-gpio" which is used by Linux Linux use different bindings, so use UBOOT_COMPAT and LINUX_COMPAT to differentiate them. 2. Introduce SPI_MASTER_NO_RX and SPI_MASTER_NO_TX to handle no rx or no tx case. 3. Tested on i.MX6 UltraLite board with 74LV595 spi-gpio chip. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | video: tegra: refuse to bind to disabled dcsStephen Warren2016-05-171-4/+0
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | This prevents the following boot-time message on any board where only the first DC is in use, yet the DC's DT node is enabled: stdio_add_devices: Video device failed (ret=-22) (This happens on at least Harmony, Ventana, and likely any other Tegra20 board with display enabled other than Seaboard). The Tegra DC's DT node represents a display controller. It may itself drive an integrated RGB display output, or be used by some other display controller such as HDMI. For this reason the DC node itself is not enabled/disabled in DT; the DC itself is considered a shared resource, not the final (board-specific) display output. The node should instantiate a display output driver only if the rgb subnode is enabled. Other output drivers are free to use the DC if they are enabled and their DT node references the DC's DT node. Adapt the Tegra display drivers' bind() routine to only bind to the DC's DT node if the RGB subnode is enabled. Now that the display driver does the right thing, remove the workaround for this issue from Seaboard's DT file. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: socfpga: Disable USB OC protection on SoCratesMarek Vasut2016-05-061-0/+1
| | | | | | | | This is mandatory, otherwise the USB does not work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* ARM: hisilicon: hikey: dts: Add pl011 additional clock binding.Peter Griffin2016-04-251-0/+5
| | | | | | | | This is a binding which only exists in U-Boot, but is required to get working serial in U-Boot. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: hisilicon: hikey: Enable OF_CONTROL for hikey board.Peter Griffin2016-04-251-0/+2
| | | | | | | | | | | Currently only the serial pl01x driver is using DT, and the other drivers still use platform data but as more DT lands in the upstream kernel the aim is to migrate the other drivers over to DT as well to have a fully DT configured hikey u-boot. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: hisilicon: hikey: Add hikey & hi6220 dts from v4.6-rc3.Peter Griffin2016-04-252-0/+254
| | | | | | | | | Import the upstream kernel dts into U-Boot. Currently only serial is supported, but a lot more DT changes are queued for v4.7. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dts: uniphier: add SD controller node for PH1-LD20Masahiro Yamada2016-04-241-0/+17
| | | | | | | PH1-LD20 does not support 1.8V signaling for SD card; only Default Speed and High Speed (up to 50MHz) with 3.3V signaling is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: move aliases node up to satisfy fdtgrepMasahiro Yamada2016-04-242-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | Currently, fdtgrep would not accept uniphier-ph1-ld20-ref.dtb and uniphier-ph1-ld11-ref.dtb unless the aliases node comes the first in the root node. $ make -s uniphier_pxs2_ld6b_defconfig $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld20-ref [snip] LDS spl/u-boot-spl.lds LD spl/u-boot-spl OBJCOPY spl/u-boot-spl-nodtb.bin FDTGREP spl/u-boot-spl.dtb Error at 'fdt_find_regions': FDT_ERR_BADLAYOUT /aliases node must come before all other nodes Error: FDT_ERR_BADMAGIC make[1]: *** [spl/u-boot-spl.dtb] Error 1 make: *** [spl/u-boot-spl] Error 2 This commit moves the aliases node as the error message from the fdtgrep tool suggests, although this requirement does not sound reasonable to me. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: use Ref Daughter board on PH1-LD20 Ref boardMasahiro Yamada2016-04-241-0/+1
| | | | | | | This makes the EEPROM device on the Reference Daughter board available. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-04-204-3/+8
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| * arm: socfpga: socrates: Add eth0 alias to enable ethernetStefan Roese2016-04-201-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This enables full ethernet usage, including U-Boot to write the board specific MAC address (ethaddr) into the DT blob before passing it to Linux. Without this, the ethaddr is not detected in U-Boot at all, resulting in this error upon bootup: ... Model: EBV SOCrates Net: Error: ethernet@ff702000 address not set. No ethernet found. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * arm: socfpga: Fix typos in DT files (environmnet -> environment)Stefan Roese2016-04-203-3/+3
| | | | | | | | | | | | | | | | | | | | Fix a small typo in some of the SoCFPGA dts files that has spread via copy-and-paste. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | ARM: dts: dra7xx: am57xx: fix cd-gpios definition as per hardware design and ↵Mugunthan V N2016-04-183-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dt binding docs As per mmc device tree binding documentation card detect gpio has to be active low signal. When a hardware is designed with active high card detect, gpio polarity has to be changed with cd-inverted dt property. In DRA72x and AM57xx EVMs the card detect gpio is designed as active low gpio. So correcting the dt card detect gpio definition. Also adding card-detect gpio for DRA74x EVM. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: dts: am43xx: fix cd-gpios definition as per hardware design and dt ↵Mugunthan V N2016-04-182-2/+2
|/ | | | | | | | | | | | | | | binding docs As per mmc device tree binding documentation card detect gpio has to be active low signal. When a hardware is designed with active high card detect, gpio polarity has to be changed with cd-inverted dt property. In AM43xx the card detect gpio is designed as active low gpio. So correcting the dt card detect gpio definition. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-1320-100/+1981
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| * ARM64: zynqmp: Add support for zc1751 with DC cardsMichal Simek2016-04-134-1/+572
| | | | | | | | | | | | Support ZynqMP zc1751 with DC cards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add support for ZCU102 platformMichal Simek2016-04-134-1/+878
| | | | | | | | | | | | Add new board support. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing nand node for ep108Punnaiah Choudary Kalluri2016-04-132-0/+35
| | | | | | | | | | | | | | Add missing nand node for ep108. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dtsAnurag Kumar Vulisha2016-04-131-0/+9
| | | | | | | | | | | | | | | | This patch adds the sata port phy OOB timing values in the sata device-tree node. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use 64bit size cell format for memory nodeMichal Simek2016-04-132-4/+4
| | | | | | | | | | | | Enable option to support more then 4GB memories in single size block. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Fix DWC3 binding with the kernelMichal Simek2016-04-132-10/+42
| | | | | | | | | | | | Use the same binding as is used in mainline Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add serdes address space dp driverMichal Simek2016-04-131-1/+2
| | | | | | | | | | | | For run time serdes adjustment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Align register descriptionMichal Simek2016-04-131-2/+5
| | | | | | | | | | | | Separate register space and put it on more lines. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: dp: Add default properties to zynqmp.dtsiHyun Kwon2016-04-131-0/+3
| | | | | | | | | | | | | | Add some default properties to zynqmp.dtsi. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use correct addresses in node namesHyun Kwon2016-04-131-2/+2
| | | | | | | | | | | | | | Reflect actual silicon addresses in DT node names. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Align node address with parent node for dpdmaMichal Simek2016-04-131-6/+6
| | | | | | | | | | | | Use right addresses for channel names Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add backward compatible string for uartMichal Simek2016-04-131-2/+2
| | | | | | | | | | | | | | | | | | Mainline kernel has no r1p12 compatible string that's why console stops to work with the latest DTS files. Append generic compatible string. Keep in your mind that using this generic compatible string not all uart features will be available. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Fix coding style for pcieMichal Simek2016-04-131-4/+4
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Extend pcie node to support legacy interruptsBharat Kumar Gogada2016-04-131-0/+10
| | | | | | | | | | | | | | | | Modifying device tree node to support legacy interrupts. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add interrupt-controller property to gpio nodesMichal Simek2016-04-131-0/+2
| | | | | | | | | | | | | | | | GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add ddrc node in dtsNaga Sureshkumar Relli2016-04-131-0/+7
| | | | | | | | | | | | | | | | | | This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added clocks to DTVNSL Durga2016-04-131-0/+8
| | | | | | | | | | | | | | | | | | ZynqMP DMA's main clock and apb clock are added in zynqmp DT. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
| * ARM64: zynqmp: Add CCI-400 nodeMichal Simek2016-04-131-0/+19
| | | | | | | | | | | | Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek2016-04-131-0/+1
| | | | | | | | | | | | | | | | | | ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: DT: Add power domainsSoren Brinkmann2016-04-131-0/+210
| | | | | | | | | | | | | | | | | | | | Add power-domains to the DT and attach devices to them. The power-domains are all logical domains as understood by firmware. Each PD is identified by a unique identifier that the platform firmware understands. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodesP L Sai Krishna2016-04-131-0/+2
| | | | | | | | | | | | | | | | This patch adds broken-tuning property to SD and eMMC nodes. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Sync GEM nodes with LinuxMichal Simek2016-04-131-12/+4
| | | | | | | | | | | | | | | | Remove jumbo properties which are handled in the driver directly and use mainline compatible string which is already handled by the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Hook up the GEMs to the SMMUEdgar E. Iglesias2016-04-131-0/+8
| | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias2016-04-131-5/+5
| | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add 8-bit bus width property.P L Sai Krishna2016-04-131-0/+1
| | | | | | | | | | | | | | This patch add 8-bit bus width property to eMMC node. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: dt: Change qspi node compatible stringRanjit Waghmode2016-04-131-1/+1
| | | | | | | | | | | | | | | | This patch makes compatible string as "m25p80" for qspi node in ep108 device tree file Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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