summaryrefslogtreecommitdiffstats
path: root/arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c
Commit message (Collapse)AuthorAgeFilesLines
* ARM: OMAP5/DRA7: Expose do_set_iodelayNishanth Menon2016-03-271-2/+2
| | | | | | | | do_set_iodelay can now be used from board files based on needs of the platforms variation they have. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP5/DRA7: Split iodelay functionality into sub stepsNishanth Menon2016-03-271-14/+50
| | | | | | | | | | | | | | | | Since many platforms may need different pad configuration required depending on variation of the platform with minor deltas, it is easier to maintain a sub step based approach to allow for pin mux and iodelay configuration which may depend on the platform variations and need to be done in IO isolation. While we retain the older __recalibrate_iodelay function which provides a ready sequencing, __recalibrate_iodelay_start and __recalibrate_iodelay_end may be alternatively used now and the callers will be responsible for the correct sequencing of operations. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Add support for manual mode configurationLokesh Vutla2015-06-121-1/+100
| | | | | | | | | | | | | | | | | | In addition to the regular mux configuration, certain pins of DRA7 require to have "manual mode" also programmed, when predefined delay characteristics cannot be used for the interface. struct iodelay_cfg_entry is introduced for populating manual mode IO timings. For configuring manual mode, along with the normal pad configuration do the following steps: - Select MODESELECT field of each assocaited PAD. CTRL_CORE_PAD_XXX[8]:MODESELECT = 1(Enable MANUAL_MODE macro along with mux) - Populate A_DELAY, G_DELAY values that are specified in DATA MANUAL. And pass the offset of the CFG_XXX register in iodelay_cfg_entry. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: DRA7: Add support for IO delay configurationLokesh Vutla2015-06-121-0/+139
On DRA7, in addition to the regular muxing of pins, an additional hardware module called IODelay which is also expected to be configured. This "IODelay" module has it's own register space that is independent of the control module. It is advocated strongly in TI's official documentation considering the existing design of the DRA7 family of processors during mux or IODelay recalibration, there is a potential for a significant glitch which may cause functional impairment to certain hardware. It is hence recommended to do muxing as part of IOdelay recalibration. IODELAY recalibration sequence: - Complete AVS voltage change on VDD_CORE_L - Unlock IODLAY config registers. - Perform IO delay calibration with predefined values. - Isolate all the IOs - Update the delay mechanism for each IO with new calibrated values. - Configure PAD configuration registers - De-isolate all the IOs. - Relock IODELAY config registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>
OpenPOWER on IntegriCloud