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* i.mx6:imx6q: allign MAC address with burned-in orderingJason Liu2012-01-161-6/+8
| | | | | | | | | | | | | | | | For the i.mx6q, the burned-in MAC address will be the following odering, fuse: 0x620[7:0] MAC_ADDR[7:0] ---> mac[5] fuse: 0x620[15:8] MAC_ADDR[15:8] ---> mac[4] fuse: 0x620[23:16] MAC_ADDR[23:16] ---> mac[3] fuse: 0x620[31:24] MAC_ADDR[31:24] ---> mac[2] fuse: 0x630[7:0] MAC_ADDR[39:32] ---> mac[1] fuse: 0x630[15:8] MAC_ADDR[47:40] ---> mac[0] This patch also fix the error caculation for the fuse bank[0] address Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* net: imx: Add multi-FEC support for imx_get_mac_from_fuseFabio Estevam2012-01-161-1/+1
| | | | | | | | | | Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter. This feature is important on mx28 SoC for example that has two FEC ports. Cc: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx: i.mx6q: Add the enet clock functionJason Liu2012-01-161-0/+5
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jason Liu <jason.hui@linaro.org> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx: add the initial support for freescale i.MX6Q processorJason Liu2011-12-095-0/+591
i.MX6Q is freescale quad core processors with ARM cortex_a9 complex. This patch is to add the initial support for this processor. Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc:Stefano Babic <sbabic@denx.de>
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