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| | * driver/ddr/fsl: Add DDR4 support to Freescale DDR driverYork Sun2014-04-221-1/+12
| | | | | | | | | | | | | | | | | | | | | Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
| | * QE/FMAN: modify CONFIG_SYS_QE_FMAN_FW_ADDR to CONFIG_SYS_FMAN_FW_ADDR and ↵Zhao Qiang2014-04-221-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_QE_FW_ADDR CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address. Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address, and CONFIG_SYS_QE_FW_ADDR for QE microcode address. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * powerpc/mpc85xx: SECURE BOOT- Add secure boot target for B4860QDSAneesh Bansal2014-04-221-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changes: 1. L2 cache is being invalidated by Boot ROM code for e6500 core. So removing the invalidation from start.S 2. Clear the LAW and corresponding configuration for CPC. Boot ROM code uses it as hosekeeping area. 3. For Secure boot, CPC is configured as SRAM and used as house keeping area. This configuration is to be disabled once in uboot. Earlier this disabling of CPC as SRAM was happening in cpu_init_r. As a result cache invalidation function was getting skipped in case CPC is configured as SRAM.This was causing random crashes. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | cosmetic: README: add some entries to Directory HierarchyMasahiro Yamada2014-04-201-0/+5
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | mips: xburst: remove remainders of dead boardMasahiro Yamada2014-04-201-1/+0
| |/ | | | | | | | | | | | | | | | | | | Commit 54e458de deleted qi_lb60 board support because of the incompatible license issue. There is no board with XBurst CPU. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * Merge branch 'next'Tom Rini2014-04-171-0/+1
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| | * aes: Add 'aes' command to access AES-128-CBCMarek Vasut2014-03-211-0/+1
| | | | | | | | | | | | | | | | | | | | | Add simple 'aes' command, which allows using the AES-128-CBC encryption and decryption functions from U-Boot command line. Signed-off-by: Marek Vasut <marex@denx.de>
* | | NAND: DaVinci: allow forced disable of subpage writesKaricheri, Muralidharan2014-04-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Tom Rini <trini@ti.com>
* | | README: Add CONFIG_SPL_OS_BOOT to READMETom Rini2014-04-171-0/+4
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
* | | mtd: Add a CONFIG_SPL_MTD_SUPPORT for a more full NAND subsystem in SPLTom Rini2014-04-171-0/+4
|/ / | | | | | | | | | | | | | | This mainly converts the am335x_spl_bch driver to the "normal" format which means a slight change to nand_info within the driver. Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-081-1/+11
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * | new commands: uuid and guid - generate random unique identifierPrzemyslaw Marczak2014-04-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those commands basis on implementation of random UUID generator version 4 which is described in RFC4122. The same algorithm is used for generation both ids but string representation is different as below. char: 0 9 14 19 24 36 xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx UUID: be be be be be GUID: le le le be be Commands usage: - uuid [<varname>] - guid [<varname>] The result is saved in environment as a "varname" variable if argument is given, if not then it is printed. New config: - CONFIG_CMD_UUID Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: trini@ti.com
| * | usb: dfu: introduce dfuMANIFEST stateHeiko Schocher2014-03-231-0/+10
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on nand flash using ubi, after the download of the new image into the flash, the "rest" of the nand sectors get erased while flushing the medium. With current u-boot version dfu-util may show: Starting download: [##################################################] finished! state(7) = dfuMANIFEST, status(0) = No error condition is present unable to read DFU status as get_status is not answered while erasing sectors, if erasing needs some time. So do the following changes to prevent this: - introduce dfuManifest state According to dfu specification ( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7: "the device enters the dfuMANIFEST-SYNC state and awaits the solicitation of the status report by the host. Upon receipt of the anticipated DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it completes its reprogramming operations." - when stepping into dfuManifest state, sending a PollTimeout DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host (dfu-util) waits the PollTimeout before sending a get_status again. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* | ARM: Add workaround for Cortex-A9 errata 761320Nitin Garg2014-04-071-0/+1
| | | | | | | | | | | | | | | | | | Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* | ARM: Add workaround for Cortex-A9 errata 794072Nitin Garg2014-04-071-0/+1
|/ | | | | | | | | A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* Add 64-bit data support for memory commandsYork Sun2014-03-041-0/+3
| | | | | | | | | | Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new size ".q " is introduced. For 64-bit architecture, 64-bit data is enabled by default, by detecting compiler __LP64__. It is optional for other architectures. Signed-off-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-261-7/+1
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * arm: Switch to -mno-unaligned-access when supported by the compilerTom Rini2014-02-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we tell the compiler to optimize for ARMv7 (and ARMv6 for that matter) it assumes a default of SCTRL.A being cleared and unaligned accesses being allowed and fast at the hardware level. We set this bit and must pass along -mno-unaligned-access so that the compiler will still breakdown accesses and not trigger a data abort. To better help understand the requirements of the project with respect to unaligned memory access, the Documentation/unaligned-memory-access.txt file has been added as doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1 tag of the kernel. Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Tom Rini <trini@ti.com>
| * arm: remove unneeded symbol offsets and _TEXT_BASEAlbert ARIBAUD2014-02-261-6/+0
| | | | | | | | | | | | | | | | Remove the last uses of symbol offsets in ARM U-Boot. Remove some needless uses of _TEXT_BASE. Remove all _TEXT_BASE definitions. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | driver/ddr: Add 256 byte interleaving supportYork Sun2014-02-211-0/+5
| | | | | | | | | | | | | | Freescale LayerScape SoCs support controller interleaving on 256 byte size. This interleaving is mandoratory. Signed-off-by: York Sun <yorksun@freescale.com>
* | Driver/ddr: Add support of different DDR base addressYork Sun2014-02-211-0/+5
| | | | | | | | | | | | | | | | | | DDR base address has been the same from the view of core and DDR controllers. This has changed for Freescale ARM-based SoCs. Controllers setup DDR memory in a contiguous space and cores view it at separated locations. Signed-off-by: York Sun <yorksun@freescale.com>
* | driver/ddr: Change Freescale ARM DDR driver to support both big and little ↵York Sun2014-02-211-0/+6
| | | | | | | | | | | | | | | | | | endian Initially it was believed the DDR controller on Freescale ARM would have big endian. But some platform will have little endian. Signed-off-by: York Sun <yorksun@freescale.com>
* | fs/fdos: RemoveTom Rini2014-02-211-1/+0
| | | | | | | | | | | | We have an unused FAT implementation in fs/fdos, remove. Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-201-1/+0
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| * Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-201-1/+3
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: Makefile drivers/net/npe/Makefile These two conflicts arise from commit 0b2d3f20 ("ARM: NET: Remove the IXP NPE ethernet driver") and are resolved by deleting the drivers/net/npe/Makefile file and removing the CONFIG_IXP4XX_NPE line from Makefile.
| * \ Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'Albert ARIBAUD2014-02-191-1/+0
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| | * | ARM: IXP: Remove the IXP architecture supportMarek Vasut2014-02-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The architecture is unmaintained and dead, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michael Schwingen <michael@schwingen.org> Cc: Tom Rini <trini@ti.com>
* | | | i2c, bootcount: add support for bootcounter on i2c devicesHeiko Schocher2014-02-201-0/+20
| |_|/ |/| | | | | | | | | | | | | | | | | add support for bootcounter on an i2c device. And add a README for all bootcounter options. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | doc: README: Correct file name of signature verification documentationDetlev Zundel2014-02-191-1/+1
| | | | | | | | | | | | Signed-off-by: Detlev Zundel <dzu@denx.de>
* | | README: document CONFIG_CMD_FS_GENERICStephen Warren2014-02-191-0/+2
|/ / | | | | | | | | | | | | | | This enables generic filesystem commands such as load and ls, which automatically work with multiple filesystem types, without having to be told which is present, unlike e.g. ext2load, fatls. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | Merge branch 'clk' of git://www.denx.de/git/u-boot-microblazeTom Rini2014-02-041-0/+1
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| * | common: Add new clk commandMichal Simek2014-02-041-0/+1
| |/ | | | | | | | | | | | | | | Command provides just dump subcommand for showing clock frequencies in a soc. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | driver/ifc:Change accessor function to take care of endiannessPrabhakar Kushwaha2014-02-031-0/+6
|/ | | | | | | | | | | IFC registers can be of type Little Endian or big Endian depending upon Freescale SoC. Here SoC defines the register type of IFC IP. So update acessor functions with common IFC acessor functions to take care both type of endianness. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* powerpc:Rename CONFIG_PBLRCW_CONFIG & CONFIG_SYS_FSL_PBL_PBIPrabhakar Kushwaha2014-01-211-0/+9
| | | | | | | | | Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG. Also add their details in README. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* sf: Add CONFIG_SF_DUAL_FLASHJagannadha Sutradharudu Teki2014-01-121-0/+6
| | | | | | | This config will use for defining greater than single flash support. currently - DUAL_STACKED and DUAL_PARALLEL. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* powerpc/mpc85xx: Add support for single source clockingPriyanka Jain2014-01-021-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Single-source clocking is new feature introduced in T1040. In this mode, a single differential clock is supplied to the DIFF_SYSCLK_P/N inputs to the processor, which in turn is used to supply clocks to the sysclock, ddrclock and usbclock. So, both ddrclock and syclock are driven by same differential sysclock in single-source clocking mode whereas in normal clocking mode, generally separate DDRCLK and SYSCLK pins provides reference clock for sysclock and ddrclock DDR_REFCLK_SEL rcw bit is used to determine DDR clock source -If DDR_REFCLK_SEL rcw bit is 0, then DDR PLLs are driven in normal clocking mode by DDR_Reference clock -If DDR_REFCLK_SEL rcw bit is 1, then DDR PLLs are driven in single source clocking mode by DIFF_SYSCLK Add code to determine ddrclock based on DDR_REFCLK_SEL rcw bit. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
* board/freescale:Remove use of CONFIG_SPL_NAND_MINIMALPrabhakar Kushwaha2014-01-021-0/+3
| | | | | | | | | CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary review purpose. So, use CONFIG_SPL_NAND_BOOT config. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* Add dumpimage, a tool to extract data from U-Boot imagesGuilherme Maciel Ferreira2013-12-131-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given a multi-file image created through the mkimage's -d option: $ mkimage -A x86 -O linux -T multi -n x86 -d vmlinuz:initrd.img:System.map \ multi.img Image Name: x86 Created: Thu Jul 25 10:29:13 2013 Image Type: Intel x86 Linux Multi-File Image (gzip compressed) Data Size: 13722956 Bytes = 13401.32 kB = 13.09 MB Load Address: 00000000 Entry Point: 00000000 Contents: Image 0: 4040128 Bytes = 3945.44 kB = 3.85 MB Image 1: 7991719 Bytes = 7804.41 kB = 7.62 MB Image 2: 1691092 Bytes = 1651.46 kB = 1.61 MB It is possible to perform the innverse operation -- extracting any file from the image -- by using the dumpimage's -i option: $ dumpimage -i multi.img -p 2 System.map Although it's feasible to retrieve "data files" from image through scripting, the requirement to embed tools such 'dd', 'awk' and 'sed' for this sole purpose is cumbersome and unreliable -- once you must keep track of file sizes inside the image. Furthermore, extracting data files using "dumpimage" tool is faster than through scripting. Signed-off-by: Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-12-101-0/+19
|\ | | | | | | | | | | | | | | Conflicts: board/samsung/trats2/trats2.c include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-101-5/+90
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
| * | arm, am33x: make RTC32K OSC enable configurableHeiko Schocher2013-11-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast states: "Initialize devices only when they are needed within U-Boot" enable the RTC32K OSC only, if CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is enabled. Enable this in ti_am335x_common.h, so all boards in mainline should work as before. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| * | bootcount: store bootcount var in environmentHeiko Schocher2013-11-111-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If no softreset save registers are found on the hardware "bootcount" is stored in the environment. To prevent a saveenv on all reboots, the environment variable "upgrade_available" is introduced. If "upgrade_available" is 0, "bootcount" is always 0 therefore no need to save the environment on u-boot boot, if "upgrade_available" is 1 "bootcount" is incremented in the environment and environment gets written on u-boot start. So the Userspace Applikation must set the "upgrade_available" and "bootcount" variable to 0 (for example with fw_setenv), if a boot was successfully. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | i2c: samsung: register i2c busses for Exynso5420 and Exynos5250Naveen Krishna Ch2013-12-061-0/+6
| |/ |/| | | | | | | | | | | | | This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels on Exynos5420 and Exynos5250 and also adds support for init function for hsi2c channels Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-12-021-5/+39
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| * | Driver/DDR: Add Freescale DDR driver for ARMYork Sun2013-11-251-0/+3
| | | | | | | | | | | | | | | | | | | | | Make PowerPC specific code conditional so ARM SoCs can reuse this driver. Add DDR3 driver for ARM. Signed-off-by: York Sun <yorksun@freescale.com>
| * | Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2013-11-251-5/+36
| | | | | | | | | | | | | | | | | | | | | Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
* | | gpio_led: add support for inverted polarityIgor Grinberg2013-11-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some GPIO connected LEDs have inverted polarity. Introduce new config option: CONFIG_GPIO_LED_INVERTED_TABLE for the specifying the inverted GPIO LEDs list and add support for this in the gpio_led driver. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Ilya Ledvich <ilya@compulab.co.il>
* | | README: document the CONFIG_GPIO_LED symbolIgor Grinberg2013-11-251-0/+8
|/ / | | | | | | | | | | | | The CONFIG_GPIO_LED symbol does not have any documentation in the README file. Document the CONFIG_GPIO_LED symbol. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* | i2c, zynq: convert zynq i2c driver to new multibus/multiadapter frameworkHeiko Schocher2013-11-131-0/+5
| | | | | | | | | | | | | | | | | | - add zync i2c driver to new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com>
* | i2c, omap24xx: convert driver to new mutlibus/mutliadapter frameworkHeiko Schocher2013-11-131-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/ Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Tom Rini <trini@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Thomas Weber <weber@corscience.de> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Nishanth Menon <nm@ti.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Michael Jones <michael.jones@matrix-vision.de> Cc: Raphael Assenat <raph@8d.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefano Babic <sbabic@denx.de>
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