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* sunxi: emac: Add driver model supportHans de Goede2015-05-042-1/+84
| | | | | | | | Modify the sunxi-emac eth driver to support driver model. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
* sunxi: emac: Rename DMA_CPU_TRRESHOLD to EMAC_RX_BUFSIZEHans de Goede2015-05-041-2/+2
| | | | | | | | | | | Besides being spelled wrong, the DMA_CPU_TRRESHOLD define actually has nothing to do with DMA as we only use mmio fifo access. Rename it to EMAC_RX_BUFSIZE to properly reflect what it does. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
* sunxi: emac: Prepare for driver-model supportHans de Goede2015-05-041-44/+71
| | | | | | | | | | Split all the core functionality out into functions taking a struct emac_eth_dev *priv argument as preparation for adding driver-model support. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
* sunxi: emac: port to phylibHans de Goede2015-05-042-42/+71
| | | | | | | | | This is a preparation-patch for adding device-model support to the emac driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Stefan Roese <sr@denx.de>
* sunxi: gmac: Move sunxi_gmac_initialize proto out of netdev.hHans de Goede2015-05-042-1/+3
| | | | | | | | | | | netdev.h should not be included in driver-model enabled builds (doing so causes compiler warnings about struct eth_driver not being declared), but we do use sunxi_gmac_initialize in the driver-model case, so move it out of netdev.h . Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Add driver-model support to the axp_gpio codeHans de Goede2015-05-043-3/+57
| | | | | | | | | | Add driver-model support to the axp_gpio code, note that this needs a small tweak to the driver-model version of sunxi_name_to_gpio to deal with the vbus detect and enable pins which are not standard numbered gpios. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Move axp gpio code to a separate axpi-gpio driverHans de Goede2015-05-0423-173/+222
| | | | | | | | | | | | | | | | | | | | Move the axp-gpio code out of the drivers/power/axp*.c code, and into a new separate axpi-gpio driver. This change drops supports for the gpio3 pin on the axp209, as that requires special handling, and no boards are using it. Besides cleaning things up by moving the code to a separate driver, as a bonus this change also adds support for the (non vusb) gpio pins on the axp221 and the gpio pins on the axp152. The new axp-gpio driver gets its own Kconfig option, and is only enabled on boards which need it. Besides that it only gets enabled in the regular u-boot build and not for the SPL as we never need it in the SPL. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Add support for i2c based PMICs to the pmic-bus helpersHans de Goede2015-05-042-8/+29
| | | | | | | | | | Add support for the axp152 and axp209 PMICs to the pmic register access helpers. This is a preparation patch for moving the axp gpio code to a separate gpio driver. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Move axp pmic register helpers to a separate fileHans de Goede2015-05-045-126/+166
| | | | | | | | | | | Move the register helpers used to access the registers via p2wi resp. rsb bus on the otherwise identical axp221 and axp223 pmics to a separate file, so that they can be used by the upcoming standalone axp gpio driver too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: axp: Change axp_gpio_foo prototypes to match gpio uclass opsHans de Goede2015-05-045-22/+26
| | | | | | | | | | | | | Change the axp_gpio_foo function prototypes to match the gpio uclass op prototypes, this is a preparation patch for moving the axp gpio code to a separate driver-model gpio driver. Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c this adds are removed in a later patch. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Build sunxi_name_to_gpio_bank for driver-model code tooHans de Goede2015-05-041-14/+14
| | | | | | | | | | When doing a driver-model enabled build we still need sunxi_name_to_gpio_bank (for now) for the mmc pinmux code in board/sunxi/board.c, so build it for driver-model enabled builds too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Add compatible strings for all supported SoCsHans de Goede2015-05-041-0/+7
| | | | | | | | | We want to use driver-model/fdt with other model SoCs too, so add compatible strings for the other SoCs to the dm sunxi gpio code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: gpio: Add temporary implementation of name_to_gpio()Simon Glass2015-05-041-0/+11
| | | | | | | | | | | | Until sunxi moves to device tree (e.g. for USB) we need to convert named GPIOs to numbers. Add a function to do this. This fixes the USB / EHCI support not working on the LinkSprite pcDuino3 (which uses devicemodel). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: gpio: Rename GPIOs to include a 'P' prefixSimon Glass2015-05-041-3/+4
| | | | | | | | | By convention, sunxi GPIOs are named PA1, PA2 instead of A1, A2. Change the driver model GPIO driver for sunxi to use these names. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: soft-i2c: Fix gpio handling to work with the driver-modelHans de Goede2015-05-041-6/+38
| | | | | | | | | | | | | i2c_init_board() gets called before the driver-model (gpio) code is initialized, so move the setup of the soft-i2c pins out of i2c_init_board() and into board_init(), at which time the driver-model setup has been done. Also add proper error checking and properly request the gpios as that is mandatory with the driver-model. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: display: Fix gpio handling to work with the driver-modelHans de Goede2015-05-041-8/+8
| | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi display code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: usbc: Fix vbus gpio handling to work with the driver-modelHans de Goede2015-05-041-10/+11
| | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi usbc properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: mmc: Fix card-detect gpio handling to work with the driver-modelHans de Goede2015-05-041-3/+4
| | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Do not build i2c support when we've no i2c controllersHans de Goede2015-05-041-4/+3
| | | | | | | | | | | This fixes the following errors being printed during boot: Error, wrong i2c adapter 0 max 0 possible Error, wrong i2c adapter 0 max 0 possible Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add Ippo_q8h_v1_2_a33_1024x600 defconfigHans de Goede2015-05-042-0/+24
| | | | | | | | Add a defconfig for generic 7" tablets using the Ippo q8h v1.2 pcb, with an A33 SoC (the pcb can take an A23 or an A33), and a 1024x600 LCD. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add softwinner astar mid756 A33 tablet board defconfigVishnu Patekar2015-05-042-0/+30
| | | | | | | | | | | The Astar MID756 is a 7" tablet using the A33 SoC with a 800x480 LCD screen, 512M RAM, 8G ROM and integrated sdio wifi. Also see: http://linux-sunxi.org/Softwinner_astar-rda Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add basic A33 basic supportVishnu Patekar2015-05-046-0/+26
| | | | | | | | Enable full support for the A33 SoC including display, otg-usb, etc. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add a33 dram init codeVishnu Patekar2015-05-043-0/+544
| | | | | | | | | | | | Based on Allwinner dram init code from the a33 bsp: https://github.com/allwinner-zh/bootloader/blob/master/basic_loader/bsp/bsp_for_a33/init_dram/mctl_hal.c Initial u-boot port by Vishnu Patekar, major cleanup / rewrite by Hans de Goede. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add support for A33 PLL11 (second DRAM pll)Hans de Goede2015-05-042-3/+46
| | | | | | | Add support for the new second DRAM PLL found on the A33 SoC. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: s/sun8i/sun8i_a23/Hans de Goede2015-05-049-9/+15
| | | | | | | | This is a preparation patch for adding A33 support, which will have a mach name of sun8i-a33. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig boolHans de Goede2015-05-049-21/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: usbc: Remove unused irq fieldHans de Goede2015-05-041-16/+0
| | | | | | | | We do not use irqs in u-boot so remove the unused irq field, and all the #ifdef-ery around the irq initialization. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Also set Auxiliary Ctl SMP bit in SPLHans de Goede2015-05-041-2/+3
| | | | | | | There is no reason not to and this make the #ifdef-ery easier to read. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sun7i: Remove duplicate call to psci_arch_initJan Kiszka2015-05-021-1/+0
| | | | | | | | | | | | | | | This is already invoked a few cycles later in monitor mode by _secure_monitor (_sunxi_cpu_entry calls _do_nonsec_entry which triggers _secure_monitor via smc #0). Drop it here, it serves no purpose. CC: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-2947-50/+914
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| * ARM: zynq: rename CONFIG_ZYNQ to CONFIG_ARCH_ZYNQMasahiro Yamada2015-04-2912-12/+12
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: move SoC headers to mach-zynq/include/machMasahiro Yamada2015-04-294-0/+0
| | | | | | | | | | | | | | | | Move arch/arm/include/asm/arch-zynq/* -> arch/arm/mach-zynq/include/mach/* Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: move SoC sources to mach-zynqMasahiro Yamada2015-04-2915-4/+4
| | | | | | | | | | | | | | Move arch/arm/cpu/armv7/zynq/* -> arch/arm/mach-zynq/* Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: pass "-mfpu=neon" only to lowlevel_init.SMasahiro Yamada2015-04-292-7/+1
| | | | | | | | | | | | | | | | | | The comment line in arch/arm/cpu/armv7/zynq/config.mk says that the option "-mfpu=neon" is necessary for compiling lowlevel_init.S. We do not have to give it to all the source files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Enable SDHCI0 optionsMichal Simek2015-04-292-0/+14
| | | | | | | | | | | | | | Enable SDHCI0 for zynqmp. Add empty gpio.h because of sdhci requirement. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Enable FS_GENERIC optionSiva Durga Prasad Paladugu2015-04-291-2/+3
| | | | | | | | | | | | | | Provide an option to write filesystem independend commands. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Add SPI driver support for ZynqMPSiva Durga Prasad Paladugu2015-04-292-0/+10
| | | | | | | | | | | | | | | | | | Added the SPI driver support for ZynqMP The controller is same as zynq SPI controller Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
| * zynqmp: i2c: Enable i2c driver for zynqMPSiva Durga Prasad Paladugu2015-04-292-0/+26
| | | | | | | | | | | | | | | | | | | | Enable the i2c driver for ZynqMP Also enable the eeprom for read and writes to eeprom on ZynqMP ZynqMP uses the same i2c controller as in Zynq Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Add support for EMMC bootmodeMichal Simek2015-04-292-1/+3
| | | | | | | | | | | | Add support for EMMC bootmode. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Add support for emulation platform - VeloceMichal Simek2015-04-294-2/+12
| | | | | | | | | | | | | | Add support for Veloce - zynqmp emulation platform. Platform doesn't support SDHCI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: timer: Fix wrong timer calculationSiva Durga Prasad Paladugu2015-04-291-1/+3
| | | | | | | | | | | | | | | | | | | | Fix wrong timer calculation in get_timer_masked incase of overflow. This fixes the issue of getting wrong time from get_timer() calls. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: sdhci: Remove the quirk SDHCI_QUIRK_NO_CDSiva Durga Prasad Paladugu2015-04-291-1/+1
| | | | | | | | | | | | | | | | Remove the quirk SDHCI_QUIRK_NO_CD as it is not required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynqmp: Add support for R5 sw loadingMichal Simek2015-04-294-3/+285
| | | | | | | | | | | | | | Add support for loading sw for R5 with enabling for zynqmp. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * zynqmp: caches: Enable dcache for zynqmpSiva Durga Prasad Paladugu2015-04-292-1/+165
| | | | | | | | | | | | | | | | Define the mmu table till 2MB granularity enable dcaches for zynqmp. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: slcr: Disable all level shiftersSiva Durga Prasad Paladugu2015-04-291-0/+7
| | | | | | | | | | | | | | | | | | | | | | Disable all level shifters before enabling the PS-to-PL level shifters as it would be good to disable all level shifters before enabling the PS-to-PL in order to ensure that it is in proper state Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: drop legacy ps7_init.c/h supportMasahiro Yamada2015-04-294-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We are about to change the location for ps7_init files, breaking the current work-flows. It is good time to drop the legacy ps7_init.c/h support. Going forward, please use ps7_init_gpl.c/h all the time. If you are still using old Xilinx tools that are only able to generate ps7_init.c/h, rename them into ps7_init_gpl.c/h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Add Zynq PicoZed board supportNathan Rossi2015-04-295-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PicoZed is a System-on-Module board which is marketed as part of the ZedBoard/MicroZed/etc. collection. It includes a Zynq-7000 processor. This patch adds support that covers all the variants of the PicoZed including the SKUs with Z7010/Z7020 and Z7015/Z7030 Zynq chips. This patch set however only covers support for the System-on-Module and does not cover any extra components that are available on carrier boards (except those that are fanned out of the module itself). More information on this board, its variants and available carrier boards is available at: http://zedboard.org/product/picozed Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * serial: zynq: Add support for slow emulation platformMichal Simek2015-04-291-1/+7
| | | | | | | | | | | | | | | | On slow platforms not all baudrate setting is valid. Check it directly in the driver and setup maximum possible frequency. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Enable GPIO driver and GPIO commandsMichal Simek2015-04-291-0/+3
| | | | | | | | | | | | Enable GPIO driver and GPIO commands. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * gpio: add Xilinx Zynq PS GPIO driverAndrea Scian2015-04-293-0/+287
| | | | | | | | | | | | | | | | | | Most of the code is taken (and adapted) from Linux kernel driver. Just add CONFIG_ZYNQ_GPIO to you config to enable it Signed-off-by: Andrea Scian <andrea.scian@dave.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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