diff options
Diffstat (limited to 'post/cpu')
| -rw-r--r-- | post/cpu/mpc8xx/cache.c | 4 | ||||
| -rw-r--r-- | post/cpu/mpc8xx/cache_8xx.S | 4 | ||||
| -rw-r--r-- | post/cpu/mpc8xx/ether.c | 10 | ||||
| -rw-r--r-- | post/cpu/mpc8xx/spr.c | 6 | ||||
| -rw-r--r-- | post/cpu/mpc8xx/uart.c | 30 | ||||
| -rw-r--r-- | post/cpu/mpc8xx/usb.c | 6 | ||||
| -rw-r--r-- | post/cpu/mpc8xx/watchdog.c | 4 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/cache.c | 6 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/cache_4xx.S | 16 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/denali_ecc.c | 4 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/ether.c | 10 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/ocm.c | 22 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/spr.c | 4 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/uart.c | 42 | ||||
| -rw-r--r-- | post/cpu/ppc4xx/watchdog.c | 4 |
15 files changed, 86 insertions, 86 deletions
diff --git a/post/cpu/mpc8xx/cache.c b/post/cpu/mpc8xx/cache.c index 36965a1672..06cb501bd5 100644 --- a/post/cpu/mpc8xx/cache.c +++ b/post/cpu/mpc8xx/cache.c @@ -32,7 +32,7 @@ #include <post.h> #include <watchdog.h> -#if CONFIG_POST & CFG_POST_CACHE +#if CONFIG_POST & CONFIG_SYS_POST_CACHE #define CACHE_POST_SIZE 1024 @@ -75,4 +75,4 @@ int cache_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_CACHE */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */ diff --git a/post/cpu/mpc8xx/cache_8xx.S b/post/cpu/mpc8xx/cache_8xx.S index a3fc39bda1..097eedb421 100644 --- a/post/cpu/mpc8xx/cache_8xx.S +++ b/post/cpu/mpc8xx/cache_8xx.S @@ -33,7 +33,7 @@ #include <ppc_defs.h> #include <asm/cache.h> -#if CONFIG_POST & CFG_POST_CACHE +#if CONFIG_POST & CONFIG_SYS_POST_CACHE .text @@ -490,4 +490,4 @@ cache_post_test6_data: blr #endif /* CONFIG_MPC823 || MPC850 || MPC855 || MPC860 */ -#endif /* CONFIG_POST & CFG_POST_CACHE */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */ diff --git a/post/cpu/mpc8xx/ether.c b/post/cpu/mpc8xx/ether.c index 2fa5cf4ac9..5622cb7d2a 100644 --- a/post/cpu/mpc8xx/ether.c +++ b/post/cpu/mpc8xx/ether.c @@ -36,7 +36,7 @@ */ #include <post.h> -#if CONFIG_POST & CFG_POST_ETHER +#if CONFIG_POST & CONFIG_SYS_POST_ETHER #if defined(CONFIG_8xx) #include <commproc.h> #elif defined(CONFIG_MPC8260) @@ -120,7 +120,7 @@ CPM_CR_CH_SCC4 }; int i; scc_enet_t *pram_ptr; - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; immr->im_cpm.cp_scc[scc_index].scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); @@ -143,7 +143,7 @@ CPM_CR_CH_SCC4 }; rxIdx = 0; txIdx = 0; -#ifdef CFG_ALLOC_DPRAM +#ifdef CONFIG_SYS_ALLOC_DPRAM rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + dpram_alloc_align (sizeof (RTXBD), 8)); #else @@ -452,7 +452,7 @@ CPM_CR_CH_SCC4 }; static void scc_halt (int scc_index) { - volatile immap_t *immr = (immap_t *) CFG_IMMR; + volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR; immr->im_cpm.cp_scc[scc_index].scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); @@ -624,4 +624,4 @@ int ether_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_ETHER */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_ETHER */ diff --git a/post/cpu/mpc8xx/spr.c b/post/cpu/mpc8xx/spr.c index 83f04da55d..db84dbe504 100644 --- a/post/cpu/mpc8xx/spr.c +++ b/post/cpu/mpc8xx/spr.c @@ -35,7 +35,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_SPR +#if CONFIG_POST & CONFIG_SYS_POST_SPR static struct { @@ -80,7 +80,7 @@ static struct {159, "BAR", 0x00000000, 0x00000000}, {630, "DPDR", 0x00000000, 0x00000000}, {631, "DPIR", 0x00000000, 0x00000000}, - {638, "IMMR", 0xFFFF0000, CFG_IMMR }, + {638, "IMMR", 0xFFFF0000, CONFIG_SYS_IMMR }, {560, "IC_CST", 0x8E380000, 0x00000000}, {561, "IC_ADR", 0x00000000, 0x00000000}, {562, "IC_DAT", 0x00000000, 0x00000000}, @@ -146,4 +146,4 @@ int spr_post_test (int flags) return ret; } -#endif /* CONFIG_POST & CFG_POST_SPR */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_SPR */ diff --git a/post/cpu/mpc8xx/uart.c b/post/cpu/mpc8xx/uart.c index 635debe8d3..f351ac06d7 100644 --- a/post/cpu/mpc8xx/uart.c +++ b/post/cpu/mpc8xx/uart.c @@ -37,7 +37,7 @@ */ #include <post.h> -#if CONFIG_POST & CFG_POST_UART +#if CONFIG_POST & CONFIG_SYS_POST_UART #if defined(CONFIG_8xx) #include <commproc.h> #elif defined(CONFIG_MPC8260) @@ -84,7 +84,7 @@ static void smc_init (int smc_index) { static int cpm_cr_ch[] = { CPM_CR_CH_SMC1, CPM_CR_CH_SMC2 }; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -105,15 +105,15 @@ static void smc_init (int smc_index) im->im_siu_conf.sc_sdcr = 1; /* clear error conditions */ -#ifdef CFG_SDSR - im->im_sdma.sdma_sdsr = CFG_SDSR; +#ifdef CONFIG_SYS_SDSR + im->im_sdma.sdma_sdsr = CONFIG_SYS_SDSR; #else im->im_sdma.sdma_sdsr = 0x83; #endif /* clear SDMA interrupt mask */ -#ifdef CFG_SDMR - im->im_sdma.sdma_sdmr = CFG_SDMR; +#ifdef CONFIG_SYS_SDMR + im->im_sdma.sdma_sdmr = CONFIG_SYS_SDMR; #else im->im_sdma.sdma_sdmr = 0x00; #endif @@ -133,7 +133,7 @@ static void smc_init (int smc_index) * the buffer descriptors. */ -#ifdef CFG_ALLOC_DPRAM +#ifdef CONFIG_SYS_ALLOC_DPRAM dpaddr = dpram_alloc_align (sizeof (cbd_t) * 2 + 2, 8); #else dpaddr = CPM_POST_BASE; @@ -218,7 +218,7 @@ static void smc_putc (int smc_index, const char c) volatile cbd_t *tbdf; volatile char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (smc_uart_t *) & cpmp->cp_dparam[proff_smc[smc_index]]; @@ -250,7 +250,7 @@ static int smc_getc (int smc_index) volatile cbd_t *rbdf; volatile unsigned char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; int i; @@ -293,7 +293,7 @@ static void scc_init (int scc_index) CPM_CR_CH_SCC4, }; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile scc_t *sp; volatile scc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -313,7 +313,7 @@ static void scc_init (int scc_index) /* Allocate space for two buffer descriptors in the DP ram. */ -#ifdef CFG_ALLOC_DPRAM +#ifdef CONFIG_SYS_ALLOC_DPRAM dpaddr = dpram_alloc_align (sizeof (cbd_t) * 2 + 2, 8); #else dpaddr = CPM_POST_BASE; @@ -420,7 +420,7 @@ static void scc_init (int scc_index) static void scc_halt(int scc_index) { - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); volatile scc_t *sp = (scc_t *) & (cp->cp_scc[scc_index]); @@ -432,7 +432,7 @@ static void scc_putc (int scc_index, const char c) volatile cbd_t *tbdf; volatile char *buf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (scc_uart_t *) & cpmp->cp_dparam[proff_scc[scc_index]]; @@ -464,7 +464,7 @@ static int scc_getc (int scc_index) volatile cbd_t *rbdf; volatile unsigned char *buf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; int i; @@ -553,4 +553,4 @@ int uart_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_UART */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */ diff --git a/post/cpu/mpc8xx/usb.c b/post/cpu/mpc8xx/usb.c index 58779812f6..e3fe075be5 100644 --- a/post/cpu/mpc8xx/usb.c +++ b/post/cpu/mpc8xx/usb.c @@ -36,7 +36,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_USB +#if CONFIG_POST & CONFIG_SYS_POST_USB #include <commproc.h> #include <command.h> @@ -105,7 +105,7 @@ typedef struct usb { int usb_post_test (int flags) { int res = -1; - volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); volatile usb_param_t *pram_ptr; uint dpram; @@ -262,4 +262,4 @@ int usb_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_USB */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_USB */ diff --git a/post/cpu/mpc8xx/watchdog.c b/post/cpu/mpc8xx/watchdog.c index f94158aa6f..da191c232c 100644 --- a/post/cpu/mpc8xx/watchdog.c +++ b/post/cpu/mpc8xx/watchdog.c @@ -36,7 +36,7 @@ #include <post.h> #include <watchdog.h> -#if CONFIG_POST & CFG_POST_WATCHDOG +#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG static ulong gettbl (void) { @@ -72,4 +72,4 @@ int watchdog_post_test (int flags) } } -#endif /* CONFIG_POST & CFG_POST_WATCHDOG */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */ diff --git a/post/cpu/ppc4xx/cache.c b/post/cpu/ppc4xx/cache.c index be6a2bf54c..482f819f2d 100644 --- a/post/cpu/ppc4xx/cache.c +++ b/post/cpu/ppc4xx/cache.c @@ -33,7 +33,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_CACHE +#if CONFIG_POST & CONFIG_SYS_POST_CACHE #include <asm/mmu.h> #include <watchdog.h> @@ -54,7 +54,7 @@ __attribute__((__aligned__(CACHE_POST_SIZE))); int cache_post_test (int flags) { - void *virt = (void *)CFG_POST_CACHE_ADDR; + void *virt = (void *)CONFIG_SYS_POST_CACHE_ADDR; int ints; int res = 0; int tlb = -1; /* index to the victim TLB entry */ @@ -119,4 +119,4 @@ int cache_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_CACHE */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */ diff --git a/post/cpu/ppc4xx/cache_4xx.S b/post/cpu/ppc4xx/cache_4xx.S index 455ffa0726..3f3e5850f9 100644 --- a/post/cpu/ppc4xx/cache_4xx.S +++ b/post/cpu/ppc4xx/cache_4xx.S @@ -31,7 +31,7 @@ #include <asm/cache.h> #include <asm/mmu.h> -#if CONFIG_POST & CFG_POST_CACHE +#if CONFIG_POST & CONFIG_SYS_POST_CACHE .text @@ -115,8 +115,8 @@ cache_post_wb: */ cache_post_dinvalidate: dcbi r0, r3 - addi r3, r3, CFG_CACHELINE_SIZE - subic. r4, r4, CFG_CACHELINE_SIZE + addi r3, r3, CONFIG_SYS_CACHELINE_SIZE + subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE bgt cache_post_dinvalidate sync blr @@ -125,8 +125,8 @@ cache_post_dinvalidate: */ cache_post_dstore: dcbst r0, r3 - addi r3, r3, CFG_CACHELINE_SIZE - subic. r4, r4, CFG_CACHELINE_SIZE + addi r3, r3, CONFIG_SYS_CACHELINE_SIZE + subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE bgt cache_post_dstore sync blr @@ -135,8 +135,8 @@ cache_post_dstore: */ cache_post_dtouch: dcbt r0, r3 - addi r3, r3, CFG_CACHELINE_SIZE - subic. r4, r4, CFG_CACHELINE_SIZE + addi r3, r3, CONFIG_SYS_CACHELINE_SIZE + subic. r4, r4, CONFIG_SYS_CACHELINE_SIZE bgt cache_post_dtouch sync blr @@ -486,4 +486,4 @@ cache_post_test_inst: li r3, -1 blr -#endif /* CONFIG_POST & CFG_POST_CACHE */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_CACHE */ diff --git a/post/cpu/ppc4xx/denali_ecc.c b/post/cpu/ppc4xx/denali_ecc.c index 12a1bbfa87..6ab1593138 100644 --- a/post/cpu/ppc4xx/denali_ecc.c +++ b/post/cpu/ppc4xx/denali_ecc.c @@ -35,7 +35,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_ECC +#if CONFIG_POST & CONFIG_SYS_POST_ECC /* * MEMORY ECC test @@ -267,5 +267,5 @@ int ecc_post_test(int flags) debug("ecc_post_test() returning %d\n", ret); return ret; } -#endif /* CONFIG_POST & CFG_POST_ECC */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_ECC */ #endif /* defined(CONFIG_440EPX) || defined(CONFIG_440GRX) */ diff --git a/post/cpu/ppc4xx/ether.c b/post/cpu/ppc4xx/ether.c index ccbfcf91ae..e40e19be23 100644 --- a/post/cpu/ppc4xx/ether.c +++ b/post/cpu/ppc4xx/ether.c @@ -39,7 +39,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_ETHER +#if CONFIG_POST & CONFIG_SYS_POST_ETHER #include <asm/cache.h> #include <asm/io.h> @@ -209,7 +209,7 @@ static void ether_post_init (int devnum, int hw_addr) mtdcr (malrxcasr, (MAL_TXRX_CASR >> devnum)); /* set internal loopback mode */ -#ifdef CFG_POST_ETHER_EXT_LOOPBACK +#ifdef CONFIG_SYS_POST_ETHER_EXT_LOOPBACK out_be32 ((void*)(EMAC_M1 + hw_addr), EMAC_M1_FDE | 0 | EMAC_M1_RFS_4K | EMAC_M1_TX_FIFO_2K | EMAC_M1_MF_100MBPS | EMAC_M1_IST | @@ -406,8 +406,8 @@ int ether_post_test (int flags) int i; /* Allocate tx & rx packet buffers */ - tx_buf = malloc (PKTSIZE_ALIGN + CFG_CACHELINE_SIZE); - rx_buf = malloc (PKTSIZE_ALIGN + CFG_CACHELINE_SIZE); + tx_buf = malloc (PKTSIZE_ALIGN + CONFIG_SYS_CACHELINE_SIZE); + rx_buf = malloc (PKTSIZE_ALIGN + CONFIG_SYS_CACHELINE_SIZE); if (!tx_buf || !rx_buf) { printf ("Failed to allocate packet buffers\n"); @@ -427,4 +427,4 @@ out_free: return res; } -#endif /* CONFIG_POST & CFG_POST_ETHER */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_ETHER */ diff --git a/post/cpu/ppc4xx/ocm.c b/post/cpu/ppc4xx/ocm.c index 88aa93ea1e..584e30cf8f 100644 --- a/post/cpu/ppc4xx/ocm.c +++ b/post/cpu/ppc4xx/ocm.c @@ -38,19 +38,19 @@ DECLARE_GLOBAL_DATA_PTR; #define OCM_TEST_PATTERN1 0x55555555 #define OCM_TEST_PATTERN2 0xAAAAAAAA -#if CONFIG_POST & CFG_POST_OCM +#if CONFIG_POST & CONFIG_SYS_POST_OCM static uint ocm_status_read(void) { - return in_be32((void *)CFG_OCM_STATUS_ADDR) & - CFG_OCM_STATUS_MASK; + return in_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR) & + CONFIG_SYS_OCM_STATUS_MASK; } static void ocm_status_write(uint value) { - out_be32((void *)CFG_OCM_STATUS_ADDR, value | - (in_be32((void *)CFG_OCM_STATUS_ADDR) & - ~CFG_OCM_STATUS_MASK)); + out_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR, value | + (in_be32((void *)CONFIG_SYS_OCM_STATUS_ADDR) & + ~CONFIG_SYS_OCM_STATUS_MASK)); } static inline int ocm_test_word(uint value, uint *address) @@ -68,11 +68,11 @@ int ocm_post_test(int flags) { uint old_value; int ret = 0; - uint *address = (uint*)CFG_OCM_BASE; + uint *address = (uint*)CONFIG_SYS_OCM_BASE; - if (ocm_status_read() == CFG_OCM_STATUS_OK) + if (ocm_status_read() == CONFIG_SYS_OCM_STATUS_OK) return 0; - for (; address < (uint*)(CFG_OCM_BASE + CFG_OCM_SIZE); address++) { + for (; address < (uint*)(CONFIG_SYS_OCM_BASE + CONFIG_SYS_OCM_SIZE); address++) { old_value = *address; if (ocm_test_word(OCM_TEST_PATTERN1, address) || ocm_test_word(OCM_TEST_PATTERN2, address)) { @@ -83,7 +83,7 @@ int ocm_post_test(int flags) } *address = old_value; } - ocm_status_write(ret ? CFG_OCM_STATUS_FAIL : CFG_OCM_STATUS_OK); + ocm_status_write(ret ? CONFIG_SYS_OCM_STATUS_FAIL : CONFIG_SYS_OCM_STATUS_OK); return ret; } -#endif /* CONFIG_POST & CFG_POST_OCM */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_OCM */ diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c index 110df6e910..ecb87b53ac 100644 --- a/post/cpu/ppc4xx/spr.c +++ b/post/cpu/ppc4xx/spr.c @@ -37,7 +37,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_SPR +#if CONFIG_POST & CONFIG_SYS_POST_SPR #include <asm/processor.h> @@ -198,4 +198,4 @@ int spr_post_test (int flags) return ret; } -#endif /* CONFIG_POST & CFG_POST_SPR */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_SPR */ diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index 1a57c3dd1f..84a4d0a0d6 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -34,14 +34,14 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_UART +#if CONFIG_POST & CONFIG_SYS_POST_UART /* * This table defines the UART's that should be tested and can * be overridden in the board config file */ -#ifndef CFG_POST_UART_TABLE -#define CFG_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE} +#ifndef CONFIG_SYS_POST_UART_TABLE +#define CONFIG_SYS_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE} #endif #include <asm/processor.h> @@ -50,17 +50,17 @@ #if defined(CONFIG_440) #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) -#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300 -#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400 -#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000500 -#define UART3_BASE CFG_PERIPHERAL_BASE + 0x00000600 +#define UART0_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000300 +#define UART1_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000400 +#define UART2_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000500 +#define UART3_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000600 #else -#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000200 -#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300 +#define UART0_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000200 +#define UART1_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000300 #endif #if defined(CONFIG_440SP) || defined(CONFIG_440SPE) -#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600 +#define UART2_BASE CONFIG_SYS_PERIPHERAL_BASE + 0x00000600 #endif #if defined(CONFIG_440GP) @@ -147,7 +147,7 @@ DECLARE_GLOBAL_DATA_PTR; #if defined(CONFIG_440) || defined(CONFIG_405EX) -#if !defined(CFG_EXT_SERIAL_CLOCK) +#if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK) static void serial_divs (int baudrate, unsigned long *pudiv, unsigned short *pbdiv) { @@ -196,7 +196,7 @@ static int uart_post_init (unsigned long dev_base) unsigned long udiv; unsigned short bdiv; volatile char val; -#ifdef CFG_EXT_SERIAL_CLOCK +#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK unsigned long tmp; #endif int i; @@ -209,11 +209,11 @@ static int uart_post_init (unsigned long dev_base) MFREG(UART0_SDR, reg); reg &= ~CR0_MASK; -#ifdef CFG_EXT_SERIAL_CLOCK +#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK reg |= CR0_EXTCLK_ENA; udiv = 1; tmp = gd->baudrate * 16; - bdiv = (CFG_EXT_SERIAL_CLOCK + tmp / 2) / tmp; + bdiv = (CONFIG_SYS_EXT_SERIAL_CLOCK + tmp / 2) / tmp; #else /* For 440, the cpu clock is on divider chain A, UART on divider * chain B ... so cpu clock is irrelevant. Get the "optimized" @@ -278,7 +278,7 @@ static int uart_post_init (unsigned long dev_base) #ifdef CONFIG_405EP reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK); clk = gd->cpu_clk; - tmp = CFG_BASE_BAUD * 16; + tmp = CONFIG_SYS_BASE_BAUD * 16; udiv = (clk + tmp / 2) / tmp; if (udiv > UDIV_MAX) /* max. n bits for udiv */ udiv = UDIV_MAX; @@ -287,16 +287,16 @@ static int uart_post_init (unsigned long dev_base) mtdcr (cpc0_ucr, reg); #else /* CONFIG_405EP */ reg = mfdcr(cntrl0) & ~CR0_MASK; -#ifdef CFG_EXT_SERIAL_CLOCK - clk = CFG_EXT_SERIAL_CLOCK; +#ifdef CONFIG_SYS_EXT_SERIAL_CLOCK + clk = CONFIG_SYS_EXT_SERIAL_CLOCK; udiv = 1; reg |= CR0_EXTCLK_ENA; #else clk = gd->cpu_clk; -#ifdef CFG_405_UART_ERRATA_59 +#ifdef CONFIG_SYS_405_UART_ERRATA_59 udiv = 31; /* Errata 59: stuck at 31 */ #else - tmp = CFG_BASE_BAUD * 16; + tmp = CONFIG_SYS_BASE_BAUD * 16; udiv = (clk + tmp / 2) / tmp; if (udiv > UDIV_MAX) /* max. n bits for udiv */ udiv = UDIV_MAX; @@ -375,7 +375,7 @@ done: int uart_post_test (int flags) { int i, res = 0; - static unsigned long base[] = CFG_POST_UART_TABLE; + static unsigned long base[] = CONFIG_SYS_POST_UART_TABLE; for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) { if (test_ctlr (base[i], i)) @@ -386,4 +386,4 @@ int uart_post_test (int flags) return res; } -#endif /* CONFIG_POST & CFG_POST_UART */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_UART */ diff --git a/post/cpu/ppc4xx/watchdog.c b/post/cpu/ppc4xx/watchdog.c index 7fdecb485c..221adfc115 100644 --- a/post/cpu/ppc4xx/watchdog.c +++ b/post/cpu/ppc4xx/watchdog.c @@ -37,7 +37,7 @@ #include <post.h> -#if CONFIG_POST & CFG_POST_WATCHDOG +#if CONFIG_POST & CONFIG_SYS_POST_WATCHDOG #include <watchdog.h> @@ -65,4 +65,4 @@ int watchdog_post_test (int flags) } } -#endif /* CONFIG_POST & CFG_POST_WATCHDOG */ +#endif /* CONFIG_POST & CONFIG_SYS_POST_WATCHDOG */ |
