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-rw-r--r--include/configs/apf27.h2
-rw-r--r--include/configs/aristainetos-common.h2
-rw-r--r--include/configs/at91-sama5_common.h8
-rw-r--r--include/configs/cgtqmx6eval.h2
-rw-r--r--include/configs/cm_fx6.h2
-rw-r--r--include/configs/embestmx6boards.h2
-rw-r--r--include/configs/flea3.h2
-rw-r--r--include/configs/gw_ventana.h2
-rw-r--r--include/configs/imx31_phycore.h2
-rw-r--r--include/configs/ls1021aqds.h2
-rw-r--r--include/configs/ls1021atwr.h2
-rw-r--r--include/configs/ls2085a_common.h2
-rw-r--r--include/configs/m53evk.h2
-rw-r--r--include/configs/mx25pdk.h2
-rw-r--r--include/configs/mx35pdk.h2
-rw-r--r--include/configs/mx53ard.h2
-rw-r--r--include/configs/mx53evk.h2
-rw-r--r--include/configs/mx53loco.h2
-rw-r--r--include/configs/mx53smd.h2
-rw-r--r--include/configs/mx6qsabreauto.h2
-rw-r--r--include/configs/mx6sabre_common.h10
-rw-r--r--include/configs/mx6sabresd.h2
-rw-r--r--include/configs/mx6slevk.h2
-rw-r--r--include/configs/mx6sxsabresd.h2
-rw-r--r--include/configs/mx6ul_14x14_evk.h2
-rw-r--r--include/configs/mx7dsabresd.h2
-rw-r--r--include/configs/nitrogen6x.h2
-rw-r--r--include/configs/novena.h2
-rw-r--r--include/configs/ot1200.h2
-rw-r--r--include/configs/pcm052.h231
-rw-r--r--include/configs/platinum.h2
-rw-r--r--include/configs/smartweb.h4
-rw-r--r--include/configs/sunxi-common.h42
-rw-r--r--include/configs/tbs2910.h4
-rw-r--r--include/configs/titanium.h2
-rw-r--r--include/configs/tqma6.h2
-rw-r--r--include/configs/usbarmory.h2
-rw-r--r--include/configs/vf610twr.h2
-rw-r--r--include/configs/wandboard.h2
-rw-r--r--include/configs/warp.h2
-rw-r--r--include/configs/woodburn_common.h2
-rw-r--r--include/net.h4
42 files changed, 350 insertions, 23 deletions
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 43fbdd3d11..49fbcac776 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -317,6 +317,8 @@
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h
index 20afdd6bc0..f03297e137 100644
--- a/include/configs/aristainetos-common.h
+++ b/include/configs/aristainetos-common.h
@@ -189,6 +189,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7f
diff --git a/include/configs/at91-sama5_common.h b/include/configs/at91-sama5_common.h
index 3d6b0ae0c3..a5990cec03 100644
--- a/include/configs/at91-sama5_common.h
+++ b/include/configs/at91-sama5_common.h
@@ -53,6 +53,13 @@
#define CONFIG_CMD_DHCP
#ifdef CONFIG_SYS_USE_MMC
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+/* Use raw reserved sectors to save environment */
+#define CONFIG_ENV_OFFSET 0x2000
+#define CONFIG_ENV_SIZE 0x1000
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#else
/* u-boot env in sd/mmc card */
#define CONFIG_ENV_IS_IN_FAT
#define CONFIG_FAT_WRITE
@@ -60,6 +67,7 @@
#define FAT_ENV_DEVICE_AND_PART "0"
#define FAT_ENV_FILE "uboot.env"
#define CONFIG_ENV_SIZE 0x4000
+#endif
#define CONFIG_BOOTCOMMAND "if test ! -n ${dtb_name}; then " \
"setenv dtb_name at91-${board_name}.dtb; " \
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 7158ab0f2b..e0aa4b0894 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -39,6 +39,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 12734a10bf..05132047b7 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -198,6 +198,8 @@
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_MXC_I2C3_SPEED 400000
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 58cee96ac3..f55ba9f706 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -33,6 +33,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index 5b4b011957..f646feefa9 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -52,6 +52,8 @@
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */
#define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 231bea7855..484d76305f 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -107,6 +107,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_GSC 0
diff --git a/include/configs/imx31_phycore.h b/include/configs/imx31_phycore.h
index 86f327c827..3bea71b969 100644
--- a/include/configs/imx31_phycore.h
+++ b/include/configs/imx31_phycore.h
@@ -38,6 +38,8 @@
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_CLK_OFFSET I2C2_CLK_OFFSET
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index b44f3264e3..f73900fe30 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -389,6 +389,8 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/*
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 7dcb719b01..f6bd5fcece 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -275,6 +275,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* EEPROM */
diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index 2dbb5f70a9..55b909ceac 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -97,6 +97,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
diff --git a/include/configs/m53evk.h b/include/configs/m53evk.h
index 35058e222a..8853d8fcc0 100644
--- a/include/configs/m53evk.h
+++ b/include/configs/m53evk.h
@@ -172,6 +172,8 @@
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_RTC_BUS_NUM 1 /* I2C2 */
#endif
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index bd7216e47b..04140865f4 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -115,6 +115,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
/* RTC */
#define CONFIG_RTC_IMXDI
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index c9983f3f58..6bfdaa6432 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -42,6 +42,8 @@
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_MXC_SPI
#define CONFIG_MXC_GPIO
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 0479195d6d..b889c254cc 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -48,6 +48,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* MMC Configs */
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 82c8af802f..4f304ed89f 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -41,6 +41,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* PMIC Configs */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index ad2629da72..3a65861e5e 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -76,6 +76,8 @@
/* I2C Configs */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* PMIC Controller */
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
index bcdb054360..e46f2eeecb 100644
--- a/include/configs/mx53smd.h
+++ b/include/configs/mx53smd.h
@@ -38,6 +38,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
/* MMC Configs */
diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h
index 11cf538b0a..1c998058a9 100644
--- a/include/configs/mx6qsabreauto.h
+++ b/include/configs/mx6qsabreauto.h
@@ -51,6 +51,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index 2970b83109..9dcc64ea57 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -80,6 +80,10 @@
"boot_fdt=try\0" \
"ip_dyn=yes\0" \
"console=" CONFIG_CONSOLE_DEV "\0" \
+ "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
+ "dfu_alt_info_spl=spl raw 0x400\0" \
+ "dfu_alt_info_img=u-boot raw 0x10000\0" \
+ "dfu_alt_info=spl raw 0x400\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
@@ -244,6 +248,12 @@
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
+
+/* USB Device Firmware Update support */
+#define CONFIG_CMD_DFU
+#define CONFIG_USB_FUNCTION_DFU
+#define CONFIG_DFU_MMC
+#define CONFIG_DFU_SF
#endif
#endif /* __MX6QSABRE_COMMON_CONFIG_H */
diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h
index 5f635ca6c5..e9e3b27f36 100644
--- a/include/configs/mx6sabresd.h
+++ b/include/configs/mx6sabresd.h
@@ -44,6 +44,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 51b297a1a3..ae39503542 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -35,6 +35,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 381eaa24d5..edf7d3f93a 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -127,6 +127,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 465ddee881..d5faae6a7b 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -54,6 +54,8 @@
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC only for 9X9 EVK */
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index ada5de8aca..f16f9c1271 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -47,7 +47,7 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index dd4cb0f893..b1137713e1 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -43,6 +43,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 0970fd7548..cd426be18c 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -102,6 +102,8 @@
/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_MXC
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index 0d06fce1eb..426ec7246f 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -44,6 +44,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
new file mode 100644
index 0000000000..903f94c17e
--- /dev/null
+++ b/include/configs/pcm052.h
@@ -0,0 +1,231 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * Configuration settings for the phytec PCM-052 SoM.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_VF610
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SYS_THUMB_BUILD
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* Enable passing of ATAGs */
+#define CONFIG_CMDLINE_TAG
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_FSL_LPUART
+#define LPUART_BASE UART1_BASE
+
+/* Allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_UART_PORT (1)
+#define CONFIG_BAUDRATE 115200
+
+#undef CONFIG_CMD_IMLS
+
+/* NAND support */
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NAND_TRIMFFS
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_USE_ARCH_MEMCPY
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
+
+#define CONFIG_JFFS2_NAND
+
+/* UBI */
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_RBTREE
+#define CONFIG_LZO
+
+/* Dynamic MTD partition support */
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_MTD_DEVICE
+#define MTDIDS_DEFAULT "nand0=NAND,nor0=qspi0-a,nor1=qspi0-b"
+#define MTDPARTS_DEFAULT "mtdparts=NAND:256k(spare)"\
+ ",384k(bootloader)"\
+ ",128k(env1)"\
+ ",128k(env2)"\
+ ",3840k(kernel)"\
+ ",-(rootfs)"\
+ ",qspi0-a:-(jffs2),qspio0-b:-(jffs2)"
+#endif
+
+#define CONFIG_MMC
+#define CONFIG_FSL_ESDHC
+#define CONFIG_SYS_FSL_ESDHC_ADDR 0
+#define CONFIG_SYS_FSL_ESDHC_NUM 1
+
+/*#define CONFIG_ESDHC_DETECT_USE_EXTERN_IRQ1*/
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
+#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
+
+#define CONFIG_CMD_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE ENET_BASE_ADDR
+#define CONFIG_FEC_XCV_TYPE RMII
+#define CONFIG_FEC_MXC_PHYADDR 0
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+
+/* QSPI Configs*/
+#define CONFIG_FSL_QSPI
+
+#ifdef CONFIG_FSL_QSPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define FSL_QSPI_FLASH_SIZE (1 << 24)
+#define FSL_QSPI_FLASH_NUM 2
+#define CONFIG_SYS_FSL_QSPI_LE
+#endif
+
+/* I2C Configs */
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC_I2C3
+#define CONFIG_SYS_I2C_MXC
+
+/* RTC (actually an RV-4162 but M41T62-compatible) */
+#define CONFIG_CMD_DATE
+#define CONFIG_RTC_M41T62
+#define CONFIG_SYS_I2C_RTC_ADDR 0x68
+#define CONFIG_SYS_RTC_BUS_NUM 2
+
+/* EEPROM (24FC256) */
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_I2C_EEPROM_BUS 2
+
+#define CONFIG_BOOTDELAY 3
+
+#define CONFIG_LOADADDR 0x82000000
+
+/* We boot from the gfxRAM area of the OCRAM. */
+#define CONFIG_SYS_TEXT_BASE 0x3f408000
+#define CONFIG_BOARD_SIZE_LIMIT 524288
+
+#define CONFIG_BOOTCOMMAND "run bootcmd_sd"
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootfile=uImage\0" \
+ "bootargs_base=setenv bootargs rw mem=256M " \
+ "console=ttymxc1,115200n8\0" \
+ "bootargs_sd=setenv bootargs ${bootargs} " \
+ "root=/dev/mmcblk0p2 rootwait\0" \
+ "bootargs_net=setenv bootargs ${bootargs} root=/dev/nfs ip=dhcp " \
+ "nfsroot=${serverip}:${nfs_root},v3,tcp\0" \
+ "bootargs_nand=setenv bootargs ${bootargs} " \
+ "root=/dev/mtdblock2 rootfstype=jffs2\0" \
+ "bootargs_mtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "bootcmd_sd=run bootargs_base bootargs_sd bootargs_mtd; mmc rescan; " \
+ "fatload mmc 0:1 ${loadaddr} ${bootfile}; bootm ${loadaddr}\0" \
+ "bootcmd_net=run bootargs_base bootargs_net bootargs_mtd; " \
+ "tftpboot ${loadaddr} ${tftploc}${bootfile}; bootm\0" \
+ "bootcmd_nand='run bootargs_base bootargs_nand bootargs_mtd; " \
+ "nand read ${loadaddr} 0x000E0000 0x3C0000; " \
+ "bootm ${loadaddr}\0" \
+ "tftploc=/path/to/tftp/directory/\0" \
+ "nfs_root=/path/to/nfs/root\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "update_kernel_from_sd=mw.b $(loadaddr) 0xff 0x3C0000; " \
+ "mmc rescan; fatload mmc 0:2 ${loadaddr} ${bootfile}; " \
+ "nand erase 0xE0000 0x3C0000; " \
+ "nand write.i ${loadaddr} 0xE0000 0x3C0000\0" \
+ "update_rootfs_from_tftp=mw.b ${loadaddr} 0xff 0x8F20000; " \
+ "tftp ${loadaddr} ${tftp}${filesys}; " \
+ "nand erase 0x4A0000 0x8F20000; " \
+ "nand write.i ${loadaddr} 0x4A0000 0x8F20000\0" \
+ "filesys=rootfs.jffs2\0"
+
+/* miscellaneous commands */
+#define CONFIG_CMD_ELF
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE \
+ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
+
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START 0x80010000
+#define CONFIG_SYS_MEMTEST_END 0x87C00000
+
+#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
+
+/*
+ * Stack sizes
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
+
+/* Physical memory map */
+#define CONFIG_NR_DRAM_BANKS 1
+#define PHYS_SDRAM (0x80000000)
+#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
+#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
+#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
+
+#define CONFIG_SYS_INIT_SP_OFFSET \
+ (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+
+#ifdef CONFIG_ENV_IS_IN_MMC
+#define CONFIG_ENV_SIZE (8 * 1024)
+
+#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#endif
+
+#ifdef CONFIG_ENV_IS_IN_NAND
+#define CONFIG_ENV_SECT_SIZE (128 * 1024)
+#define CONFIG_ENV_SIZE (8 * 1024)
+#define CONFIG_ENV_OFFSET 0x80000
+#define CONFIG_ENV_SIZE_REDUND (8 * 1024)
+#define CONFIG_ENV_OFFSET_REDUND 0xA0000
+#endif
+
+#define CONFIG_OF_LIBFDT
+#define CONFIG_CMD_BOOTZ
+
+#endif
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index d65143240b..bb7e845183 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -45,6 +45,8 @@
/* I2C config */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index d189c3fde9..e11c016aed 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -117,6 +117,9 @@
*
*/
#define CONFIG_MACB
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_ASIX
+#define CONFIG_USB_ETHER_MCS7830
#define CONFIG_RMII /* use reduced MII inteface */
#define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
#define CONFIG_AT91_WANTS_COMMON_PHY
@@ -182,6 +185,7 @@
/* General Boot Parameter */
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND "run flashboot"
+#define CONFIG_BOOT_RETRY_TIME 30
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 48cc4ed6f6..e1ba7914cd 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -13,6 +13,7 @@
#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H
+#include <asm/arch/cpu.h>
#include <linux/stringify.h>
#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
@@ -39,23 +40,14 @@
#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
#endif
-#include <asm/arch/cpu.h> /* get chip and board defs */
-
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM_SERIAL)
-# define CONFIG_DW_SERIAL
-#endif
-
-/*
- * Display CPU information
- */
-#define CONFIG_DISPLAY_CPUINFO
-
/* Serial & console */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK 24000000
-#ifndef CONFIG_DM_SERIAL
+#ifdef CONFIG_DM_SERIAL
+# define CONFIG_DW_SERIAL
+#else
# define CONFIG_SYS_NS16550_REG_SIZE -4
# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
@@ -65,6 +57,7 @@
#endif
/* CPU */
+#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_SYS_CACHELINE_SIZE 64
/*
@@ -152,8 +145,8 @@
#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
#endif
-/* 4MB of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (4 << 20))
+/* 64MB of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
/*
* Miscellaneous configurable options
@@ -282,11 +275,7 @@ extern int soft_i2c_gpio_scl;
* The amount of RAM to keep free at the top of RAM when relocating u-boot,
* to use as framebuffer. This must be a multiple of 4096.
*/
-#ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
-#define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20)
-#else
-#define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
-#endif
+#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB
@@ -393,12 +382,12 @@ extern int soft_i2c_gpio_scl;
#define CONFIG_PRE_CON_BUF_SZ 4096 /* Aprox 2 80*25 screens */
/*
- * 240M RAM (256M minimum minus space for the framebuffer),
+ * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
* 1M script, 1M pxe and the ramdisk at the end.
*/
#define MEM_LAYOUT_ENV_SETTINGS \
- "bootm_size=0xf000000\0" \
+ "bootm_size=0xa000000\0" \
"kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
"fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
"scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
@@ -423,7 +412,18 @@ extern int soft_i2c_gpio_scl;
#define BOOT_TARGET_DEVICES_USB(func)
#endif
+/* FEL boot support, auto-execute boot.scr if a script address was provided */
+#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
+ "bootcmd_fel=" \
+ "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
+ "echo '(FEL boot)'; " \
+ "source ${fel_scriptaddr}; " \
+ "fi\0"
+#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
+ "fel "
+
#define BOOT_TARGET_DEVICES(func) \
+ func(FEL, fel, na) \
BOOT_TARGET_DEVICES_MMC(func) \
BOOT_TARGET_DEVICES_SCSI(func) \
BOOT_TARGET_DEVICES_USB(func) \
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index 70b440340f..17b0213362 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -167,6 +167,8 @@
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_I2C_EDID
@@ -190,7 +192,7 @@
"bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
"rdinit=/sbin/init enable_wait_mode=off\0" \
"bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
- "mmc read 0x10800000 0x800 0x4000; bootm\0" \
+ "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
"bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
"bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
"run bootargs_upd; " \
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index 1b4ca295bc..acfa84ab2c 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -33,6 +33,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index f7fade12f1..295e16303c 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -62,6 +62,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 4a7702cd09..714e3e2ca2 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -67,6 +67,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
/* Fuse */
#define CONFIG_CMD_FUSE
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index c5131af340..324ba8f0cc 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -110,6 +110,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_BOOTDELAY 3
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index f4e9cf20c5..6e8aec267d 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -37,6 +37,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_SPEED 100000
diff --git a/include/configs/warp.h b/include/configs/warp.h
index fa102bbae7..3e9a5a3ef3 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -98,6 +98,8 @@
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED 100000
/* PMIC */
diff --git a/include/configs/woodburn_common.h b/include/configs/woodburn_common.h
index 5d9f5297ce..fc4656567d 100644
--- a/include/configs/woodburn_common.h
+++ b/include/configs/woodburn_common.h
@@ -47,6 +47,8 @@
*/
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_MXC_SPI
diff --git a/include/net.h b/include/net.h
index f1671e38de..3a787cc4e9 100644
--- a/include/net.h
+++ b/include/net.h
@@ -149,7 +149,9 @@ struct udevice *eth_get_dev(void); /* get the current device */
*/
struct udevice *eth_get_dev_by_name(const char *devname);
unsigned char *eth_get_ethaddr(void); /* get the current device MAC */
+
/* Used only when NetConsole is enabled */
+int eth_is_active(struct udevice *dev); /* Test device for active state */
int eth_init_state_only(void); /* Set active state */
void eth_halt_state_only(void); /* Set passive state */
#endif
@@ -195,6 +197,8 @@ static inline unsigned char *eth_get_ethaddr(void)
return NULL;
}
+/* Used only when NetConsole is enabled */
+int eth_is_active(struct eth_device *dev); /* Test device for active state */
/* Set active state */
static inline __attribute__((always_inline)) int eth_init_state_only(void)
{
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