diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/davinci_dm6467Tevm.h | 167 | ||||
| -rw-r--r-- | include/configs/davinci_dm6467evm.h | 1 | ||||
| -rw-r--r-- | include/configs/integratorap.h | 148 | ||||
| -rw-r--r-- | include/configs/integratorcp.h | 47 | ||||
| -rw-r--r-- | include/configs/mcx.h | 7 | ||||
| -rw-r--r-- | include/configs/mx28evk.h | 64 | ||||
| -rw-r--r-- | include/configs/mx6qsabrelite.h | 31 | ||||
| -rw-r--r-- | include/configs/omap3_overo.h | 4 | ||||
| -rw-r--r-- | include/configs/tricorder.h | 12 | ||||
| -rw-r--r-- | include/configs/tt01.h | 40 | ||||
| -rw-r--r-- | include/micrel.h | 16 | ||||
| -rw-r--r-- | include/phy.h | 1 |
12 files changed, 167 insertions, 371 deletions
diff --git a/include/configs/davinci_dm6467Tevm.h b/include/configs/davinci_dm6467Tevm.h deleted file mode 100644 index 0cbdec8681..0000000000 --- a/include/configs/davinci_dm6467Tevm.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * Copyright (C) 2011 Texas Instruments Incorporated - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* Spectrum Digital TMS320DM6467T EVM board */ -#define DAVINCI_DM6467EVM -#define DAVINCI_DM6467TEVM -#define CONFIG_SYS_USE_NAND -#define CONFIG_SYS_NAND_SMALLPAGE - -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* SoC Configuration */ -#define CONFIG_ARM926EJS /* arm926ejs CPU */ - -/* Clock rates detection */ -#ifndef __ASSEMBLY__ -extern unsigned int davinci_arm_clk_get(void); -#endif - -#define CFG_REFCLK_FREQ 33000000 -/* Arm Clock frequency */ -#define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get() -/* Timer Input clock freq */ -#define CONFIG_SYS_HZ_CLOCK (CONFIG_SYS_CLK_FREQ/2) -#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SOC_DM646X - -/* EEPROM definitions for EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 - -/* Memory Info */ -#define CONFIG_SYS_MALLOC_LEN (1 << 20) /* 1 MiB */ -#define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_STACKSIZE (256 << 10) /* 256 KiB */ -#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ -#define PHYS_SDRAM_1_SIZE (256 << 20) /* DDR size 256MB */ - -/* Linux interfacing */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_SYS_BARGSIZE 1024 /* Bootarg Size */ -#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* kernel address */ -#define CONFIG_REVISION_TAG - -/* Serial Driver info */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 -#define CONFIG_SYS_NS16550_COM1 0x01c20000 -#define CONFIG_SYS_NS16550_CLK 24000000 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } - -/* I2C Configuration */ -#define CONFIG_HARD_I2C -#define CONFIG_DRIVER_DAVINCI_I2C -#define CONFIG_SYS_I2C_SPEED 80000 -#define CONFIG_SYS_I2C_SLAVE 10 - -/* Network & Ethernet Configuration */ -#define CONFIG_DRIVER_TI_EMAC -#define CONFIG_EMAC_MDIO_PHY_NUM 1 -#define CONFIG_MII -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_CMD_NET - -/* Flash & Environment */ -#define CONFIG_SYS_NO_FLASH -#ifdef CONFIG_SYS_USE_NAND -#define CONFIG_NAND_DAVINCI -#define CONFIG_SYS_NAND_CS 2 -#undef CONFIG_ENV_IS_IN_FLASH -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ -#define CONFIG_SYS_NAND_BASE_LIST {0x42000000, } -#define CONFIG_SYS_NAND_HW_ECC -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_ENV_OFFSET 0 -#else -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE (4 << 10) /* 4 KiB */ -#endif - -/* U-Boot general configuration */ -#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */ -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTFILE "uImage" /* Boot file name */ -#define CONFIG_SYS_PROMPT "DM6467 EVM > " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ -#define CONFIG_SYS_PBSIZE \ - (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_VERSION_VARIABLE -#define CONFIG_AUTO_COMPLETE -#define CONFIG_SYS_HUSH_PARSER -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_CMDLINE_EDITING -#define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY -#define CONFIG_MX_CYCLIC -#define CONFIG_BOOTCOMMAND "source 0x82080000; dhcp; bootm" -#define CONFIG_BOOTARGS \ - "mem=120M console=ttyS0,115200n8 " \ - "root=/dev/hda1 rw noinitrd ip=dhcp" - -/* U-Boot commands */ -#include <config_cmd_default.h> -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MII -#define CONFIG_CMD_SAVES -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_PING -#define CONFIG_CMD_DHCP -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_SETGETDCR -#ifdef CONFIG_SYS_USE_NAND -#undef CONFIG_CMD_FLASH -#undef CONFIG_CMD_IMLS -#define CONFIG_CMD_NAND -#endif - -#ifdef CONFIG_CMD_BDI -#define CONFIG_CLOCKS -#endif - -#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ - -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ - CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) - -#endif /* __CONFIG_H */ diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h index e0fe6b5c24..4f14e04165 100644 --- a/include/configs/davinci_dm6467evm.h +++ b/include/configs/davinci_dm6467evm.h @@ -35,7 +35,6 @@ extern unsigned int davinci_arm_clk_get(void); #endif -#define CFG_REFCLK_FREQ 27000000 /* Arm Clock frequency */ #define CONFIG_SYS_CLK_FREQ davinci_arm_clk_get() /* Timer Input clock freq */ diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h index a1fdbb8140..0a704cb248 100644 --- a/include/configs/integratorap.h +++ b/include/configs/integratorap.h @@ -82,17 +82,7 @@ /* * Command line configuration. */ - - -#define CONFIG_CMD_IMI -#define CONFIG_CMD_BDI -#define CONFIG_CMD_BOOTD -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMLS -#define CONFIG_CMD_LOADB -#define CONFIG_CMD_LOADS - +#include <config_cmd_default.h> #define CONFIG_BOOTDELAY 2 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAM0 console=tty" @@ -157,142 +147,16 @@ * PCI definitions */ -#ifdef CONFIG_PCI /* pci support */ -#undef CONFIG_PCI_PNP -#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define DEBUG +#define CONFIG_PCI +#define CONFIG_CMD_PCI +#define CONFIG_PCI_PNP +#define CONFIG_NET_MULTI +#define CONFIG_TULIP #define CONFIG_EEPRO100 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ -#define INTEGRATOR_BOOT_ROM_BASE 0x20000000 -#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000 - -/* PCI Base area */ -#define INTEGRATOR_PCI_BASE 0x40000000 -#define INTEGRATOR_PCI_SIZE 0x3FFFFFFF - -/* memory map as seen by the CPU on the local bus */ -#define CPU_PCI_IO_ADRS 0x60000000 /* PCI I/O space base */ -#define CPU_PCI_IO_SIZE 0x10000 - -#define CPU_PCI_CNFG_ADRS 0x61000000 /* PCI config space */ -#define CPU_PCI_CNFG_SIZE 0x1000000 - -#define PCI_MEM_BASE 0x40000000 /* 512M to xxx */ -/* unused 256M from A0000000-AFFFFFFF might be used for I2O ??? */ -#define INTEGRATOR_PCI_IO_BASE 0x60000000 /* 16M to xxx */ -/* unused (128-16)M from B1000000-B7FFFFFF */ -#define PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */ -/* unused ((128-16)M - 64K) from XXX */ - -#define PCI_V3_BASE 0x62000000 - -/* V3 PCI bridge controller */ -#define V3_BASE 0x62000000 /* V360EPC registers */ - -#define PCI_ENET0_IOADDR (CPU_PCI_IO_ADRS) -#define PCI_ENET0_MEMADDR (PCI_MEM_BASE) - - -#define V3_PCI_VENDOR 0x00000000 -#define V3_PCI_DEVICE 0x00000002 -#define V3_PCI_CMD 0x00000004 -#define V3_PCI_STAT 0x00000006 -#define V3_PCI_CC_REV 0x00000008 -#define V3_PCI_HDR_CF 0x0000000C -#define V3_PCI_IO_BASE 0x00000010 -#define V3_PCI_BASE0 0x00000014 -#define V3_PCI_BASE1 0x00000018 -#define V3_PCI_SUB_VENDOR 0x0000002C -#define V3_PCI_SUB_ID 0x0000002E -#define V3_PCI_ROM 0x00000030 -#define V3_PCI_BPARAM 0x0000003C -#define V3_PCI_MAP0 0x00000040 -#define V3_PCI_MAP1 0x00000044 -#define V3_PCI_INT_STAT 0x00000048 -#define V3_PCI_INT_CFG 0x0000004C -#define V3_LB_BASE0 0x00000054 -#define V3_LB_BASE1 0x00000058 -#define V3_LB_MAP0 0x0000005E -#define V3_LB_MAP1 0x00000062 -#define V3_LB_BASE2 0x00000064 -#define V3_LB_MAP2 0x00000066 -#define V3_LB_SIZE 0x00000068 -#define V3_LB_IO_BASE 0x0000006E -#define V3_FIFO_CFG 0x00000070 -#define V3_FIFO_PRIORITY 0x00000072 -#define V3_FIFO_STAT 0x00000074 -#define V3_LB_ISTAT 0x00000076 -#define V3_LB_IMASK 0x00000077 -#define V3_SYSTEM 0x00000078 -#define V3_LB_CFG 0x0000007A -#define V3_PCI_CFG 0x0000007C -#define V3_DMA_PCI_ADR0 0x00000080 -#define V3_DMA_PCI_ADR1 0x00000090 -#define V3_DMA_LOCAL_ADR0 0x00000084 -#define V3_DMA_LOCAL_ADR1 0x00000094 -#define V3_DMA_LENGTH0 0x00000088 -#define V3_DMA_LENGTH1 0x00000098 -#define V3_DMA_CSR0 0x0000008B -#define V3_DMA_CSR1 0x0000009B -#define V3_DMA_CTLB_ADR0 0x0000008C -#define V3_DMA_CTLB_ADR1 0x0000009C -#define V3_DMA_DELAY 0x000000E0 -#define V3_MAIL_DATA 0x000000C0 -#define V3_PCI_MAIL_IEWR 0x000000D0 -#define V3_PCI_MAIL_IERD 0x000000D2 -#define V3_LB_MAIL_IEWR 0x000000D4 -#define V3_LB_MAIL_IERD 0x000000D6 -#define V3_MAIL_WR_STAT 0x000000D8 -#define V3_MAIL_RD_STAT 0x000000DA -#define V3_QBA_MAP 0x000000DC - -/* SYSTEM register bits */ -#define V3_SYSTEM_M_RST_OUT (1 << 15) -#define V3_SYSTEM_M_LOCK (1 << 14) - -/* PCI_CFG bits */ -#define V3_PCI_CFG_M_RETRY_EN (1 << 10) -#define V3_PCI_CFG_M_AD_LOW1 (1 << 9) -#define V3_PCI_CFG_M_AD_LOW0 (1 << 8) - -/* PCI MAP register bits (PCI -> Local bus) */ -#define V3_PCI_MAP_M_MAP_ADR 0xFFF00000 -#define V3_PCI_MAP_M_RD_POST_INH (1 << 15) -#define V3_PCI_MAP_M_ROM_SIZE (1 << 11 | 1 << 10) -#define V3_PCI_MAP_M_SWAP (1 << 9 | 1 << 8) -#define V3_PCI_MAP_M_ADR_SIZE 0x000000F0 -#define V3_PCI_MAP_M_REG_EN (1 << 1) -#define V3_PCI_MAP_M_ENABLE (1 << 0) - -/* 9 => 512M window size */ -#define V3_PCI_MAP_M_ADR_SIZE_512M 0x00000090 - -/* A => 1024M window size */ -#define V3_PCI_MAP_M_ADR_SIZE_1024M 0x000000A0 - -/* LB_BASE register bits (Local bus -> PCI) */ -#define V3_LB_BASE_M_MAP_ADR 0xFFF00000 -#define V3_LB_BASE_M_SWAP (1 << 8 | 1 << 9) -#define V3_LB_BASE_M_ADR_SIZE 0x000000F0 -#define V3_LB_BASE_M_PREFETCH (1 << 3) -#define V3_LB_BASE_M_ENABLE (1 << 0) - -/* PCI COMMAND REGISTER bits */ -#define V3_COMMAND_M_FBB_EN (1 << 9) -#define V3_COMMAND_M_SERR_EN (1 << 8) -#define V3_COMMAND_M_PAR_EN (1 << 6) -#define V3_COMMAND_M_MASTER_EN (1 << 2) -#define V3_COMMAND_M_MEM_EN (1 << 1) -#define V3_COMMAND_M_IO_EN (1 << 0) - -#define INTEGRATOR_SC_BASE 0x11000000 -#define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 -#define INTEGRATOR_SC_PCIENABLE \ - (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET) -#endif /* CONFIG_PCI */ /*----------------------------------------------------------------------- * There are various dependencies on the core module (CM) fitted * Users should refer to their CM user guide diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h index ccbdf44cde..57610a6511 100644 --- a/include/configs/integratorcp.h +++ b/include/configs/integratorcp.h @@ -31,8 +31,13 @@ #ifndef __CONFIG_H #define __CONFIG_H +/* Integrator-specific configuration */ #define CONFIG_INTEGRATOR -#define CONFIG_ARCH_INTEGRATOR +#define CONFIG_ARCH_CINTEGRATOR +#define CONFIG_CM_INIT +#define CONFIG_CM_REMAP +#define CONFIG_CM_SPD_DETECT + /* * High Level Configuration Options * (easy to change) @@ -47,6 +52,7 @@ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 #define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ + /* * Size of malloc() pool */ @@ -85,32 +91,14 @@ /* * Command line configuration. */ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMI -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING - +#include <config_cmd_default.h> -#if 0 #define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/nfs nfsroot=<IP address>:/<exported rootfs> mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" -#define CONFIG_BOOTCOMMAND "bootp ; bootm" -#endif -/* The kernel command line & boot command below are for a platform flashed with afu.axf - -Image 666 Block 0 End Block 0 address 0x24000000 exec 0x24000000- name u-boot -Image 667 Block 1 End Block 13 address 0x24040000 exec 0x24040000- name u-linux -Image 668 Block 14 End Block 33 address 0x24380000 exec 0x24380000- name rootfs -SIB at Block62 End Block62 address 0x24f80000 - -*/ -#define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/mtdblock2 mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0 console=ttyAMA0" -#define CONFIG_BOOTCOMMAND "cp 0x24080000 0x7fc0 0x100000; bootm" +#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyAMA0 console=tty ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" +#define CONFIG_BOOTCOMMAND "tftpboot ; bootm" +#define CONFIG_SERVERIP 192.168.1.100 +#define CONFIG_IPADDR 192.168.1.104 +#define CONFIG_BOOTFILE "uImage" /* * Miscellaneous configurable options @@ -201,15 +189,6 @@ SIB at Block62 End Block62 address 0x24f80000 #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ #define CONFIG_ENV_SIZE 8192 /* 8KB */ -/*----------------------------------------------------------------------- - * CP control registers - */ -#define CPCR_BASE 0xCB000000 /* CP Registers*/ -#define OS_FLASHPROG 0x00000004 /* Flash register*/ -#define CPMASK_EXTRABANK 0x8 -#define CPMASK_FLASHSIZE 0x4 -#define CPMASK_FLWREN 0x2 -#define CPMASK_FLVPPEN 0x1 /* * The ARM boot monitor initializes the board. diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 0940e86b86..1315c3ceb8 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -219,6 +219,8 @@ "else run nandboot; fi" #define CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING + /* * Miscellaneous configurable options */ @@ -351,11 +353,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 256 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ - CONFIG_SYS_NAND_ECCSIZE) -#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ - CONFIG_SYS_NAND_ECCSTEPS) - #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index bea46e7267..04967d7d2c 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -56,6 +56,7 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP #define CONFIG_CMD_GPIO #define CONFIG_CMD_MII @@ -63,6 +64,9 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_NFS #define CONFIG_CMD_PING +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_USB /* * Memory configurations @@ -125,9 +129,11 @@ * MMC Driver */ #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_ENV_OFFSET (256 * 1024) -#define CONFIG_ENV_SIZE (16 * 1024) -#define CONFIG_SYS_MMC_ENV_DEV 0 +#ifdef CONFIG_ENV_IS_IN_MMC + #define CONFIG_ENV_OFFSET (256 * 1024) + #define CONFIG_ENV_SIZE (16 * 1024) + #define CONFIG_SYS_MMC_ENV_DEV 0 +#endif #define CONFIG_CMD_SAVEENV #ifdef CONFIG_CMD_MMC #define CONFIG_MMC @@ -150,6 +156,58 @@ #endif /* + * RTC + */ +#ifdef CONFIG_CMD_DATE +#define CONFIG_RTC_MXS +#endif + +/* + * USB + */ +#ifdef CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS +#define CONFIG_EHCI_MXS_PORT 1 +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE +#endif + +/* + * SPI + */ +#ifdef CONFIG_CMD_SPI +#define CONFIG_HARD_SPI +#define CONFIG_MXS_SPI +#define CONFIG_SPI_HALF_DUPLEX +#define CONFIG_DEFAULT_SPI_BUS 2 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 + +/* SPI Flash */ +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +/* this may vary and depends on the installed chip */ +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SF_DEFAULT_SPEED 24000000 + +/* (redundant) environemnt in SPI flash */ +#undef CONFIG_ENV_IS_IN_SPI_FLASH +#ifdef CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SIZE 0x1000 /* 4KB */ +#define CONFIG_ENV_OFFSET 0x40000 /* 256K */ +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_ENV_SECT_SIZE 0x1000 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_BUS 2 +#define CONFIG_ENV_SPI_MAX_HZ 24000000 +#define CONFIG_ENV_SPI_MODE SPI_MODE_0 +#endif +#endif +#endif + +/* * Boot Linux */ #define CONFIG_CMDLINE_TAG diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index d650ee340a..982f03f710 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -44,6 +44,17 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS (0|(GPIO_NUMBER(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + /* MMC Configs */ #define CONFIG_FSL_ESDHC #define CONFIG_FSL_USDHC @@ -66,6 +77,8 @@ #define CONFIG_FEC_XCV_TYPE RGMII #define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE @@ -163,10 +176,22 @@ /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH -#define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) + #define CONFIG_ENV_IS_IN_MMC -#define CONFIG_SYS_MMC_ENV_DEV 0 +/* #define CONFIG_ENV_IS_IN_SPI_FLASH */ + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif #define CONFIG_OF_LIBFDT diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index bfd4570cce..64adc7455c 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -339,10 +339,6 @@ 10, 11, 12, 13} #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ - CONFIG_SYS_NAND_ECCSIZE) -#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ - CONFIG_SYS_NAND_ECCSTEPS) #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index f87696b235..ba8847b402 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -160,6 +160,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x82000000\0" \ "console=ttyO2,115200n8\0" \ + "mmcdev=0\0" \ "vram=12M\0" \ "lcdmode=800x600\0" \ "defaultdisplay=lcd\0" \ @@ -182,10 +183,10 @@ "root=ubi0:rootfs " \ "rootfstype=ubifs " \ "${kernelopts}\0" \ - "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ + "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source ${loadaddr}\0" \ - "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ + "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -194,7 +195,7 @@ "run nandargs; " \ "nand read ${loadaddr} 280000 400000; " \ "bootm ${loadaddr}\0" \ - "autoboot=if mmc init 0; then " \ + "autoboot=if mmc rescan ${mmcdev}; then " \ "if run loadbootscript; then " \ "run bootscript; " \ "else " \ @@ -304,11 +305,6 @@ #define CONFIG_SYS_NAND_ECCSIZE 512 #define CONFIG_SYS_NAND_ECCBYTES 3 -#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ - CONFIG_SYS_NAND_ECCSIZE) -#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ - CONFIG_SYS_NAND_ECCSTEPS) - #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 35d2bd820f..2623dbcbf8 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -131,7 +131,7 @@ #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE (8 * 1024) /* smaller for faster access */ +#define CONFIG_ENV_SIZE (128 * 1024) /* Address and size of Redundant Environment Sector */ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) @@ -185,6 +185,28 @@ #define CONFIG_GENERIC_MMC #define CONFIG_MXC_MMC #define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR + +/* video support */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_MX3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VIDEO_LOGO +/* splash image won't work with NAND boot, use preboot script */ +#define CONFIG_VIDEO_SW_CURSOR +#define CONFIG_CONSOLE_EXTRA_INFO /* display additional board info */ +#define CONFIG_VGA_AS_SINGLE_DEVICE /* display is an output only device */ + +/* allow stdin, stdout and stderr variables to redirect output */ +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SILENT_CONSOLE /* UARTs used externally (release) */ +#define CONFIG_SYS_DEVICE_NULLDEV /* allow console to be turned off */ +#define CONFIG_PREBOOT + +/* allow decompressing max. 4MB */ +#define CONFIG_VIDEO_BMP_GZIP +/* this is not only used by cfb_console.c for the logo, but also in cmd_bmp.c */ +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (4*1024*1024) + /* * Command definition */ @@ -201,6 +223,7 @@ * the NAND_CMD_LOCK_STATUS command, however the NFC of i.MX31 supports * a software locking scheme. */ +#define CONFIG_CMD_BMP #define CONFIG_BOOTDELAY 3 @@ -208,16 +231,25 @@ * currently a default setting for booting via script is implemented * set user to login name and serverip to tftp host, define your * boot behaviour in bootscript.loginname + * + * TT-01 board specific TFT setup (used by drivers/video/mx3fb.c) + * + * This set-up is for the L5F30947T04 by Epson, which is + * 800x480, 33MHz pixel clock, 60Hz vsync, 31.6kHz hsync + * sync must be set to: DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL */ #define CONFIG_EXTRA_ENV_SETTINGS \ - "bootcmd=dhcp bootscript.$(user); source\0" +"videomode=epson\0" \ +"epson=video=ctfb:x:800,y:480,depth:16,mode:0,pclk:30076," \ + "le:215,ri:1,up:32,lo:13,hs:7,vs:10,sync:100663296,vmode:0\0" \ +"bootcmd=dhcp bootscript.${user}; source\0" #define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */ #define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */ /* Miscellaneous configurable options */ -#define CONFIG_HUSH_PARSER -#define CONFIG_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_LONGHELP /* undef to save memory */ #define CONFIG_SYS_PROMPT "TT01> " diff --git a/include/micrel.h b/include/micrel.h new file mode 100644 index 0000000000..25e8a4624b --- /dev/null +++ b/include/micrel.h @@ -0,0 +1,16 @@ +#ifndef _MICREL_H + +#define MII_KSZ9021_EXT_COMMON_CTRL 0x100 +#define MII_KSZ9021_EXT_STRAP_STATUS 0x101 +#define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE 0x102 +#define MII_KSZ9021_EXT_OP_STRAP_STATUS 0x103 +#define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW 0x104 +#define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW 0x105 +#define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW 0x106 +#define MII_KSZ9021_EXT_ANALOG_TEST 0x107 + +struct phy_device; +int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val); +int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum); + +#endif diff --git a/include/phy.h b/include/phy.h index bc522d57c3..3c30f115b6 100644 --- a/include/phy.h +++ b/include/phy.h @@ -207,6 +207,7 @@ int phy_config(struct phy_device *phydev); int phy_shutdown(struct phy_device *phydev); int phy_register(struct phy_driver *drv); int genphy_config_aneg(struct phy_device *phydev); +int genphy_restart_aneg(struct phy_device *phydev); int genphy_update_link(struct phy_device *phydev); int genphy_config(struct phy_device *phydev); int genphy_startup(struct phy_device *phydev); |
