diff options
Diffstat (limited to 'include')
44 files changed, 568 insertions, 332 deletions
diff --git a/include/axp221.h b/include/axp221.h index 0ee21b6280..04cd8c2be4 100644 --- a/include/axp221.h +++ b/include/axp221.h @@ -45,6 +45,8 @@ #define AXP221_ALDO3_CTRL 0x2a #define AXP221_VBUS_IPSOUT 0x30 #define AXP221_VBUS_IPSOUT_DRIVEBUS (1 << 2) +#define AXP221_SHUTDOWN 0x32 +#define AXP221_SHUTDOWN_POWEROFF (1 << 7) #define AXP221_MISC_CTRL 0x8f #define AXP221_MISC_CTRL_N_VBUSEN_FUNC (1 << 4) #define AXP221_PAGE 0xff diff --git a/include/axp818.h b/include/axp818.h index 1dc6456950..46d05ad04b 100644 --- a/include/axp818.h +++ b/include/axp818.h @@ -32,13 +32,6 @@ #define AXP818_OUTPUT_CTRL3_ALDO2_EN (1 << 6) #define AXP818_OUTPUT_CTRL3_ALDO3_EN (1 << 7) -#define AXP818_DCDC1_CTRL 0x20 -#define AXP818_DCDC2_CTRL 0x21 -#define AXP818_DCDC3_CTRL 0x22 -#define AXP818_DCDC4_CTRL 0x23 -#define AXP818_DCDC5_CTRL 0x24 -#define AXP818_DCDC6_CTRL 0x25 - #define AXP818_DLDO1_CTRL 0x15 #define AXP818_DLDO2_CTRL 0x16 #define AXP818_DLDO3_CTRL 0x17 @@ -46,7 +39,6 @@ #define AXP818_ELDO1_CTRL 0x19 #define AXP818_ELDO2_CTRL 0x1a #define AXP818_ELDO3_CTRL 0x1b -#define AXP818_ELDO3_CTRL 0x1b #define AXP818_FLDO1_CTRL 0x1c #define AXP818_FLDO2_3_CTRL 0x1d #define AXP818_DCDC1_CTRL 0x20 diff --git a/include/axp_pmic.h b/include/axp_pmic.h index 3b01c49cc9..0f14683509 100644 --- a/include/axp_pmic.h +++ b/include/axp_pmic.h @@ -29,10 +29,7 @@ int axp_set_aldo1(unsigned int mvolt); int axp_set_aldo2(unsigned int mvolt); int axp_set_aldo3(unsigned int mvolt); int axp_set_aldo4(unsigned int mvolt); -int axp_set_dldo1(unsigned int mvolt); -int axp_set_dldo2(unsigned int mvolt); -int axp_set_dldo3(unsigned int mvolt); -int axp_set_dldo4(unsigned int mvolt); +int axp_set_dldo(int dldo_num, unsigned int mvolt); int axp_set_eldo(int eldo_num, unsigned int mvolt); int axp_init(void); int axp_get_sid(unsigned int *sid); diff --git a/include/bios_emul.h b/include/bios_emul.h index 80979edd04..7571263688 100644 --- a/include/bios_emul.h +++ b/include/bios_emul.h @@ -31,7 +31,11 @@ typedef struct { int bus; u32 VendorID; u32 DeviceID; +#ifdef CONFIG_DM_PCI + struct udevice *pcidev; +#else pci_dev_t pcidev; +#endif void *BIOSImage; u32 BIOSImageLen; u8 LowMem[1536]; @@ -39,7 +43,12 @@ typedef struct { struct vbe_mode_info; -int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int cleanUp); +#ifdef CONFIG_DM_PCI +int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo, + int clean_up); +#else +int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up); +#endif /* Run a BIOS ROM natively (only supported on x86 machines) */ void bios_run_on_x86(struct udevice *dev, unsigned long addr, int vesa_mode, @@ -57,10 +66,18 @@ void bios_set_interrupt_handler(int intnum, int (*int_handler_func)(void)); void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void)); +#ifdef CONFIG_DM_PCI +int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **pVGAInfo); + +int biosemu_run(struct udevice *dev, uchar *bios_rom, int bios_len, + BE_VGAInfo *vga_info, int clean_up, int vesa_mode, + struct vbe_mode_info *mode_info); +#else int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo); int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len, BE_VGAInfo *vga_info, int clean_up, int vesa_mode, struct vbe_mode_info *mode_info); +#endif #endif diff --git a/include/common.h b/include/common.h index 7bed0cc0d1..1563d649f0 100644 --- a/include/common.h +++ b/include/common.h @@ -146,9 +146,6 @@ void __assert_fail(const char *assertion, const char *file, unsigned line, #define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0) #endif /* BUG */ -/* Force a compilation error if condition is true */ -#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) - typedef void (interrupt_handler_t)(void *); #include <asm/u-boot.h> /* boot information for Linux kernel */ diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index eb4d52c6f5..c1a0a6ced9 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -606,6 +606,16 @@ unsigned long get_board_ddr_clk(void); #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 +#define CONFIG_VID_FLS_ENV "t4240rdb_vdd_mv" +#ifndef CONFIG_SPL_BUILD +#define CONFIG_VID +#endif +#define CONFIG_VOL_MONITOR_IR36021_SET +#define CONFIG_VOL_MONITOR_IR36021_READ +/* The lowest and highest voltage allowed for T4240RDB */ +#define VDD_MV_MIN 819 +#define VDD_MV_MAX 1212 + /* * eSPI - Enhanced SPI */ diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h index 150e8765d6..67f45c0f90 100644 --- a/include/configs/chromebook_jerry.h +++ b/include/configs/chromebook_jerry.h @@ -30,7 +30,6 @@ #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SPL_I2C_SUPPORT -#define CONFIG_I2C_EDID #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/firefly-rk3288.h b/include/configs/firefly-rk3288.h index d6423e7e55..a29f55709d 100644 --- a/include/configs/firefly-rk3288.h +++ b/include/configs/firefly-rk3288.h @@ -24,7 +24,6 @@ */ #define CONFIG_ENV_OFFSET (96 * 1024) -#define CONFIG_I2C_EDID #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/fx12mm.h b/include/configs/fx12mm.h deleted file mode 100644 index fa32a2e8cf..0000000000 --- a/include/configs/fx12mm.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * (C) Copyright 2008 - * - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es - * This work has been supported by: QTechnology http://qtec.com - * - * Georg Schardt <schardt@team-ctech.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * Configuration file for the Virtex4FX12 Minimodul by Avnet/Memec, - * see http://www.em.avnet.com - */ - -#ifndef __CONFIG_FX12_H -#define __CONFIG_FX12_H - -#include "../board/avnet/fx12mm/xparameters.h" - -/* cmd config */ -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_MTDPARTS -#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ -#define CONFIG_FLASH_CFI_MTD - -/* sdram */ -#define CONFIG_SYS_SDRAM_SIZE_MB 64 - -/* environment */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x10000 -#define CONFIG_ENV_SECT_SIZE 0x10000 -#define CONFIG_SYS_ENV_OFFSET 0xA0000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_ENV_OFFSET) -#define CONFIG_ENV_OVERWRITE 1 - -/*Misc*/ -#define CONFIG_PREBOOT "echo U-Boot is up and running;" - -/*Flash*/ -#define CONFIG_SYS_FLASH_SIZE (4*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 71 -#define MTDIDS_DEFAULT "nor0=fx12mm-flash" -#define MTDPARTS_DEFAULT "mtdparts=fx12mm-flash:-(user)" - -#include "configs/xilinx-ppc405.h" - -#endif /* __CONFIG_H */ diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 43ce7fe25f..68d3fd7384 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -34,6 +34,7 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_I2C_SUPPORT #define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL_WATCHDOG_SUPPORT /* NAND support */ #if defined(CONFIG_SPL_NAND_SUPPORT) diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index f93861d770..97a0d86b91 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -32,54 +32,20 @@ #endif /* uart */ -#ifdef XILINX_UARTLITE_BASEADDR -# define CONFIG_XILINX_UARTLITE -# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -# define CONSOLE_ARG "console=console=ttyUL0,115200\0" -#elif XILINX_UART16550_BASEADDR -# define CONFIG_SYS_NS16550_SERIAL -# if defined(__MICROBLAZEEL__) -# define CONFIG_SYS_NS16550_REG_SIZE -4 -# else -# define CONFIG_SYS_NS16550_REG_SIZE 4 -# endif -# define CONFIG_CONS_INDEX 1 -# define CONFIG_SYS_NS16550_COM1 \ - ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) -# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ # define CONFIG_BAUDRATE 115200 - /* The following table includes the supported baudrates */ # define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} -# define CONSOLE_ARG "console=console=ttyS0,115200\0" -#else -# error Undefined uart -#endif /* setting reset address */ /*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/ -/* ethernet */ -#undef CONFIG_SYS_ENET -#if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL) -# define CONFIG_XILINX_EMACLITE 1 -# define CONFIG_SYS_ENET -#endif -#if defined(XILINX_AXIEMAC_BASEADDR) -# define CONFIG_XILINX_AXIEMAC 1 -# define CONFIG_SYS_ENET -#endif - -#undef ET_DEBUG - /* gpio */ #ifdef XILINX_GPIO_BASEADDR # define CONFIG_XILINX_GPIO # define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR #endif +#define CONFIG_BOARD_LATE_INIT /* interrupt controller */ #ifdef XILINX_INTC_BASEADDR @@ -103,13 +69,6 @@ # endif #endif -#if !defined(CONFIG_OF_CONTROL) || \ - (defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_OF_CONTROL)) -/* ddr sdram - main memory */ -# define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START -# define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE -#endif - #define CONFIG_SYS_MALLOC_LEN 0xC0000 /* Stack location before relocation */ @@ -198,16 +157,6 @@ #endif /* !SPIFLASH */ #endif /* !FLASH */ -/* system ace */ -#ifdef XILINX_SYSACE_BASEADDR -# define CONFIG_SYSTEMACE -/* #define DEBUG_SYSTEMACE */ -# define SYSTEMACE_CONFIG_FPGA -# define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR -# define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH -# define CONFIG_DOS_PARTITION -#endif - #if defined(XILINX_USE_ICACHE) # define CONFIG_ICACHE #else @@ -245,17 +194,6 @@ # undef CONFIG_CMD_CACHE #endif -#ifdef CONFIG_SYS_ENET -# define CONFIG_CMD_PING -# define CONFIG_CMD_DHCP -# define CONFIG_CMD_TFTPPUT -#endif - -#if defined(CONFIG_SYSTEMACE) -# define CONFIG_CMD_EXT2 -# define CONFIG_CMD_FAT -#endif - #if defined(FLASH) # define CONFIG_CMD_JFFS2 # define CONFIG_CMD_UBI @@ -315,7 +253,7 @@ #define CONFIG_SYS_MAXARGS 15 #define CONFIG_SYS_LONGHELP /* default load address */ -#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START +#define CONFIG_SYS_LOAD_ADDR 0 #define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */ #define CONFIG_BOOTARGS "root=romfs" @@ -342,15 +280,10 @@ #define CONFIG_CMDLINE_EDITING -#define CONFIG_NETCONSOLE #define CONFIG_SYS_CONSOLE_IS_IN_ENV -/* Use the HUSH parser */ -#define CONFIG_SYS_HUSH_PARSER - /* Enable flat device tree support */ #define CONFIG_LMB 1 -#define CONFIG_FIT 1 #define CONFIG_OF_LIBFDT 1 #if defined(CONFIG_XILINX_AXIEMAC) @@ -358,20 +291,19 @@ # define CONFIG_CMD_MII 1 # define CONFIG_PHY_GIGE 1 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 -# define CONFIG_PHYLIB 1 # define CONFIG_PHY_ATHEROS 1 # define CONFIG_PHY_BROADCOM 1 # define CONFIG_PHY_DAVICOM 1 # define CONFIG_PHY_LXT 1 # define CONFIG_PHY_MARVELL 1 # define CONFIG_PHY_MICREL 1 +# define CONFIG_PHY_MICREL_KSZ9021 # define CONFIG_PHY_NATSEMI 1 # define CONFIG_PHY_REALTEK 1 # define CONFIG_PHY_VITESSE 1 #else # undef CONFIG_MII # undef CONFIG_CMD_MII -# undef CONFIG_PHYLIB #endif /* SPL part */ diff --git a/include/configs/ml507.h b/include/configs/ml507.h deleted file mode 100644 index 89a72904b3..0000000000 --- a/include/configs/ml507.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es - * This work has been supported by: QTechnology http://qtec.com/ - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*CPU*/ -#define CONFIG_440 1 -#define CONFIG_XILINX_ML507 1 -#include "../board/xilinx/ml507/xparameters.h" - -/*Mem Map*/ -#define CONFIG_SYS_SDRAM_SIZE_MB 256 - -/*Env*/ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x340000 -#define CONFIG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CONFIG_ENV_OFFSET) - -/*Misc*/ -#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" - -/*Flash*/ -#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 259 -#define MTDIDS_DEFAULT "nor0=ml507-flash" -#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" - -/*Generic Configs*/ -#include <configs/xilinx-ppc440.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index 174ea088f3..179b4f9007 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -25,6 +25,8 @@ #define CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + #include <linux/sizes.h> #include <asm/arch/imx-regs.h> #include <asm/imx-common/gpio.h> diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index c946176416..4374c3a41f 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -156,7 +156,7 @@ /* Miscellaneous configurable options */ #define CONFIG_CMD_MEMTEST #define CONFIG_SYS_MEMTEST_START 0x80000000 -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 @@ -203,6 +203,7 @@ #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SPI_FLASH_STMICRO #define FSL_QSPI_FLASH_NUM 1 #define FSL_QSPI_FLASH_SIZE SZ_32M #endif diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h index d507fb48da..fac7c3f2e2 100644 --- a/include/configs/mx7_common.h +++ b/include/configs/mx7_common.h @@ -23,6 +23,8 @@ #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ #define CONFIG_SYS_FSL_CLK +#define CONFIG_SYS_BOOTM_LEN 0x1000000 + /* Enable iomux-lpsr support */ #define CONFIG_IOMUX_LPSR #define CONFIG_IMX_FIXED_IVT_OFFSET diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 22e515cccd..d23e4f3c40 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -179,8 +179,33 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ENV_SIZE SZ_8K #define CONFIG_ENV_IS_IN_MMC + +/* + * If want to use nand, define CONFIG_NAND_MXS and rework board + * to support nand, since emmc has pin conflicts with nand + */ +#ifdef CONFIG_NAND_MXS +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NAND_TRIMFFS + +/* NAND stuff */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* DMA stuff, needed for GPMI/MXS NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 +#endif + #define CONFIG_ENV_OFFSET (8 * SZ_64K) +#ifdef CONFIG_NAND_MXS +#define CONFIG_SYS_FSL_USDHC_NUM 1 +#else #define CONFIG_SYS_FSL_USDHC_NUM 2 +#endif #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */ #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ diff --git a/include/configs/nyan-big.h b/include/configs/nyan-big.h index 9464153f58..176f6e902b 100644 --- a/include/configs/nyan-big.h +++ b/include/configs/nyan-big.h @@ -37,8 +37,6 @@ #define CONFIG_SYS_MMC_ENV_PART 2 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) -#define CONFIG_I2C_EDID - /* LCD support */ #define CONFIG_LCD #define CONFIG_PWM_TEGRA diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 5da6cfd6f5..5e33845da0 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -19,8 +19,6 @@ #include <configs/ti_omap3_common.h> #include <asm/mach-types.h> -#undef CONFIG_BOOTDELAY - /* * Display CPU and Board information */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 7b60f29bd2..e9ce3f6d1c 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -50,6 +50,9 @@ * Hardware drivers */ +/* GPIO banks */ +#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */ + /* * select serial console configuration */ diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 4258dcb7f6..b0d2ffe5b4 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -14,7 +14,6 @@ #include <configs/x86-common.h> #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_ARCH_MISC_INIT #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_PCI_PNP diff --git a/include/configs/rock2.h b/include/configs/rock2.h index d6423e7e55..a29f55709d 100644 --- a/include/configs/rock2.h +++ b/include/configs/rock2.h @@ -24,7 +24,6 @@ */ #define CONFIG_ENV_OFFSET (96 * 1024) -#define CONFIG_I2C_EDID #define CONFIG_SYS_WHITE_ON_BLACK #define CONFIG_CONSOLE_SCROLL_LINES 10 diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h index 1b83eb36a7..927bae78eb 100644 --- a/include/configs/rpi-common.h +++ b/include/configs/rpi-common.h @@ -88,6 +88,9 @@ #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_SMSC95XX #define CONFIG_MISC_INIT_R +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL +#define CONFIG_SYS_STDIO_DEREGISTER #endif /* Console UART */ @@ -111,6 +114,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x1000000 #define CONFIG_CONSOLE_MUX #define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_PREBOOT "usb start" /* Shell */ #define CONFIG_SYS_MAXARGS 8 @@ -133,7 +137,7 @@ /* Environment */ #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG #define ENV_DEVICE_SETTINGS \ - "stdin=serial,lcd\0" \ + "stdin=serial,usbkbd\0" \ "stdout=serial,lcd\0" \ "stderr=serial,lcd\0" diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h new file mode 100644 index 0000000000..cd9d6b693b --- /dev/null +++ b/include/configs/theadorable.h @@ -0,0 +1,170 @@ +/* + * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _CONFIG_THEADORABLE_H +#define _CONFIG_THEADORABLE_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_DISPLAY_BOARDINFO_LATE + +/* + * TEXT_BASE needs to be below 16MiB, since this area is scrubbed + * for DDR ECC byte filling in the SPL before loading the main + * U-Boot into it. + */ +#define CONFIG_SYS_TEXT_BASE 0x00800000 +#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ + +/* + * Commands configuration + */ +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_ENV +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_CMD_I2C +#define CONFIG_CMD_SATA +#define CONFIG_CMD_TIME + +/* + * The debugging version enables USB support via defconfig. + * This version should also enable all other non-production + * interfaces / features. + */ +#ifdef CONFIG_USB +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SPI +#define CONFIG_CMD_TFTPPUT +#endif + +/* I2C */ +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MVTWSI +#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE +#define CONFIG_SYS_I2C_SLAVE 0x0 +#define CONFIG_SYS_I2C_SPEED 100000 + +/* USB/EHCI configuration */ +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_MAX_CONTROLLER_COUNT 3 + +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ + +/* SPI NOR flash default params, used by sf commands */ +#define CONFIG_SF_DEFAULT_SPEED 27777777 /* for fast SPL booting */ +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 + +/* Environment in SPI NOR flash */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */ +#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ +#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_PHY_MARVELL /* there is a marvell phy */ +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */ + +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */ +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_PREBOOT +#define CONFIG_FIT + +#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* Keep device tree and initrd in lower memory so the kernel can access them */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0x10000000\0" \ + "initrd_high=0x10000000\0" + +/* SATA support */ +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_SATA_MV +#define CONFIG_LIBATA +#define CONFIG_LBA48 +#define CONFIG_EFI_PARTITION +#define CONFIG_DOS_PARTITION + +/* Additional FS support/configuration */ +#define CONFIG_SUPPORT_VFAT + +/* PCIe support */ +#ifdef CONFIG_CMD_PCI +#ifndef CONFIG_SPL_BUILD +#define CONFIG_PCI +#define CONFIG_PCI_MVEBU +#define CONFIG_PCI_PNP +#endif +#endif + +/* Enable LCD and reserve 512KB from top of memory*/ +#define CONFIG_SYS_MEM_TOP_HIDE 0x80000 + +#define CONFIG_VIDEO +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_CMD_BMP + +/* + * mv-common.h should be defined after CMD configs since it used them + * to enable certain macros + */ +#include "mv-common.h" + +/* + * Memory layout while starting into the bin_hdr via the + * BootROM: + * + * 0x4000.4000 - 0x4003.4000 headers space (192KiB) + * 0x4000.4030 bin_hdr start address + * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) + * 0x4007.fffc BootROM stack top + * + * The address space between 0x4007.fffc and 0x400f.fff is not locked in + * L2 cache thus cannot be used. + */ + +/* SPL */ +/* Defines for SPL */ +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x40004030 +#define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) + +#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) +#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MALLOC_SIMPLE +#endif + +#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) +#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT + +/* SPL related SPI defines */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x1a000 +#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS + +/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ +#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */ + +#endif /* _CONFIG_THEADORABLE_H */ diff --git a/include/configs/v5fx30teval.h b/include/configs/v5fx30teval.h deleted file mode 100644 index 298fa3e6d0..0000000000 --- a/include/configs/v5fx30teval.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es - * This work has been supported by: QTechnology http://qtec.com/ - * SPDX-License-Identifier: GPL-2.0+ -*/ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/*CPU*/ -#define CONFIG_440 1 -#define CONFIG_XILINX_ML507 1 -#include "../board/avnet/v5fx30teval/xparameters.h" - -/*Mem Map*/ -#define CONFIG_SYS_SDRAM_SIZE_MB 64 - -/*Env*/ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x1A0000 -#define CONFIG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CONFIG_ENV_OFFSET) - -/*Misc*/ -#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" - -/*Flash*/ -#define CONFIG_SYS_FLASH_SIZE (16*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 131 -#define MTDIDS_DEFAULT "nor0=v5fx30t-flash" -#define MTDPARTS_DEFAULT "mtdparts=v5fx30t-flash:-(user)" - -/*Generic Configs*/ -#include <configs/xilinx-ppc440.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc.h b/include/configs/xilinx-ppc.h index eb400d0960..d01d88b33f 100644 --- a/include/configs/xilinx-ppc.h +++ b/include/configs/xilinx-ppc.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com * This work has been supported by: QTechnology http://qtec.com/ * * (C) Copyright 2008 @@ -101,22 +101,10 @@ #define CONFIG_SYS_NO_FLASH #endif -/* serial communication */ -#ifdef XPAR_UARTLITE_0_BASEADDR -#define CONFIG_XILINX_UARTLITE -#define XILINX_UARTLITE_BASEADDR XPAR_UARTLITE_0_BASEADDR -#define CONFIG_BAUDRATE XPAR_UARTLITE_0_BAUDRATE -#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -#else -#ifdef XPAR_UARTNS550_0_BASEADDR -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 4 -#define CONFIG_CONS_INDEX 1 -#define CONFIG_SYS_NS16550_COM1 XPAR_UARTNS550_0_BASEADDR -#define CONFIG_SYS_NS16550_CLK XPAR_UARTNS550_0_CLOCK_FREQ_HZ +#define CONFIG_OF_LIBFDT 1 #define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 } -#endif -#endif +/* The following table includes the supported baudrates */ +# define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} #endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc405-generic.h b/include/configs/xilinx-ppc405-generic.h index 40fa0878a4..6182b0e7cf 100644 --- a/include/configs/xilinx-ppc405-generic.h +++ b/include/configs/xilinx-ppc405-generic.h @@ -1,7 +1,7 @@ /* * * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com * This work has been supported by: QTechnology http://qtec.com/ * * (C) Copyright 2008 @@ -14,6 +14,9 @@ #include "../board/xilinx/ppc405-generic/xparameters.h" +#define CONFIG_405 1 +#define CONFIG_XILINX_405 1 + /* sdram */ #define CONFIG_SYS_SDRAM_SIZE_MB 256 @@ -26,16 +29,16 @@ #define CONFIG_ENV_OVERWRITE 1 /*Misc*/ -#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" +#define CONFIG_PREBOOT "echo U-Boot is up and running;" /*Flash*/ -#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR -#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 71 +#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR +#define CONFIG_SYS_FLASH_SIZE (128*1024*1024) +#define CONFIG_SYS_MAX_FLASH_SECT 1024 #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 -#define MTDIDS_DEFAULT "nor0=ppc405-flash" -#define MTDPARTS_DEFAULT "mtdpartsa=ppc405-flash:-(user)" +#define MTDIDS_DEFAULT "nor0=flash" +#define MTDPARTS_DEFAULT "mtdparts=flash:-(user)" -#include <configs/xilinx-ppc405.h> +#include <configs/xilinx-ppc.h> #endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc405.h b/include/configs/xilinx-ppc405.h deleted file mode 100644 index a0151fe8f4..0000000000 --- a/include/configs/xilinx-ppc405.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * - * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es - * This work has been supported by: QTechnology http://qtec.com/ - * - * (C) Copyright 2008 - * Georg Schardt <schardt@team-ctech.de> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* cpu parameter */ -#define CONFIG_405 1 -#define CONFIG_XILINX_405 1 - -#include <configs/xilinx-ppc.h> - -#endif diff --git a/include/configs/xilinx-ppc440-generic.h b/include/configs/xilinx-ppc440-generic.h index 95b8834078..f2505a6cd2 100644 --- a/include/configs/xilinx-ppc440-generic.h +++ b/include/configs/xilinx-ppc440-generic.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com * This work has been supported by: QTechnology http://qtec.com/ * SPDX-License-Identifier: GPL-2.0+ */ @@ -8,31 +8,42 @@ #ifndef __CONFIG_H #define __CONFIG_H -/*CPU*/ +/* CPU */ #define CONFIG_440 1 +#define CONFIG_XILINX_440 1 #define CONFIG_XILINX_PPC440_GENERIC 1 #include "../board/xilinx/ppc440-generic/xparameters.h" -/*Mem Map*/ +/* Mem Map */ #define CONFIG_SYS_SDRAM_SIZE_MB 256 -/*Env*/ +/* Env */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x340000 +#define CONFIG_ENV_OFFSET 0x340000 #define CONFIG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CONFIG_ENV_OFFSET) -/*Misc*/ -#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" - -/*Flash*/ -#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 259 -#define MTDIDS_DEFAULT "nor0=ml507-flash" -#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" - -/*Generic Configs*/ -#include <configs/xilinx-ppc440.h> +/* Misc */ +#define CONFIG_PREBOOT "echo U-Boot is up and running;" + +/* Flash */ +#define CONFIG_SYS_FLASH_SIZE (128*1024*1024) +#define CONFIG_SYS_MAX_FLASH_SECT 1024 +#define MTDIDS_DEFAULT "nor0=flash" +#define MTDPARTS_DEFAULT "mtdparts=flash:-(user)" + +/* Net */ +#ifdef XPAR_LLTEMAC_0_BASEADDR +#define CONFIG_XILINX_LL_TEMAC +#define CONFIG_MII +#define CONFIG_PHYLIB +#define CONFIG_PHY_MARVELL +#define CONFIG_NET_RANDOM_ETHADDR +#define CONFIG_LIB_RAND +#endif + +/* Generic Configs */ +#include <configs/xilinx-ppc.h> #endif /* __CONFIG_H */ diff --git a/include/configs/xilinx-ppc440.h b/include/configs/xilinx-ppc440.h deleted file mode 100644 index f45700878e..0000000000 --- a/include/configs/xilinx-ppc440.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * (C) Copyright 2008 - * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es - * This work has been supported by: QTechnology http://qtec.com/ - * SPDX-License-Identifier: GPL-2.0+ -*/ - -#ifndef __CONFIG_GEN_H -#define __CONFIG_GEN_H - -/*CPU*/ -#define CONFIG_440 1 -#define CONFIG_XILINX_440 1 - -#include <configs/xilinx-ppc.h> - -#endif /* __CONFIG_H */ diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 03f74508ef..27ef74daf5 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -23,10 +23,8 @@ #define GICD_BASE 0xF9010000 #define GICC_BASE 0xF9020000 -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_SYS_SDRAM_BASE 0 -#define CONFIG_SYS_SDRAM_SIZE 0x40000000 +#define CONFIG_SYS_ALT_MEMTEST +#define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE @@ -37,7 +35,9 @@ /* Cache Definitions */ #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_IDENT_STRING " Xilinx ZynqMP" +#if !defined(CONFIG_IDENT_STRING) +# define CONFIG_IDENT_STRING " Xilinx ZynqMP" +#endif #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) @@ -45,7 +45,9 @@ #define CONFIG_OF_LIBFDT /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ -#define COUNTER_FREQUENCY 4000000 +#if !defined(COUNTER_FREQUENCY) +# define COUNTER_FREQUENCY 100000000 +#endif /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000) @@ -137,9 +139,9 @@ #define CONFIG_THOR_RESET_OFF #define DFU_ALT_INFO_RAM \ "dfu_ram_info=" \ - "set dfu_alt_info " \ - "Image ram 0x200000 0x1800000\\\\;" \ - "system.dtb ram 0x7000000 0x40000\0" \ + "setenv dfu_alt_info " \ + "Image ram $kernel_addr $kernel_size\\\\;" \ + "system.dtb ram $fdt_addr $fdt_size\0" \ "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" @@ -156,12 +158,14 @@ "kernel_addr=0x80000\0" \ "fdt_addr=0x7000000\0" \ "fdt_high=0x10000000\0" \ - "sdboot=mmcinfo && load mmc 0:0 $fdt_addr system.dtb && " \ - "load mmc 0:0 $kernel_addr Image && booti $kernel_addr - $fdt_addr\0" \ + "kernel_size=0x2000000\0" \ + "fdt_size=0x80000\0" \ + "sdbootdev=0\0"\ + "sdboot=mmc dev $sdbootdev && mmcinfo && load mmc $sdbootdev:$partid $fdt_addr system.dtb && " \ + "load mmc $sdbootdev:$partid $kernel_addr Image && " \ + "booti $kernel_addr - $fdt_addr\0" \ DFU_ALT_INFO -#define CONFIG_BOOTARGS "setenv bootargs console=ttyPS0,${baudrate} " \ - "earlycon=cdns,mmio,0xff000000,${baudrate}n8" #define CONFIG_PREBOOT "run bootargs" #define CONFIG_BOOTCOMMAND "run $modeboot" #define CONFIG_BOOTDELAY 5 @@ -189,7 +193,10 @@ # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_PHY_MARVELL +# define CONFIG_PHY_NATSEMI # define CONFIG_PHY_TI +# define CONFIG_PHY_GIGE +# define PHY_ANEG_TIMEOUT 20000 #endif /* I2C */ diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index ec39211af3..9906c426f5 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -1,7 +1,5 @@ /* - * Configuration for Xilinx ZynqMP emulation - * platforms. See zynqmp-common.h for ZynqMP - * common configs + * Configuration for Xilinx ZynqMP emulation platforms * * (C) Copyright 2014 - 2015 Xilinx, Inc. * Michal Simek <michal.simek@xilinx.com> @@ -17,6 +15,7 @@ #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 +#define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9) #define CONFIG_ZYNQ_I2C0 #define CONFIG_SYS_I2C_ZYNQ #define CONFIG_ZYNQ_EEPROM @@ -24,6 +23,13 @@ #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ ZYNQMP_USB1_XHCI_BASEADDR} +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE 0x40000000 + +#define COUNTER_FREQUENCY 4000000 + #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_EP_H */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 0ab60839b6..e8c3ef0c38 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -66,7 +66,6 @@ #ifdef CONFIG_ZYNQ_QSPI # define CONFIG_SF_DEFAULT_SPEED 30000000 # define CONFIG_SPI_FLASH_ISSI -# define CONFIG_SPI_FLASH_BAR # define CONFIG_CMD_SF #endif diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 8391e381fa..73cd3ac94c 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -29,6 +29,7 @@ enum uclass_id { UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */ + UCLASS_DISK, /* Disk controller, e.g. SATA */ UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */ UCLASS_RAM, /* RAM controller */ UCLASS_ETH, /* Ethernet device */ @@ -37,6 +38,7 @@ enum uclass_id { UCLASS_I2C_EEPROM, /* I2C EEPROM device */ UCLASS_I2C_GENERIC, /* Generic I2C device */ UCLASS_I2C_MUX, /* I2C multiplexer */ + UCLASS_IRQ, /* Interrupt controller */ UCLASS_KEYBOARD, /* Keyboard input device */ UCLASS_LED, /* Light-emitting diode (LED) */ UCLASS_LPC, /* x86 'low pin count' interface */ @@ -45,6 +47,7 @@ enum uclass_id { UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ UCLASS_MTD, /* Memory Technology Device (MTD) device */ + UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */ UCLASS_PANEL, /* Display panel, such as an LCD */ UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */ UCLASS_PCH, /* x86 platform controller hub */ diff --git a/include/fdtdec.h b/include/fdtdec.h index 25e98c9c9e..dd82916dc0 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -163,7 +163,6 @@ enum fdt_compat_id { COMPAT_INTEL_X86_PINCTRL, /* Intel ICH7/9 pin control */ COMPAT_SOCIONEXT_XHCI, /* Socionext UniPhier xHCI */ COMPAT_INTEL_PCH, /* Intel PCH */ - COMPAT_INTEL_IRQ_ROUTER, /* Intel Interrupt Router */ COMPAT_ALTERA_SOCFPGA_DWMAC, /* SoCFPGA Ethernet controller */ COMPAT_ALTERA_SOCFPGA_DWMMC, /* SoCFPGA DWMMC controller */ COMPAT_ALTERA_SOCFPGA_DWC2USB, /* SoCFPGA DWC2 USB controller */ diff --git a/include/fpga.h b/include/fpga.h index e0d12981b2..d768fb1417 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -46,6 +46,7 @@ typedef struct { /* typedef fpga_desc */ typedef enum { BIT_FULL = 0, BIT_PARTIAL, + BIT_NONE = 0xFF, } bitstream_type; /* root function definitions */ diff --git a/include/lcd.h b/include/lcd.h index d7651a8f08..f76fca77f9 100644 --- a/include/lcd.h +++ b/include/lcd.h @@ -195,8 +195,15 @@ void lcd_sync(void); #define CONSOLE_COLOR_WHITE 0x00ffffff /* Must remain last / highest */ #define NBYTES(bit_code) (NBITS(bit_code) >> 3) #else /* 16bpp color definitions */ -#define CONSOLE_COLOR_BLACK 0x0000 -#define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */ +# define CONSOLE_COLOR_BLACK 0x0000 +# define CONSOLE_COLOR_RED 0xF800 +# define CONSOLE_COLOR_GREEN 0x07E0 +# define CONSOLE_COLOR_YELLOW 0xFFE0 +# define CONSOLE_COLOR_BLUE 0x001F +# define CONSOLE_COLOR_MAGENTA 0xF81F +# define CONSOLE_COLOR_CYAN 0x07FF +# define CONSOLE_COLOR_GREY 0xC618 +# define CONSOLE_COLOR_WHITE 0xffff /* Must remain last / highest */ #endif /* color definitions */ #if LCD_BPP == LCD_COLOR16 diff --git a/include/linux/bug.h b/include/linux/bug.h new file mode 100644 index 0000000000..920e3796c3 --- /dev/null +++ b/include/linux/bug.h @@ -0,0 +1,55 @@ +#ifndef _LINUX_BUG_H +#define _LINUX_BUG_H + +#include <linux/compiler.h> + +#ifdef __CHECKER__ +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0) +#define BUILD_BUG_ON_ZERO(e) (0) +#define BUILD_BUG_ON_NULL(e) ((void*)0) +#define BUILD_BUG_ON_INVALID(e) (0) +#define BUILD_BUG_ON(condition) (0) +#define BUILD_BUG() (0) +#else /* __CHECKER__ */ + +/* Force a compilation error if a constant expression is not a power of 2 */ +#define BUILD_BUG_ON_NOT_POWER_OF_2(n) \ + BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0)) + +/* Force a compilation error if condition is true, but also produce a + result (of value 0 and type size_t), so the expression can be used + e.g. in a structure initializer (or where-ever else comma expressions + aren't permitted). */ +#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:-!!(e); })) +#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:-!!(e); })) + +/* + * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the + * expression but avoids the generation of any code, even if that expression + * has side-effects. + */ +#define BUILD_BUG_ON_INVALID(e) ((void)(sizeof((__force long)(e)))) + +/** + * BUILD_BUG_ON - break compile if a condition is true. + * @condition: the condition which the compiler should know is false. + * + * If you have some code which relies on certain constants being equal, or + * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to + * detect if someone changes it. + * + * The implementation uses gcc's reluctance to create a negative array, but gcc + * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to + * inline functions). Luckily, in 4.3 they added the "error" function + * attribute just for this type of case. Thus, we use a negative sized array + * (should always create an error on gcc versions older than 4.4) and then call + * an undefined function with the error attribute (should always create an + * error on gcc 4.3 and later). If for some reason, neither creates a + * compile-time error, we'll still have a link-time error, which is harder to + * track down. + */ +#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)])) + +#endif /* __CHECKER__ */ + +#endif /* _LINUX_BUG_H */ diff --git a/include/netdev.h b/include/netdev.h index de74b9a534..244f23f93c 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -80,11 +80,6 @@ int tsi108_eth_initialize(bd_t *bis); int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); int armada100_fec_register(unsigned long base_addr); -int xilinx_axiemac_initialize(bd_t *bis, unsigned long base_addr, - unsigned long dma_addr); -int xilinx_emaclite_of_init(const void *blob); -int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, - int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); /* diff --git a/include/part.h b/include/part.h index 4d00e220e4..dc23949ae8 100644 --- a/include/part.h +++ b/include/part.h @@ -10,8 +10,6 @@ #include <ide.h> #include <common.h> -typedef struct block_dev_desc block_dev_desc_t; - struct block_dev_desc { int if_type; /* type of the interface */ int dev; /* device number */ diff --git a/include/pch.h b/include/pch.h new file mode 100644 index 0000000000..79f49bd5f6 --- /dev/null +++ b/include/pch.h @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2015 Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __pch_h +#define __pch_h + +enum pch_version { + PCHV_UNKNOWN, + PCHV_7, + PCHV_9, +}; + +#define PCH_RCBA 0xf0 + +#define BIOS_CTRL_BIOSWE BIT(0) + +/* Operations for the Platform Controller Hub */ +struct pch_ops { + /** + * get_sbase() - get the address of SPI base + * + * @dev: PCH device to check + * @sbasep: Returns address of SPI base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no SPI base) + */ + int (*get_sbase)(struct udevice *dev, ulong *sbasep); + + /** + * get_version() - get the PCH version + * + * @return version, or -ENOSYS if unknown + */ + enum pch_version (*get_version)(struct udevice *dev); + + /** + * set_spi_protect() - set whether SPI flash is protected or not + * + * @dev: PCH device to adjust + * @protect: true to protect, false to unprotect + * + * @return 0 on success, -ENOSYS if not implemented + */ + int (*set_spi_protect)(struct udevice *dev, bool protect); +}; + +#define pch_get_ops(dev) ((struct pch_ops *)(dev)->driver->ops) + +/** + * pch_get_sbase() - get the address of SPI base + * + * @dev: PCH device to check + * @sbasep: Returns address of SPI base if available, else 0 + * @return 0 if OK, -ve on error (e.g. there is no SPI base) + */ +int pch_get_sbase(struct udevice *dev, ulong *sbasep); + +/** + * pch_get_version() - get the PCH version + * + * @return version, or -ENOSYS if unknown + */ +enum pch_version pch_get_version(struct udevice *dev); + +/** + * set_spi_protect() - set whether SPI flash is protected or not + * + * @dev: PCH device to adjust + * @protect: true to protect, false to unprotect + * + * @return 0 on success, -ENOSYS if not implemented + */ +int pch_set_spi_protect(struct udevice *dev, bool protect); + +#endif diff --git a/include/pci.h b/include/pci.h index cb2562f109..d0d152c00b 100644 --- a/include/pci.h +++ b/include/pci.h @@ -757,7 +757,9 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); /** * pci_write_bar32() - Write the address of a BAR including control bits * - * This writes a raw address (with control bits) to a bar + * This writes a raw address (with control bits) to a bar. This can be used + * with devices which require hard-coded addresses, not part of the normal + * PCI enumeration process. * * @hose: PCI hose to use * @dev: PCI device to update @@ -765,7 +767,7 @@ extern void pci_mpc85xx_init (struct pci_controller *hose); * @addr: BAR address with control bits */ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, - u32 addr_and_ctrl); + u32 addr); /** * pci_read_bar32() - read the address of a bar @@ -1167,6 +1169,17 @@ int pci_get_regions(struct udevice *dev, struct pci_region **iop, struct pci_region **memp, struct pci_region **prefp); /** + * dm_pci_write_bar32() - Write the address of a BAR + * + * This writes a raw address to a bar + * + * @dev: PCI device to update + * @barnum: BAR number (0-5) + * @addr: BAR address + */ +void dm_pci_write_bar32(struct udevice *dev, int barnum, u32 addr); + +/** * dm_pci_read_bar32() - read a base address register from a device * * @dev: Device to check diff --git a/include/syscon.h b/include/syscon.h index c62ccd61b3..4593b6e3eb 100644 --- a/include/syscon.h +++ b/include/syscon.h @@ -37,6 +37,20 @@ struct regmap *syscon_get_regmap(struct udevice *dev); * * Each system controller can be accessed by its driver data, which is * assumed to be unique through the scope of all system controllers that + * are in use. This function looks up the controller given this driver data. + * + * @driver_data: Driver data value to look up + * @devp: Returns the controller correponding to @driver_data + * @return 0 on success, -ENODEV if the ID was not found, or other -ve error + * code + */ +int syscon_get_by_driver_data(ulong driver_data, struct udevice **devp); + +/** + * syscon_get_regmap_by_driver_data() - Look up a controller by its ID + * + * Each system controller can be accessed by its driver data, which is + * assumed to be unique through the scope of all system controllers that * are in use. This function looks up the regmap given this driver data. * * @driver_data: Driver data value to look up diff --git a/include/usb_ether.h b/include/usb_ether.h index c6d1416048..51fce4e95d 100644 --- a/include/usb_ether.h +++ b/include/usb_ether.h @@ -131,6 +131,12 @@ int smsc95xx_eth_probe(struct usb_device *dev, unsigned int ifnum, struct ueth_data *ss); int smsc95xx_eth_get_info(struct usb_device *dev, struct ueth_data *ss, struct eth_device *eth); + +void r8152_eth_before_probe(void); +int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum, + struct ueth_data *ss); +int r8152_eth_get_info(struct usb_device *dev, struct ueth_data *ss, + struct eth_device *eth); #endif #endif /* __USB_ETHER_H__ */ diff --git a/include/wait_bit.h b/include/wait_bit.h new file mode 100644 index 0000000000..061a2db5a2 --- /dev/null +++ b/include/wait_bit.h @@ -0,0 +1,71 @@ +/* + * Wait for bit with timeout and ctrlc + * + * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __WAIT_BIT_H +#define __WAIT_BIT_H + +#include <common.h> +#include <console.h> +#include <asm/errno.h> +#include <asm/io.h> + +/** + * wait_for_bit() waits for bit set/cleared in register + * + * Function polls register waiting for specific bit(s) change + * (either 0->1 or 1->0). It can fail under two conditions: + * - Timeout + * - User interaction (CTRL-C) + * Function succeeds only if all bits of masked register are set/cleared + * (depending on set option). + * + * @param prefix Prefix added to timeout messagge (message visible only + * with debug enabled) + * @param reg Register that will be read (using readl()) + * @param mask Bit(s) of register that must be active + * @param set Selects wait condition (bit set or clear) + * @param timeout_ms Timeout (in miliseconds) + * @param breakable Enables CTRL-C interruption + * @return 0 on success, -ETIMEDOUT or -EINTR on failure + */ +static inline int wait_for_bit(const char *prefix, const u32 *reg, + const u32 mask, const bool set, + const unsigned int timeout_ms, + const bool breakable) +{ + u32 val; + unsigned long start = get_timer(0); + + while (1) { + val = readl(reg); + + if (!set) + val = ~val; + + if ((val & mask) == mask) + return 0; + + if (get_timer(start) > timeout_ms) + break; + + if (breakable && ctrlc()) { + puts("Abort\n"); + return -EINTR; + } + + udelay(1); + } + + debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n", prefix, reg, mask, + set); + + return -ETIMEDOUT; +} + + +#endif |
