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-rw-r--r--include/configs/db-88f6820-gp.h35
-rw-r--r--include/configs/db-mv784mp-gp.h31
-rw-r--r--include/configs/maxbcm.h2
3 files changed, 66 insertions, 2 deletions
diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h
index a429107a9a..73b323605e 100644
--- a/include/configs/db-88f6820-gp.h
+++ b/include/configs/db-88f6820-gp.h
@@ -11,6 +11,7 @@
* High Level Configuration Options (easy to change)
*/
#define CONFIG_ARMADA_XP /* SOC Family Name */
+#define CONFIG_ARMADA_38X
#define CONFIG_DB_88F6820_GP /* Board target name for DDR training */
#define CONFIG_SYS_L2_PL310
@@ -108,6 +109,40 @@
"fdt_high=0x10000000\0" \
"initrd_high=0x10000000\0"
+/* SPL */
+/* Defines for SPL */
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_SIZE (140 << 10)
+#define CONFIG_SPL_TEXT_BASE 0x40000030
+#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
+
+#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
+#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
+
+#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
+ CONFIG_SPL_BSS_MAX_SIZE)
+#define CONFIG_SYS_SPL_MALLOC_SIZE (16 << 10)
+
+#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
+#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+
+/* SPL related SPI defines */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPL_SPI_BUS 0
+#define CONFIG_SPL_SPI_CS 0
+#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
+
+/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
+#define CONFIG_SYS_MVEBU_DDR_A38X
+#define CONFIG_DDR3
+
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h
index c33a58895a..41e6fdcb52 100644
--- a/include/configs/db-mv784mp-gp.h
+++ b/include/configs/db-mv784mp-gp.h
@@ -27,6 +27,7 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
#define CONFIG_CMD_PING
#define CONFIG_CMD_SF
#define CONFIG_CMD_SPI
@@ -60,6 +61,34 @@
#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup */
#define CONFIG_SYS_ALT_MEMTEST
+/* SATA support */
+#ifdef CONFIG_CMD_IDE
+#define __io
+#define CONFIG_IDE_PREINIT
+#define CONFIG_MVSATA_IDE
+
+/* Needs byte-swapping for ATA data register */
+#define CONFIG_IDE_SWAP_IO
+
+#define CONFIG_SYS_ATA_REG_OFFSET 0x0100 /* Offset for register access */
+#define CONFIG_SYS_ATA_DATA_OFFSET 0x0100 /* Offset for data I/O */
+#define CONFIG_SYS_ATA_ALT_OFFSET 0x0100
+
+/* Each 8-bit ATA register is aligned to a 4-bytes address */
+#define CONFIG_SYS_ATA_STRIDE 4
+
+/* CONFIG_CMD_IDE requires some #defines for ATA registers */
+#define CONFIG_SYS_IDE_MAXBUS 2
+#define CONFIG_SYS_IDE_MAXDEVICE CONFIG_SYS_IDE_MAXBUS
+
+/* ATA registers base is at SATA controller base */
+#define CONFIG_SYS_ATA_BASE_ADDR MVEBU_AXP_SATA_BASE
+#define CONFIG_SYS_ATA_IDE0_OFFSET 0x2000
+#define CONFIG_SYS_ATA_IDE1_OFFSET 0x4000
+
+#define CONFIG_DOS_PARTITION
+#endif /* CONFIG_CMD_IDE */
+
/*
* mv-common.h should be defined after CMD configs since it used them
* to enable certain macros
@@ -109,7 +138,7 @@
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_SYS_MVEBU_DDR
+#define CONFIG_SYS_MVEBU_DDR_AXP
#define CONFIG_SPD_EEPROM 0x4e
#endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index 4826044857..0fb117f9d3 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -108,7 +108,7 @@
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_SYS_MVEBU_DDR
+#define CONFIG_SYS_MVEBU_DDR_AXP
#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
#endif /* _CONFIG_DB_MV7846MP_GP_H */
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