diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common.h | 3 | ||||
| -rw-r--r-- | include/configs/ap_sh4a_4a.h | 176 | ||||
| -rw-r--r-- | include/configs/ecovec.h | 1 | ||||
| -rw-r--r-- | include/configs/espt.h | 1 | ||||
| -rw-r--r-- | include/configs/r0p7734.h | 186 | ||||
| -rw-r--r-- | include/configs/rsk7269.h | 76 | ||||
| -rw-r--r-- | include/configs/sh7757lcr.h | 1 | ||||
| -rw-r--r-- | include/configs/sh7763rdp.h | 1 |
8 files changed, 445 insertions, 0 deletions
diff --git a/include/common.h b/include/common.h index 8564a65cfd..ecfa6c429f 100644 --- a/include/common.h +++ b/include/common.h @@ -355,6 +355,9 @@ int setenv_addr(const char *varname, const void *addr); # include <asm/mach-types.h> # include <asm/u-boot-nds32.h> #endif /* CONFIG_NDS32 */ +#ifdef CONFIG_MIPS +# include <asm/u-boot-mips.h> +#endif /* CONFIG_MIPS */ #ifdef CONFIG_AUTO_COMPLETE int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf); diff --git a/include/configs/ap_sh4a_4a.h b/include/configs/ap_sh4a_4a.h new file mode 100644 index 0000000000..f63061b80f --- /dev/null +++ b/include/configs/ap_sh4a_4a.h @@ -0,0 +1,176 @@ +/* + * Configuation settings for the Alpha Project AP-SH4A-4A board + * + * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __AP_SH4A_4A_H +#define __AP_SH4A_4A_H + +#undef DEBUG +#define CONFIG_SH 1 +#define CONFIG_SH4 1 +#define CONFIG_SH4A 1 +#define CONFIG_CPU_SH7734 1 +#define CONFIG_AP_SH4A_4A 1 +#define CONFIG_400MHZ_MODE 1 +/* #define CONFIG_533MHZ_MODE 1 */ + +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_SYS_TEXT_BASE 0x8BFC0000 + +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_ENV +#define CONFIG_CMD_SAVEENV + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttySC4,115200" + +#define CONFIG_VERSION_VARIABLE +#undef CONFIG_SHOW_BOOT_PROGRESS + +/* Ether */ +#define CONFIG_SH_ETHER 1 +#define CONFIG_SH_ETHER_USE_PORT (0) +#define CONFIG_SH_ETHER_PHY_ADDR (0x0) +#define CONFIG_SH_ETHER_PHY_MODE (PHY_INTERFACE_MODE_GMII) +#define CONFIG_SH_ETHER_SH7734_MII (0x02) /* GMII */ +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL 1 +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SH_SH7734_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_SYS_MAX_I2C_BUS 2 +#define CONFIG_SYS_I2C_MODULE 0 +#define CONFIG_SYS_I2C_SPEED 400000 /* 400 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x50 +#define CONFIG_SH_I2C_DATA_HIGH 4 +#define CONFIG_SH_I2C_DATA_LOW 5 +#define CONFIG_SH_I2C_CLOCK 500000000 +#define CONFIG_SH_I2C_BASE0 0xFFC70000 +#define CONFIG_SH_I2C_BASE1 0xFFC71000 + +/* undef to save memory */ +#define CONFIG_SYS_LONGHELP +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT "=> " +/* Buffer size for input from the Console */ +#define CONFIG_SYS_CBSIZE 256 +/* Buffer size for Console output */ +#define CONFIG_SYS_PBSIZE 256 +/* max args accepted for monitor commands */ +#define CONFIG_SYS_MAXARGS 16 +/* Buffer size for Boot Arguments passed to kernel */ +#define CONFIG_SYS_BARGSIZE 512 +/* List of legal baudrate settings for this board */ +#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } + +/* SCIF */ +#define CONFIG_SCIF_CONSOLE 1 +#define CONFIG_SCIF 1 +#define CONFIG_CONS_SCIF4 1 + +/* Suppress display of console information at boot */ +#undef CONFIG_SYS_CONSOLE_INFO_QUIET +#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE (0x88000000) +#define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) + +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE) +/* Enable alternate, more extensive, memory test */ +#undef CONFIG_SYS_ALT_MEMTEST +/* Scratch address used by the alternate memory test */ +#undef CONFIG_SYS_MEMTEST_SCRATCH + +/* Enable temporary baudrate change while serial download */ +#undef CONFIG_SYS_LOADS_BAUD_CHANGE + +/* FLASH */ +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI +#undef CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BASE (0xA0000000) +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } + +/* Timeout for Flash erase operations (in ms) */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) +/* Timeout for Flash write operations (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) +/* Timeout for Flash set sector lock bit operations (in ms) */ +#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) +/* Timeout for Flash clear lock bit operations (in ms) */ +#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) + +/* + * Use hardware flash sectors protection instead + * of U-Boot software protection + */ +#undef CONFIG_SYS_FLASH_PROTECTION +#undef CONFIG_SYS_DIRECT_FLASH_TFTP + +/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) +/* Monitor size */ +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +/* Size of DRAM reserved for malloc() use */ +#define CONFIG_SYS_MALLOC_LEN (256 * 1024) +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE (256) +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) + +/* ENV setting */ +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) +/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ +#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) + +/* Board Clock */ +#if defined(CONFIG_400MHZ_MODE) +#define CONFIG_SYS_CLK_FREQ 50000000 +#else +#define CONFIG_SYS_CLK_FREQ 44444444 +#endif +#define CONFIG_SYS_TMU_CLK_DIV 4 +#define CONFIG_SYS_HZ 1000 + +#endif /* __AP_SH4A_4A_H */ diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h index 4d09132701..f6aacd0f21 100644 --- a/include/configs/ecovec.h +++ b/include/configs/ecovec.h @@ -95,6 +95,7 @@ #define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII /* USB / R8A66597 */ #define CONFIG_USB_R8A66597_HCD diff --git a/include/configs/espt.h b/include/configs/espt.h index 3df1faeeef..f61e2d87e5 100644 --- a/include/configs/espt.h +++ b/include/configs/espt.h @@ -124,5 +124,6 @@ #define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #endif /* __SH7763RDP_H */ diff --git a/include/configs/r0p7734.h b/include/configs/r0p7734.h new file mode 100644 index 0000000000..f143c3bea5 --- /dev/null +++ b/include/configs/r0p7734.h @@ -0,0 +1,186 @@ +/* + * Configuation settings for the Renesas Solutions r0p7734 board + * + * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __R0P7734_H +#define __R0P7734_H + +#undef DEBUG +#define CONFIG_SH 1 +#define CONFIG_SH4 1 +#define CONFIG_SH4A 1 +#define CONFIG_CPU_SH7734 1 +#define CONFIG_R0P7734 1 +#define CONFIG_400MHZ_MODE 1 +/* #define CONFIG_533MHZ_MODE 1 */ + +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 + +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII +#define CONFIG_CMD_NFS +#define CONFIG_CMD_SDRAM +#define CONFIG_CMD_ENV +#define CONFIG_CMD_SAVEENV + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "console=ttySC3,115200" + +#define CONFIG_VERSION_VARIABLE +#undef CONFIG_SHOW_BOOT_PROGRESS + +/* Ether */ +#define CONFIG_SH_ETHER 1 +#define CONFIG_SH_ETHER_USE_PORT (0) +#define CONFIG_SH_ETHER_PHY_ADDR (0x0) +#define CONFIG_PHYLIB +#define CONFIG_PHY_SMSC 1 +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_SH7734_MII (0x00) /* MII */ +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII +#ifndef CONFIG_SH_ETHER +# define CONFIG_SMC911X +# define CONFIG_SMC911X_16_BIT +# define CONFIG_SMC911X_BASE (0x84000000) +#endif + + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SH_SH7734_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_I2C_MULTI_BUS 1 +#define CONFIG_SYS_MAX_I2C_BUS 2 +#define CONFIG_SYS_I2C_MODULE 0 +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ +#define CONFIG_SYS_I2C_SLAVE 0x50 +#define CONFIG_SH_I2C_DATA_HIGH 4 +#define CONFIG_SH_I2C_DATA_LOW 5 +#define CONFIG_SH_I2C_CLOCK 500000000 +#define CONFIG_SH_I2C_BASE0 0xFFC70000 +#define CONFIG_SH_I2C_BASE1 0xFFC7100 + +/* undef to save memory */ +#define CONFIG_SYS_LONGHELP +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT "=> " +/* Buffer size for input from the Console */ +#define CONFIG_SYS_CBSIZE 256 +/* Buffer size for Console output */ +#define CONFIG_SYS_PBSIZE 256 +/* max args accepted for monitor commands */ +#define CONFIG_SYS_MAXARGS 16 +/* Buffer size for Boot Arguments passed to kernel */ +#define CONFIG_SYS_BARGSIZE 512 +/* List of legal baudrate settings for this board */ +#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } + +/* SCIF */ +#define CONFIG_SCIF_CONSOLE 1 +#define CONFIG_SCIF 1 +#define CONFIG_CONS_SCIF3 1 + +/* Suppress display of console information at boot */ +#undef CONFIG_SYS_CONSOLE_INFO_QUIET +#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE (0x88000000) +#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) + +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 100 * 1024 * 1024) +/* Enable alternate, more extensive, memory test */ +#undef CONFIG_SYS_ALT_MEMTEST +/* Scratch address used by the alternate memory test */ +#undef CONFIG_SYS_MEMTEST_SCRATCH + +/* Enable temporary baudrate change while serial download */ +#undef CONFIG_SYS_LOADS_BAUD_CHANGE + +/* FLASH */ +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_CFI +#undef CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BASE (0xA0000000) +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } + +/* Timeout for Flash erase operations (in ms) */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) +/* Timeout for Flash write operations (in ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) +/* Timeout for Flash set sector lock bit operations (in ms) */ +#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) +/* Timeout for Flash clear lock bit operations (in ms) */ +#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) + +/* + * Use hardware flash sectors protection instead + * of U-Boot software protection + */ +#undef CONFIG_SYS_FLASH_PROTECTION +#undef CONFIG_SYS_DIRECT_FLASH_TFTP + +/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) +/* Monitor size */ +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +/* Size of DRAM reserved for malloc() use */ +#define CONFIG_SYS_MALLOC_LEN (256 * 1024) +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE (256) +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) + +/* ENV setting */ +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) +/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ +#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) + +/* Board Clock */ +#if defined(CONFIG_400MHZ_MODE) +#define CONFIG_SYS_CLK_FREQ 50000000 +#else +#define CONFIG_SYS_CLK_FREQ 44444444 +#endif +#define CONFIG_SYS_TMU_CLK_DIV 4 +#define CONFIG_SYS_HZ 1000 + +#endif /* __R0P7734_H */ diff --git a/include/configs/rsk7269.h b/include/configs/rsk7269.h new file mode 100644 index 0000000000..26c1764212 --- /dev/null +++ b/include/configs/rsk7269.h @@ -0,0 +1,76 @@ +/* + * Configuation settings for the Renesas RSK2+SH7269 board + * + * Copyright (C) 2012 Renesas Electronics Europe Ltd. + * Copyright (C) 2012 Phil Edworthy + * + * This file is released under the terms of GPL v2 and any later version. + * See the file COPYING in the root directory of the source tree for details. + */ + +#ifndef __RSK7269_H +#define __RSK7269_H + +#undef DEBUG +#define CONFIG_SH 1 +#define CONFIG_SH2 1 +#define CONFIG_SH2A 1 +#define CONFIG_CPU_SH7269 1 +#define CONFIG_RSK7269 1 + +#ifndef _CONFIG_CMD_DEFAULT_H +# include <config_cmd_default.h> +#endif + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_BOOTARGS "console=ttySC7,115200" +#define CONFIG_BOOTDELAY 3 +#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Boot Argument Buffer Size */ +#define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +/* Serial */ +#define CONFIG_SCIF_CONSOLE +#define CONFIG_CONS_SCIF7 + +/* Memory */ +/* u-boot relocated to top 256KB of ram */ +#define CONFIG_SYS_TEXT_BASE 0x0DFC0000 +#define CONFIG_SYS_SDRAM_BASE 0x0C000000 +#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) + +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) +#define CONFIG_SYS_MALLOC_LEN (256 * 1024) +#define CONFIG_SYS_MONITOR_LEN (128 * 1024) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) + +/* NOR Flash */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 512 + +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_OFFSET (128 * 1024) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE + +/* Board Clock */ +#define CONFIG_SYS_CLK_FREQ 66125000 +#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ +#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) + +/* Network interface */ +#define CONFIG_SMC911X +#define CONFIG_SMC911X_16_BIT +#define CONFIG_SMC911X_BASE 0x24000000 + +#endif /* __RSK7269_H */ diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h index 708bff7bb7..d5c7b7215e 100644 --- a/include/configs/sh7757lcr.h +++ b/include/configs/sh7757lcr.h @@ -109,6 +109,7 @@ #define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #define SH7757LCR_ETHERNET_MAC_BASE_SPI 0x000b0000 #define SH7757LCR_SPI_SECTOR_SIZE (64 * 1024) diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h index 59728f575d..9efbbd0c29 100644 --- a/include/configs/sh7763rdp.h +++ b/include/configs/sh7763rdp.h @@ -124,5 +124,6 @@ #define CONFIG_PHYLIB #define CONFIG_BITBANGMII #define CONFIG_BITBANGMII_MULTI +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII #endif /* __SH7763RDP_H */ |
