diff options
Diffstat (limited to 'include')
34 files changed, 206 insertions, 199 deletions
diff --git a/include/.gitignore b/include/.gitignore index 03a533ced4..ef7dd5fc8a 100644 --- a/include/.gitignore +++ b/include/.gitignore @@ -1,7 +1,7 @@ /autoconf.mk* /asm -/asm-blackfin/arch -/asm-ppc/arch +/asm-*/arch +/asm-*/proc /bmp_logo.h /config.h /config.mk diff --git a/include/asm-arm/arch-at91sam9/at91_pio.h b/include/asm-arm/arch-at91sam9/at91_pio.h index 84c3866d30..f6ce1f924e 100644 --- a/include/asm-arm/arch-at91sam9/at91_pio.h +++ b/include/asm-arm/arch-at91sam9/at91_pio.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/at91_pio.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91_pio.h] * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People diff --git a/include/asm-arm/arch-at91sam9/at91_pit.h b/include/asm-arm/arch-at91sam9/at91_pit.h index 5026325a5a..94dd242a5f 100644 --- a/include/asm-arm/arch-at91sam9/at91_pit.h +++ b/include/asm-arm/arch-at91sam9/at91_pit.h @@ -1,5 +1,8 @@ /* - * include/asm-arm/arch-at91/at91_pit.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91_pit.h] + * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. * * Periodic Interval Timer (PIT) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. diff --git a/include/asm-arm/arch-at91sam9/at91_pmc.h b/include/asm-arm/arch-at91sam9/at91_pmc.h index 52cd8e5dab..103be86999 100644 --- a/include/asm-arm/arch-at91sam9/at91_pmc.h +++ b/include/asm-arm/arch-at91sam9/at91_pmc.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/at91_pmc.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91_pmc.h] * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People diff --git a/include/asm-arm/arch-at91sam9/at91_rstc.h b/include/asm-arm/arch-at91sam9/at91_rstc.h index fb8d1618a2..e49caef921 100644 --- a/include/asm-arm/arch-at91sam9/at91_rstc.h +++ b/include/asm-arm/arch-at91sam9/at91_rstc.h @@ -1,5 +1,8 @@ /* - * include/asm-arm/arch-at91/at91_rstc.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91_rstc.h] + * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. * * Reset Controller (RSTC) - System peripherals regsters. * Based on AT91SAM9261 datasheet revision D. diff --git a/include/asm-arm/arch-at91sam9/at91_spi.h b/include/asm-arm/arch-at91sam9/at91_spi.h index aaad92621c..30643c6092 100644 --- a/include/asm-arm/arch-at91sam9/at91_spi.h +++ b/include/asm-arm/arch-at91sam9/at91_spi.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/at91_spi.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h] * * Copyright (C) 2005 Ivan Kokshaysky * Copyright (C) SAN People diff --git a/include/asm-arm/arch-at91sam9/at91cap9.h b/include/asm-arm/arch-at91sam9/at91cap9.h index e16909c641..d1b33a069a 100644 --- a/include/asm-arm/arch-at91sam9/at91cap9.h +++ b/include/asm-arm/arch-at91sam9/at91cap9.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/at91cap9.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9.h] * * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> diff --git a/include/asm-arm/arch-at91sam9/at91cap9_matrix.h b/include/asm-arm/arch-at91sam9/at91cap9_matrix.h index a641686b6c..22b7e9b8f4 100644 --- a/include/asm-arm/arch-at91sam9/at91cap9_matrix.h +++ b/include/asm-arm/arch-at91sam9/at91cap9_matrix.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/at91cap9_matrix.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91cap9_matrix.h] * * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> diff --git a/include/asm-arm/arch-at91sam9/at91sam9260.h b/include/asm-arm/arch-at91sam9/at91sam9260.h index 1bf45989b5..920a7f3c9f 100644 --- a/include/asm-arm/arch-at91sam9/at91sam9260.h +++ b/include/asm-arm/arch-at91sam9/at91sam9260.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/at91sam9260.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260.h] * * (C) 2006 Andrew Victor * diff --git a/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h b/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h index a8e9fec6c7..f8b023d932 100644 --- a/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h +++ b/include/asm-arm/arch-at91sam9/at91sam9260_matrix.h @@ -1,5 +1,7 @@ /* - * include/asm-arm/arch-at91/at91sam9260_matrix.h + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9260_matrix.h] + * + * Copyright (C) 2007 Atmel Corporation. * * Memory Controllers (MATRIX, EBI) - System peripherals registers. * Based on AT91SAM9260 datasheet revision B. diff --git a/include/asm-arm/arch-at91sam9/at91sam926x_mc.h b/include/asm-arm/arch-at91sam9/at91sam926x_mc.h deleted file mode 100644 index 041138f809..0000000000 --- a/include/asm-arm/arch-at91sam9/at91sam926x_mc.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * include/asm-arm/arch-at91/at91sam926x_mc.h - * - * Memory Controllers (SMC, SDRAMC) - System peripherals registers. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91SAM926x_MC_H -#define AT91SAM926x_MC_H - -/* SDRAM Controller (SDRAMC) registers */ -#define AT91_SDRAMC_MR (AT91_SDRAMC + 0x00) /* SDRAM Controller Mode Register */ -#define AT91_SDRAMC_MODE (0xf << 0) /* Command Mode */ -#define AT91_SDRAMC_MODE_NORMAL 0 -#define AT91_SDRAMC_MODE_NOP 1 -#define AT91_SDRAMC_MODE_PRECHARGE 2 -#define AT91_SDRAMC_MODE_LMR 3 -#define AT91_SDRAMC_MODE_REFRESH 4 -#define AT91_SDRAMC_MODE_EXT_LMR 5 -#define AT91_SDRAMC_MODE_DEEP 6 - -#define AT91_SDRAMC_TR (AT91_SDRAMC + 0x04) /* SDRAM Controller Refresh Timer Register */ -#define AT91_SDRAMC_COUNT (0xfff << 0) /* Refresh Timer Counter */ - -#define AT91_SDRAMC_CR (AT91_SDRAMC + 0x08) /* SDRAM Controller Configuration Register */ -#define AT91_SDRAMC_NC (3 << 0) /* Number of Column Bits */ -#define AT91_SDRAMC_NC_8 (0 << 0) -#define AT91_SDRAMC_NC_9 (1 << 0) -#define AT91_SDRAMC_NC_10 (2 << 0) -#define AT91_SDRAMC_NC_11 (3 << 0) -#define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ -#define AT91_SDRAMC_NR_11 (0 << 2) -#define AT91_SDRAMC_NR_12 (1 << 2) -#define AT91_SDRAMC_NR_13 (2 << 2) -#define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ -#define AT91_SDRAMC_NB_2 (0 << 4) -#define AT91_SDRAMC_NB_4 (1 << 4) -#define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ -#define AT91_SDRAMC_CAS_1 (1 << 5) -#define AT91_SDRAMC_CAS_2 (2 << 5) -#define AT91_SDRAMC_CAS_3 (3 << 5) -#define AT91_SDRAMC_DBW (1 << 7) /* Data Bus Width */ -#define AT91_SDRAMC_DBW_32 (0 << 7) -#define AT91_SDRAMC_DBW_16 (1 << 7) -#define AT91_SDRAMC_TWR (0xf << 8) /* Write Recovery Delay */ -#define AT91_SDRAMC_TRC (0xf << 12) /* Row Cycle Delay */ -#define AT91_SDRAMC_TRP (0xf << 16) /* Row Precharge Delay */ -#define AT91_SDRAMC_TRCD (0xf << 20) /* Row to Column Delay */ -#define AT91_SDRAMC_TRAS (0xf << 24) /* Active to Precharge Delay */ -#define AT91_SDRAMC_TXSR (0xf << 28) /* Exit Self Refresh to Active Delay */ - -#define AT91_SDRAMC_LPR (AT91_SDRAMC + 0x10) /* SDRAM Controller Low Power Register */ -#define AT91_SDRAMC_LPCB (3 << 0) /* Low-power Configurations */ -#define AT91_SDRAMC_LPCB_DISABLE 0 -#define AT91_SDRAMC_LPCB_SELF_REFRESH 1 -#define AT91_SDRAMC_LPCB_POWER_DOWN 2 -#define AT91_SDRAMC_LPCB_DEEP_POWER_DOWN 3 -#define AT91_SDRAMC_PASR (7 << 4) /* Partial Array Self Refresh */ -#define AT91_SDRAMC_TCSR (3 << 8) /* Temperature Compensated Self Refresh */ -#define AT91_SDRAMC_DS (3 << 10) /* Drive Strenght */ -#define AT91_SDRAMC_TIMEOUT (3 << 12) /* Time to define when Low Power Mode is enabled */ -#define AT91_SDRAMC_TIMEOUT_0_CLK_CYCLES (0 << 12) -#define AT91_SDRAMC_TIMEOUT_64_CLK_CYCLES (1 << 12) -#define AT91_SDRAMC_TIMEOUT_128_CLK_CYCLES (2 << 12) - -#define AT91_SDRAMC_IER (AT91_SDRAMC + 0x14) /* SDRAM Controller Interrupt Enable Register */ -#define AT91_SDRAMC_IDR (AT91_SDRAMC + 0x18) /* SDRAM Controller Interrupt Disable Register */ -#define AT91_SDRAMC_IMR (AT91_SDRAMC + 0x1C) /* SDRAM Controller Interrupt Mask Register */ -#define AT91_SDRAMC_ISR (AT91_SDRAMC + 0x20) /* SDRAM Controller Interrupt Status Register */ -#define AT91_SDRAMC_RES (1 << 0) /* Refresh Error Status */ - -#define AT91_SDRAMC_MDR (AT91_SDRAMC + 0x24) /* SDRAM Memory Device Register */ -#define AT91_SDRAMC_MD (3 << 0) /* Memory Device Type */ -#define AT91_SDRAMC_MD_SDRAM 0 -#define AT91_SDRAMC_MD_LOW_POWER_SDRAM 1 - -/* Static Memory Controller (SMC) registers */ -#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ -#define AT91_SMC_NWESETUP_(x) ((x) << 0) -#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ -#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) -#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ -#define AT91_SMC_NRDSETUP_(x) ((x) << 16) -#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ -#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) - -#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ -#define AT91_SMC_NWEPULSE_(x) ((x) << 0) -#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ -#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) -#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ -#define AT91_SMC_NRDPULSE_(x) ((x) << 16) -#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ -#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) - -#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ -#define AT91_SMC_NWECYCLE_(x) ((x) << 0) -#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ -#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) - -#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ -#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ -#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ -#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) -#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) -#define AT91_SMC_EXNWMODE_READY (3 << 4) -#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ -#define AT91_SMC_BAT_SELECT (0 << 8) -#define AT91_SMC_BAT_WRITE (1 << 8) -#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ -#define AT91_SMC_DBW_8 (0 << 12) -#define AT91_SMC_DBW_16 (1 << 12) -#define AT91_SMC_DBW_32 (2 << 12) -#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ -#define AT91_SMC_TDF_(x) ((x) << 16) -#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ -#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ -#define AT91_SMC_PS (3 << 28) /* Page Size */ -#define AT91_SMC_PS_4 (0 << 28) -#define AT91_SMC_PS_8 (1 << 28) -#define AT91_SMC_PS_16 (2 << 28) -#define AT91_SMC_PS_32 (3 << 28) - -#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ -#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ -#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ -#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ -#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ -#endif - -#endif diff --git a/include/asm-arm/arch-at91sam9/at91sam9_smc.h b/include/asm-arm/arch-at91sam9/at91sam9_smc.h new file mode 100644 index 0000000000..d64511b36d --- /dev/null +++ b/include/asm-arm/arch-at91sam9/at91sam9_smc.h @@ -0,0 +1,76 @@ +/* + * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h] + * + * Copyright (C) 2007 Andrew Victor + * Copyright (C) 2007 Atmel Corporation. + * + * Static Memory Controllers (SMC) - System peripherals registers. + * Based on AT91SAM9261 datasheet revision D. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91SAM9_SMC_H +#define AT91SAM9_SMC_H + +#define AT91_SMC_SETUP(n) (AT91_SMC + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ +#define AT91_SMC_NWESETUP (0x3f << 0) /* NWE Setup Length */ +#define AT91_SMC_NWESETUP_(x) ((x) << 0) +#define AT91_SMC_NCS_WRSETUP (0x3f << 8) /* NCS Setup Length in Write Access */ +#define AT91_SMC_NCS_WRSETUP_(x) ((x) << 8) +#define AT91_SMC_NRDSETUP (0x3f << 16) /* NRD Setup Length */ +#define AT91_SMC_NRDSETUP_(x) ((x) << 16) +#define AT91_SMC_NCS_RDSETUP (0x3f << 24) /* NCS Setup Length in Read Access */ +#define AT91_SMC_NCS_RDSETUP_(x) ((x) << 24) + +#define AT91_SMC_PULSE(n) (AT91_SMC + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ +#define AT91_SMC_NWEPULSE (0x7f << 0) /* NWE Pulse Length */ +#define AT91_SMC_NWEPULSE_(x) ((x) << 0) +#define AT91_SMC_NCS_WRPULSE (0x7f << 8) /* NCS Pulse Length in Write Access */ +#define AT91_SMC_NCS_WRPULSE_(x)((x) << 8) +#define AT91_SMC_NRDPULSE (0x7f << 16) /* NRD Pulse Length */ +#define AT91_SMC_NRDPULSE_(x) ((x) << 16) +#define AT91_SMC_NCS_RDPULSE (0x7f << 24) /* NCS Pulse Length in Read Access */ +#define AT91_SMC_NCS_RDPULSE_(x)((x) << 24) + +#define AT91_SMC_CYCLE(n) (AT91_SMC + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ +#define AT91_SMC_NWECYCLE (0x1ff << 0 ) /* Total Write Cycle Length */ +#define AT91_SMC_NWECYCLE_(x) ((x) << 0) +#define AT91_SMC_NRDCYCLE (0x1ff << 16) /* Total Read Cycle Length */ +#define AT91_SMC_NRDCYCLE_(x) ((x) << 16) + +#define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ +#define AT91_SMC_READMODE (1 << 0) /* Read Mode */ +#define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ +#define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ +#define AT91_SMC_EXNWMODE_DISABLE (0 << 4) +#define AT91_SMC_EXNWMODE_FROZEN (2 << 4) +#define AT91_SMC_EXNWMODE_READY (3 << 4) +#define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ +#define AT91_SMC_BAT_SELECT (0 << 8) +#define AT91_SMC_BAT_WRITE (1 << 8) +#define AT91_SMC_DBW (3 << 12) /* Data Bus Width */ +#define AT91_SMC_DBW_8 (0 << 12) +#define AT91_SMC_DBW_16 (1 << 12) +#define AT91_SMC_DBW_32 (2 << 12) +#define AT91_SMC_TDF (0xf << 16) /* Data Float Time. */ +#define AT91_SMC_TDF_(x) ((x) << 16) +#define AT91_SMC_TDFMODE (1 << 20) /* TDF Optimization - Enabled */ +#define AT91_SMC_PMEN (1 << 24) /* Page Mode Enabled */ +#define AT91_SMC_PS (3 << 28) /* Page Size */ +#define AT91_SMC_PS_4 (0 << 28) +#define AT91_SMC_PS_8 (1 << 28) +#define AT91_SMC_PS_16 (2 << 28) +#define AT91_SMC_PS_32 (3 << 28) + +#if defined(AT91_SMC1) /* The AT91SAM9263 has 2 Static Memory contollers */ +#define AT91_SMC1_SETUP(n) (AT91_SMC1 + 0x00 + ((n)*0x10)) /* Setup Register for CS n */ +#define AT91_SMC1_PULSE(n) (AT91_SMC1 + 0x04 + ((n)*0x10)) /* Pulse Register for CS n */ +#define AT91_SMC1_CYCLE(n) (AT91_SMC1 + 0x08 + ((n)*0x10)) /* Cycle Register for CS n */ +#define AT91_SMC1_MODE(n) (AT91_SMC1 + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ +#endif + +#endif diff --git a/include/asm-arm/arch-at91sam9/clk.h b/include/asm-arm/arch-at91sam9/clk.h index 86da9a6e09..f67b4356d9 100644 --- a/include/asm-arm/arch-at91sam9/clk.h +++ b/include/asm-arm/arch-at91sam9/clk.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2007 - * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * * See file CREDITS for list of people who contributed to this diff --git a/include/asm-arm/arch-at91sam9/gpio.h b/include/asm-arm/arch-at91sam9/gpio.h index 2500eae2a4..c157e107e1 100644 --- a/include/asm-arm/arch-at91sam9/gpio.h +++ b/include/asm-arm/arch-at91sam9/gpio.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/gpio.h + * [origin: Linux kernel include/asm-arm/arch-at91/gpio.h] * * Copyright (C) 2005 HP Labs * diff --git a/include/asm-arm/arch-at91sam9/hardware.h b/include/asm-arm/arch-at91sam9/hardware.h index 80b334f36e..d2fe45388b 100644 --- a/include/asm-arm/arch-at91sam9/hardware.h +++ b/include/asm-arm/arch-at91sam9/hardware.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/hardware.h + * [origin: Linux kernel include/asm-arm/arch-at91/hardware.h] * * Copyright (C) 2003 SAN People * Copyright (C) 2003 ATMEL diff --git a/include/asm-arm/arch-at91sam9/io.h b/include/asm-arm/arch-at91sam9/io.h index be9e9abe56..f09b2df0e3 100644 --- a/include/asm-arm/arch-at91sam9/io.h +++ b/include/asm-arm/arch-at91sam9/io.h @@ -1,5 +1,5 @@ /* - * include/asm-arm/arch-at91/io.h + * [origin: Linux kernel include/asm-arm/arch-at91/io.h] * * Copyright (C) 2003 SAN People * diff --git a/include/asm-arm/arch-at91sam9/memory-map.h b/include/asm-arm/arch-at91sam9/memory-map.h index da98822461..8015dad6a9 100644 --- a/include/asm-arm/arch-at91sam9/memory-map.h +++ b/include/asm-arm/arch-at91sam9/memory-map.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * * See file CREDITS for list of people who contributed to this diff --git a/include/asm-arm/arch-mx31/mx31.h b/include/asm-arm/arch-mx31/mx31.h index f89a401bbc..0552c27ce6 100644 --- a/include/asm-arm/arch-mx31/mx31.h +++ b/include/asm-arm/arch-mx31/mx31.h @@ -24,9 +24,7 @@ #ifndef __ASM_ARCH_MX31_H #define __ASM_ARCH_MX31_H -u32 mx31_get_mpl_dpdgck_clk(void); -u32 mx31_get_mcu_main_clk(void); -u32 mx31_get_ipg_clk(void); -void mx31_gpio_mux(unsigned long mode); +extern u32 mx31_get_ipg_clk(void); +extern void mx31_gpio_mux(unsigned long mode); #endif /* __ASM_ARCH_MX31_H */ diff --git a/include/asm-arm/dma-mapping.h b/include/asm-arm/dma-mapping.h index 8054f62b06..501ce0e680 100644 --- a/include/asm-arm/dma-mapping.h +++ b/include/asm-arm/dma-mapping.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2007 - * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * * See file CREDITS for list of people who contributed to this diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 00b7ec57e4..7cc28bfe3a 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -251,7 +251,7 @@ extern inline void out_be32(volatile unsigned __iomem *addr, int val) static inline void * map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) { - return (void *)paddr; + return (void *)((unsigned long)paddr); } /* diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 4c049a5e93..8bdfb9ddf3 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -772,10 +772,14 @@ #define PVR_405EP_RA 0x51210950 #define PVR_405GPR_RB 0x50910951 #define PVR_405EZ_RA 0x41511460 -#define PVR_405EXR1_RA 0x12911473 /* 405EXr rev A with Security */ -#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A without Security */ -#define PVR_405EX1_RA 0x12911477 /* 405EX rev A with Security */ -#define PVR_405EX2_RA 0x12911475 /* 405EX rev A without Security */ +#define PVR_405EXR1_RA 0x12911473 /* 405EXr rev A/B with Security */ +#define PVR_405EXR2_RA 0x12911471 /* 405EXr rev A/B without Security */ +#define PVR_405EX1_RA 0x12911477 /* 405EX rev A/B with Security */ +#define PVR_405EX2_RA 0x12911475 /* 405EX rev A/B without Security */ +#define PVR_405EXR1_RC 0x1291147B /* 405EXr rev C with Security */ +#define PVR_405EXR2_RC 0x12911479 /* 405EXr rev C without Security */ +#define PVR_405EX1_RC 0x1291147F /* 405EX rev C with Security */ +#define PVR_405EX2_RC 0x1291147D /* 405EX rev C without Security */ #define PVR_440GP_RB 0x40120440 #define PVR_440GP_RC 0x40120481 #define PVR_440EP_RA 0x42221850 diff --git a/include/common.h b/include/common.h index a6c966cde3..d0f57040ee 100644 --- a/include/common.h +++ b/include/common.h @@ -227,7 +227,6 @@ extern ulong load_addr; /* Default Load Address */ /* common/cmd_nvedit.c */ int env_init (void); void env_relocate (void); -uchar env_get_char (int); int envmatch (uchar *, int); char *getenv (char *); int getenv_r (char *name, char *buf, unsigned len); diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 6eec240e9f..f9fa535ff7 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -42,9 +42,12 @@ /* * On-board devices + * + * TSEC1 is VSC switch + * TSEC2 is SoC TSEC */ #define CONFIG_VSC7385_ENET - +#define CONFIG_TSEC2 #ifdef CFG_66MHZ #define CONFIG_83XX_CLKIN 66666667 /* in Hz */ @@ -80,7 +83,7 @@ #ifdef CONFIG_VSC7385_ENET -#define CONFIG_TSEC2 +#define CONFIG_TSEC1 /* The flash address and size of the VSC7385 firmware image */ #define CONFIG_VSC7385_IMAGE 0xFE7FE000 @@ -209,7 +212,7 @@ /* * Local Bus LCRR and LBCR regs */ -#define CFG_LCRR LCRR_EADC_1 | LCRR_CLKDIV_2 /* 0x00010002 */ +#define CFG_LCRR LCRR_EADC_1 | LCRR_CLKDIV_4 #define CFG_LBC_LBCR ( 0x00040000 /* TODO */ \ | (0xFF << LBCR_BMT_SHIFT) \ | 0xF ) /* 0x0004ff0f */ @@ -523,13 +526,8 @@ */ #define CONFIG_ENV_OVERWRITE -#ifdef CONFIG_HAS_ETH0 #define CONFIG_ETHADDR 00:E0:0C:00:95:01 -#endif - -#ifdef CONFIG_HAS_ETH1 #define CONFIG_ETH1ADDR 00:E0:0C:00:95:02 -#endif #define CONFIG_IPADDR 10.0.0.2 #define CONFIG_SERVERIP 10.0.0.1 diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 364ffac5ea..cf552c2487 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -602,6 +602,16 @@ HRCWH_TSEC2M_IN_GMII ) #endif +/* + * System performance + */ +#define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ +#define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ +#define CFG_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */ +#define CFG_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */ +#define CFG_SCCR_TSEC1CM 1 /* TSEC1 clock mode (0-3) */ +#define CFG_SCCR_TSEC2CM 1 /* TSEC2 & I2C0 clock mode (0-3) */ + /* System IO Config */ #define CFG_SICRH SICRH_TSOBI1 #define CFG_SICRL SICRL_LDP_A diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index dab21d0c0a..c891fa80ed 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * * Configuation settings for the AT91CAP9ADK board. diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 96d1b8dff3..41c418f9ab 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -1,6 +1,6 @@ /* * (C) Copyright 2007-2008 - * Stelian Pop <stelian.pop <at> leadtechdesign.com> + * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * * Configuation settings for the AT91SAM9260EK board. diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 57cc90a6de..c7c42a4cdf 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -292,6 +292,7 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_SUBNETMASK /* * Command line configuration. diff --git a/include/configs/makalu.h b/include/configs/makalu.h index 6556666d27..67243d4e40 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007 + * (C) Copyright 2007-2008 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * See file CREDITS for list of people who contributed to this @@ -172,22 +172,28 @@ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\ "addmisc=setenv bootargs ${bootargs} rtc-x1205.probe=0,0x6f\0" \ - "net_nfs=tftp 200000 ${bootfile};" \ + "flash_self_old=run ramargs addip addtty addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "flash_self=run ramargs addip addtty addmisc;" \ + "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ + "flash_nfs_old=run nfsargs addip addtty addmisc;" \ + "bootm ${kernel_addr}\0" \ + "flash_nfs=run nfsargs addip addtty addmisc;" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \ "run nfsargs addip addtty addmisc;" \ - "bootm 200000\0" \ - "net_nfs_fdt=tftp 200000 ${bootfile};" \ - "tftp ${fdt_addr} ${fdt_file};" \ + "bootm ${kernel_addr_r}\0" \ + "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ + "tftp ${fdt_addr_r} ${fdt_file}; " \ "run nfsargs addip addtty addmisc;" \ - "bootm 200000 - ${fdt_addr}\0" \ - "flash_nfs=run nfsargs addip addtty addmisc;" \ - "bootm ${kernel_addr}\0" \ - "flash_self=run ramargs addip addtty addmisc;" \ - "bootm ${kernel_addr} ${ramdisk_addr}\0" \ + "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ "rootpath=/opt/eldk/ppc_4xx\0" \ "bootfile=makalu/uImage\0" \ "fdt_file=makalu/makalu.dtb\0" \ - "fdt_addr=400000\0" \ + "kernel_addr_r=400000\0" \ + "fdt_addr_r=800000\0" \ "kernel_addr=fc000000\0" \ + "fdt_addr=fc1e0000\0" \ "ramdisk_addr=fc200000\0" \ "initrd_high=30000000\0" \ "load=tftp 200000 makalu/u-boot.bin\0" \ @@ -212,6 +218,7 @@ #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_SUBNETMASK /* * Command line configuration. diff --git a/include/configs/ml401.h b/include/configs/ml401.h index 360e2e11d2..7e0df87019 100644 --- a/include/configs/ml401.h +++ b/include/configs/ml401.h @@ -56,9 +56,11 @@ /* ethernet */ #ifdef XILINX_EMAC_BASEADDR #define CONFIG_XILINX_EMAC 1 +#define CFG_ENET #else #ifdef XILINX_EMACLITE_BASEADDR #define CONFIG_XILINX_EMACLITE 1 +#define CFG_ENET #endif #endif #undef ET_DEBUG @@ -70,18 +72,28 @@ #endif /* interrupt controller */ +#ifdef XILINX_INTC_BASEADDR #define CFG_INTC_0 1 #define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR #define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +#endif /* timer */ +#ifdef XILINX_TIMER_BASEADDR +#if (XILINX_TIMER_IRQ != -1) #define CFG_TIMER_0 1 #define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#endif +#else +#ifdef XILINX_CLOCK_FREQ #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ - +#else +#error BAD CLOCK FREQ +#endif +#endif /* FSL */ /* #define CFG_FSL_2 */ /* #define FSL_INTR_2 1 */ @@ -195,7 +207,12 @@ #define CONFIG_CMD_CACHE #define CONFIG_CMD_IRQ #define CONFIG_CMD_MFSL -#define CONFIG_CMD_PING + +#ifndef CFG_ENET + #undef CONFIG_CMD_NET +#else + #define CONFIG_CMD_PING +#endif #if defined(CONFIG_SYSTEMACE) #define CONFIG_CMD_EXT2 diff --git a/include/configs/mx31ads.h b/include/configs/mx31ads.h index 7614b95019..2ea48a6da9 100644 --- a/include/configs/mx31ads.h +++ b/include/configs/mx31ads.h @@ -28,7 +28,7 @@ #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ #define CONFIG_MX31 1 /* in a mx31 */ #define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */ -#define CONFIG_MX31_CLK32 32000 +#define CONFIG_MX31_CLK32 32768 #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO @@ -139,7 +139,7 @@ #define CFG_LOAD_ADDR CONFIG_LOADADDR -#define CFG_HZ 32000 +#define CFG_HZ CONFIG_MX31_CLK32 /* use 32kHz clock as source */ #define CONFIG_CMDLINE_EDITING 1 diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h index 30fb303c96..c738567a5f 100644 --- a/include/configs/xupv2p.h +++ b/include/configs/xupv2p.h @@ -63,9 +63,11 @@ /* ethernet */ #ifdef XILINX_EMAC_BASEADDR #define CONFIG_XILINX_EMAC 1 +#define CFG_ENET #else #ifdef XILINX_EMACLITE_BASEADDR #define CONFIG_XILINX_EMACLITE 1 +#define CFG_ENET #endif #endif #undef ET_DEBUG @@ -77,18 +79,28 @@ #endif /* interrupt controller */ +#ifdef XILINX_INTC_BASEADDR #define CFG_INTC_0 1 #define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR #define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +#endif /* timer */ +#ifdef XILINX_TIMER_BASEADDR +#if (XILINX_TIMER_IRQ != -1) #define CFG_TIMER_0 1 #define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR #define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ #define FREQUENCE XILINX_CLOCK_FREQ #define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 ) +#endif +#else +#ifdef XILINX_CLOCK_FREQ #define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ - +#else +#error BAD CLOCK FREQ +#endif +#endif /* * memory layout - Example * TEXT_BASE = 0x3600_0000; @@ -162,7 +174,12 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_CACHE #define CONFIG_CMD_IRQ -#define CONFIG_CMD_PING + +#ifndef CFG_ENET + #undef CONFIG_CMD_NET +#else + #define CONFIG_CMD_PING +#endif #ifdef XILINX_SYSACE_BASEADDR #define CONFIG_CMD_EXT2 diff --git a/include/environment.h b/include/environment.h index c4f7c33be6..bf9f669127 100644 --- a/include/environment.h +++ b/include/environment.h @@ -107,4 +107,14 @@ typedef struct environment_s { unsigned char data[ENV_SIZE]; /* Environment data */ } env_t; +/* Pointer to function that returns a character from the environment */ +extern unsigned char (*env_get_char)(int); + +/* Function that returns a pointer to a value from the environment */ +unsigned char *env_get_addr(int); +unsigned char env_get_char_memory (int index); + +/* Function that updates CRC of the enironment */ +void env_crc_update (void); + #endif /* _ENVIRONMENT_H_ */ diff --git a/include/pci.h b/include/pci.h index 8e5dacc0df..1c8e21688f 100644 --- a/include/pci.h +++ b/include/pci.h @@ -314,7 +314,7 @@ struct pci_region { unsigned long bus_start; /* Start on the bus */ - unsigned long phys_start; /* Start in physical address space */ + phys_addr_t phys_start; /* Start in physical address space */ unsigned long size; /* Size */ unsigned long flags; /* Resource flags */ @@ -331,7 +331,7 @@ struct pci_region { extern __inline__ void pci_set_region(struct pci_region *reg, unsigned long bus_start, - unsigned long phys_start, + phys_addr_t phys_start, unsigned long size, unsigned long flags) { reg->bus_start = bus_start; @@ -432,10 +432,10 @@ extern __inline__ void pci_set_ops(struct pci_controller *hose, extern void pci_setup_indirect(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data); -extern unsigned long pci_hose_bus_to_phys(struct pci_controller* hose, - unsigned long addr, unsigned long flags); +extern phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, + unsigned long addr, unsigned long flags); extern unsigned long pci_hose_phys_to_bus(struct pci_controller* hose, - unsigned long addr, unsigned long flags); + phys_addr_t addr, unsigned long flags); #define pci_phys_to_bus(dev, addr, flags) \ pci_hose_phys_to_bus(pci_bus_to_hose(PCI_BUS(dev)), (addr), (flags)) diff --git a/include/version.h b/include/version.h index b56d2e9900..a34291adc5 100644 --- a/include/version.h +++ b/include/version.h @@ -24,6 +24,8 @@ #ifndef __VERSION_H__ #define __VERSION_H__ +#ifndef DO_DEPS_ONLY #include "version_autogenerated.h" +#endif #endif /* __VERSION_H__ */ |
