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-rw-r--r--include/configs/afeb9260.h1
-rw-r--r--include/configs/am335x_igep0033.h (renamed from include/configs/igep0033.h)0
-rw-r--r--include/configs/at91rm9200ek.h1
-rw-r--r--include/configs/at91sam9260ek.h1
-rw-r--r--include/configs/at91sam9261ek.h1
-rw-r--r--include/configs/at91sam9263ek.h1
-rw-r--r--include/configs/at91sam9n12ek.h13
-rw-r--r--include/configs/at91sam9x5ek.h3
-rw-r--r--include/configs/cm_t35.h3
-rw-r--r--include/configs/cpu9260.h1
-rw-r--r--include/configs/cpuat91.h1
-rw-r--r--include/configs/dra7xx_evm.h9
-rw-r--r--include/configs/eb_cpux9k2.h4
-rw-r--r--include/configs/ethernut5.h1
-rw-r--r--include/configs/ipam390.h35
-rw-r--r--include/configs/meesc.h1
-rw-r--r--include/configs/omap3_igep00x0.h (renamed from include/configs/igep00x0.h)0
-rw-r--r--include/configs/omap4_common.h188
-rw-r--r--include/configs/omap4_panda.h2
-rw-r--r--include/configs/omap4_sdp4430.h2
-rw-r--r--include/configs/omap5_common.h7
-rw-r--r--include/configs/otc570.h1
-rw-r--r--include/configs/pdnb3.h322
-rw-r--r--include/configs/pm9261.h1
-rw-r--r--include/configs/pm9263.h1
-rw-r--r--include/configs/pm9g45.h1
-rw-r--r--include/configs/sama5d3xek.h1
-rw-r--r--include/configs/sbc35_a9g20.h1
-rw-r--r--include/configs/snapper9260.h1
-rw-r--r--include/configs/stamp9g20.h1
-rw-r--r--include/configs/ti_am335x_common.h14
-rw-r--r--include/configs/ti_armv7_common.h2
-rw-r--r--include/configs/top9000.h1
-rw-r--r--include/configs/tricorder.h155
-rw-r--r--include/configs/vl_ma2sc.h1
35 files changed, 231 insertions, 547 deletions
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index be2f207055..d99d6719ae 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -112,6 +112,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/igep0033.h b/include/configs/am335x_igep0033.h
index 3e18a657fa..3e18a657fa 100644
--- a/include/configs/igep0033.h
+++ b/include/configs/am335x_igep0033.h
diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h
index e158b0dd2d..27e32e24e3 100644
--- a/include/configs/at91rm9200ek.h
+++ b/include/configs/at91rm9200ek.h
@@ -154,6 +154,7 @@
* USB Config
*/
#define CONFIG_USB_ATMEL 1
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_KEYBOARD 1
#define CONFIG_USB_STORAGE 1
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index d7fd6b089c..248d6ee73c 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -185,6 +185,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index af56604396..819ae72bcd 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -146,6 +146,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 40e167c10a..e3faec729d 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -279,6 +279,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index 28a79258df..4cdaed178b 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -83,6 +83,7 @@
#define CONFIG_CMD_SF
#define CONFIG_CMD_MMC
#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x20000000
@@ -163,6 +164,18 @@
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END 0x26e00000
+/* USB host */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_CPU_INIT
+#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
+#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9n12"
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
+#define CONFIG_USB_STORAGE
+#endif
+
#ifdef CONFIG_SYS_USE_SPIFLASH
/* bootstrap + u-boot + env + linux in dataflash on CS0 */
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index 4a2ac9aabd..cb57be0b5d 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -159,13 +159,14 @@
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
#else
+#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
#endif
-#define CONFIG_USB_ATMEL
#define CONFIG_USB_STORAGE
#endif
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index bc5b66c6dc..eff35b9b0d 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -23,6 +23,7 @@
#define CONFIG_OMAP /* in a TI OMAP core */
#define CONFIG_OMAP34XX /* which is a 34XX */
#define CONFIG_OMAP_GPIO
+#define CONFIG_CMD_GPIO
#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
#define CONFIG_OMAP_COMMON
@@ -169,7 +170,7 @@
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
/* devices */
/* Environment information */
-#define CONFIG_BOOTDELAY 10
+#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/cpu9260.h b/include/configs/cpu9260.h
index 5b79ace5fa..796dfc39a5 100644
--- a/include/configs/cpu9260.h
+++ b/include/configs/cpu9260.h
@@ -346,6 +346,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/cpuat91.h b/include/configs/cpuat91.h
index 6742dbcd92..67732de3a8 100644
--- a/include/configs/cpuat91.h
+++ b/include/configs/cpuat91.h
@@ -160,6 +160,7 @@
#if defined(CONFIG_CMD_USB)
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h
index 3a4c06bc8f..7186ce709c 100644
--- a/include/configs/dra7xx_evm.h
+++ b/include/configs/dra7xx_evm.h
@@ -22,9 +22,14 @@
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_CMD_SAVEENV
+#if (CONFIG_CONS_INDEX == 1)
#define CONSOLEDEV "ttyO0"
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_SYS_NS16550_COM1 UART1_BASE
+#elif (CONFIG_CONS_INDEX == 3)
+#define CONSOLEDEV "ttyO2"
+#endif
+#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
+#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
+#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_OMAP_ABE_SYSCK
diff --git a/include/configs/eb_cpux9k2.h b/include/configs/eb_cpux9k2.h
index b8e672f82b..5c2c73ad4b 100644
--- a/include/configs/eb_cpux9k2.h
+++ b/include/configs/eb_cpux9k2.h
@@ -36,7 +36,7 @@
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
#define CONFIG_SKIP_LOWLEVEL_INIT
-#define CONFIG_SYS_TEXT_BASE 0x21f00000
+#define CONFIG_SYS_TEXT_BASE 0x21800000
#endif
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* default load address */
#define CONFIG_STANDALONE_LOAD_ADDR 0x21000000
@@ -133,6 +133,7 @@
#define CONFIG_CMD_UBI
#define CONFIG_CMD_MTDPARTS
#define CONFIG_CMD_UBIFS
+
#define CONFIG_SYS_LONGHELP
/*
@@ -162,6 +163,7 @@
* Hardware drivers
*/
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_AT91C_PQFP_UHPBUG
#define CONFIG_USB_STORAGE
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index adf14be365..7fd0b51860 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -178,6 +178,7 @@
/* USB */
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h
index 82d4298007..155663eb2d 100644
--- a/include/configs/ipam390.h
+++ b/include/configs/ipam390.h
@@ -122,13 +122,13 @@
(3 << DV_DDR_SDCR_IBANK_SHIFT) | \
(2 << DV_DDR_SDCR_PAGESIZE_SHIFT))
-#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(2) | \
+#define CONFIG_SYS_DA850_CS3CFG (DAVINCI_ABCR_WSETUP(1) | \
DAVINCI_ABCR_WSTROBE(2) | \
- DAVINCI_ABCR_WHOLD(1) | \
+ DAVINCI_ABCR_WHOLD(0) | \
DAVINCI_ABCR_RSETUP(1) | \
- DAVINCI_ABCR_RSTROBE(4) | \
- DAVINCI_ABCR_RHOLD(0) | \
- DAVINCI_ABCR_TA(1) | \
+ DAVINCI_ABCR_RSTROBE(2) | \
+ DAVINCI_ABCR_RHOLD(1) | \
+ DAVINCI_ABCR_TA(0) | \
DAVINCI_ABCR_ASIZE_8BIT)
@@ -161,6 +161,7 @@
#undef CONFIG_SYS_NAND_HW_ECC
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
+#define CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
@@ -173,11 +174,10 @@
CONFIG_SYS_MALLOC_LEN - \
GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_NAND_ECCPOS { \
- 24, 25, 26, 27, 28, \
- 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
- 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
- 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
- 59, 60, 61, 62, 63 }
+ 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
+ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
+ 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
+ 54, 55, 56, 57, 58, 59, 60, 61, 62, 63}
#define CONFIG_SYS_NAND_PAGE_COUNT 64
#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
#define CONFIG_SYS_NAND_ECCSIZE 512
@@ -230,15 +230,24 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_REVISION_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_BOOTARGS \
- "mem=128M console=ttyS0,115200n8 root=/dev/mtdblock0p4 rw noinitrd ip=dhcp"
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 2
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "defbootargs=setenv bootargs mem=128M console=ttyS0,115200n8 " \
+ "root=/dev/mtdblock5 rw noinitrd " \
+ "rootfstype=jffs2 noinitrd\0" \
"hwconfig=dsp:wake=yes\0" \
+ "bootcmd=nboot kernel;run defbootargs addmtd;bootm 0xc0700000\0" \
+ "bootfile=uImage\0" \
"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "mtddevname=uboot-env\0" \
+ "mtddevnum=0\0" \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "u-boot=/tftpboot/ipam390/u-boot.ais\0" \
+ "upd_uboot=tftp c0000000 ${u-boot};nand erase.part u-boot;" \
+ "nand write c0000000 20000 ${filesize}\0" \
"setbootparms=nand read c0100000 200000 400000;" \
+ "run defbootargs addmtd;" \
"spl export atags c0100000;" \
"nand erase.part bootparms;" \
"nand write c0000100 180000 20000\0" \
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index d2ec83cd1f..46a8e012c8 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -157,6 +157,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/igep00x0.h b/include/configs/omap3_igep00x0.h
index e92bb68484..e92bb68484 100644
--- a/include/configs/igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index e9f2383f7c..ea56eeb4ee 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -15,82 +15,61 @@
/*
* High Level Configuration Options
*/
-#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP44XX 1 /* which is a 44XX */
#define CONFIG_OMAP4430 1 /* which is in a 4430 */
-#define CONFIG_OMAP_GPIO
-#define CONFIG_OMAP_COMMON
+#define CONFIG_MISC_INIT_R
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO 1
+#define CONFIG_DISPLAY_BOARDINFO 1
+
+#define CONFIG_SYS_THUMB_BUILD
+
+#ifndef CONFIG_SYS_L2CACHE_OFF
+#define CONFIG_SYS_L2_PL310 1
+#define CONFIG_SYS_PL310_BASE 0x48242000
+#endif
+#define CONFIG_SYS_CACHELINE_SIZE 32
/* Get CPU defs */
#include <asm/arch/cpu.h>
#include <asm/arch/omap.h>
-/* Display CPU and Board Info */
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO 1
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_OF_LIBFDT 1
-#define CONFIG_CMD_BOOTZ
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_REVISION_TAG 1
+/* Use General purpose timer 1 */
+#define CONFIG_SYS_TIMERBASE GPT2_BASE
/*
- * Size of malloc() pool
* Total Size Environment - 128k
- * Malloc - add 256k
*/
#define CONFIG_ENV_SIZE (128 << 10)
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
-/* Vector Base */
-#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
/*
- * Hardware drivers
+ * For the DDR timing information we can either dynamically determine
+ * the timings to use or use pre-determined timings (based on using the
+ * dynamic method. Default to the static timing infomation.
*/
+#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
+#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
+#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
+#endif
+
+#include <configs/ti_armv7_common.h>
/*
- * serial port - NS16550 compatible
+ * Hardware drivers
*/
-#define V_NS16550_CLK 48000000
-
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
+#define CONFIG_SYS_NS16550_CLK 48000000
#define CONFIG_CONS_INDEX 3
#define CONFIG_SYS_NS16550_COM3 UART3_BASE
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
- 115200}
-
-/* CPU */
-#define CONFIG_ARCH_CPU_INIT
-
-/* I2C */
-#define CONFIG_HARD_I2C 1
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_DRIVER_OMAP34XX_I2C 1
-#define CONFIG_I2C_MULTI_BUS 1
-
/* TWL6030 */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_TWL6030_POWER 1
#endif
-/* MMC */
-#define CONFIG_GENERIC_MMC 1
-#define CONFIG_MMC 1
-#define CONFIG_OMAP_HSMMC 1
-#define CONFIG_DOS_PARTITION 1
-
-
/* USB */
#define CONFIG_MUSB_UDC 1
#define CONFIG_USB_OMAP3 1
@@ -100,36 +79,13 @@
#define CONFIG_USB_TTY 1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-/* Flash */
-#define CONFIG_SYS_NO_FLASH 1
-
-/* commands to include */
-#include <config_cmd_default.h>
-
-/* Enabled commands */
-#define CONFIG_CMD_EXT2 /* EXT2 Support */
-#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_I2C /* I2C serial bus support */
-#define CONFIG_CMD_MMC /* MMC support */
-
-/* Disabled commands */
+/* Per-Soc commands */
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
-#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
-#undef CONFIG_CMD_IMLS /* List all found images */
/*
* Environment setup
*/
-
-#define CONFIG_BOOTDELAY 3
-#define CONFIG_ENV_VARS_UBOOT_CONFIG
-#define CONFIG_CMD_FS_GENERIC
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_EXT4
-
-#define CONFIG_ENV_OVERWRITE
-
#define CONFIG_EXTRA_ENV_SETTINGS \
"loadaddr=0x82000000\0" \
"console=ttyO2,115200n8\0" \
@@ -192,100 +148,10 @@
"fi; " \
"fi"
-#define CONFIG_AUTO_COMPLETE 1
-
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_CBSIZE 512
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-/*
- * memtest setup
- */
-#define CONFIG_SYS_MEMTEST_START 0x80000000
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
-
-/* Default load address */
-#define CONFIG_SYS_LOAD_ADDR 0x80000000
-
-/* Use General purpose timer 1 */
-#define CONFIG_SYS_TIMERBASE GPT2_BASE
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
-
-/*
- * SDRAM Memory Map
- * Even though we use two CS all the memory
- * is mapped to one contiguous block
- */
-#define CONFIG_NR_DRAM_BANKS 1
-
-#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
- GENERATED_GBL_DATA_SIZE)
-
-#ifndef CONFIG_SYS_L2CACHE_OFF
-#define CONFIG_SYS_L2_PL310 1
-#define CONFIG_SYS_PL310_BASE 0x48242000
-#endif
-#define CONFIG_SYS_CACHELINE_SIZE 32
-
-/* Defines for SDRAM init */
-#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-
-#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
-#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
-#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
-#endif
-
/* Defines for SPL */
-#define CONFIG_SPL
-#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x40304350
#define CONFIG_SPL_MAX_SIZE (38 * 1024)
-#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
#define CONFIG_SPL_DISPLAY_PRINT
-
-/*
- * 64 bytes before this address should be set aside for u-boot.img's
- * header. That is 80E7FFC0--0x80E80000 should not be used for any
- * other needs.
- */
-#define CONFIG_SYS_TEXT_BASE 0x80E80000
-
-/*
- * BSS and malloc area 64MB into memory to allow enough
- * space for the kernel at the beginning of memory
- */
-#define CONFIG_SPL_BSS_START_ADDR 0x84000000
-#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
-#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
-#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
-
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
-#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
-#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
-#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
-
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_LIBDISK_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
-#define CONFIG_SPL_FAT_SUPPORT
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
-#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
-#define CONFIG_SYS_THUMB_BUILD
-
#endif /* __CONFIG_OMAP4_COMMON_H */
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h
index 82946229a4..6820e424d6 100644
--- a/include/configs/omap4_panda.h
+++ b/include/configs/omap4_panda.h
@@ -48,8 +48,6 @@
/* ENV related config options */
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_PROMPT "Panda # "
-
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#endif /* __CONFIG_PANDA_H */
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h
index acced46062..b35251120d 100644
--- a/include/configs/omap4_sdp4430.h
+++ b/include/configs/omap4_sdp4430.h
@@ -32,6 +32,4 @@
#define CONFIG_ENV_OFFSET 0xE0000
#define CONFIG_CMD_SAVEENV
-#define CONFIG_SYS_PROMPT "OMAP4430 SDP # "
-
#endif /* __CONFIG_SDP4430_H */
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index 827eaabca8..c7fa37e823 100644
--- a/include/configs/omap5_common.h
+++ b/include/configs/omap5_common.h
@@ -70,10 +70,11 @@
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=0x82000000\0" \
- "console=" CONSOLEDEV ",115200n8\0" \
+ "loadaddr=0x80200000\0" \
+ "fdtaddr=0x80F80000\0" \
"fdt_high=0xffffffff\0" \
- "fdtaddr=0x80f80000\0" \
+ "rdaddr=0x81000000\0" \
+ "console=" CONSOLEDEV ",115200n8\0" \
"fdtfile=undefined\0" \
"bootpart=0:2\0" \
"bootdir=/boot\0" \
diff --git a/include/configs/otc570.h b/include/configs/otc570.h
index 543209cb9d..d5eba587e4 100644
--- a/include/configs/otc570.h
+++ b/include/configs/otc570.h
@@ -207,6 +207,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
deleted file mode 100644
index d3e9017a00..0000000000
--- a/include/configs/pdnb3.h
+++ /dev/null
@@ -1,322 +0,0 @@
-/*
- * (C) Copyright 2006-2007
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * Configuation settings for the PDNB3 board.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_IXP425 1 /* This is an IXP425 CPU */
-#define CONFIG_PDNB3 1 /* on an PDNB3 board */
-
-#define CONFIG_MACH_TYPE 1002
-
-#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info (and speed) */
-#define CONFIG_DISPLAY_BOARDINFO 1 /* display board info */
-
-/*
- * Ethernet
- */
-#define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */
-#define CONFIG_PHY_ADDR 16 /* NPE0 PHY address */
-#define CONFIG_HAS_ETH1
-#define CONFIG_PHY1_ADDR 18 /* NPE1 PHY address */
-#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_SYS_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
-
-/*
- * Misc configuration options
- */
-#define CONFIG_BOOTCOUNT_LIMIT /* support for bootcount limit */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x60003000 /* inside qmrg sram */
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (1 << 20)
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_IXP_SERIAL
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_NET
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_PING
-
-#if !defined(CONFIG_SCPU)
-#define CONFIG_CMD_NAND
-#endif
-
-
-#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00800000 /* 4 ... 8 MB in DRAM */
-#define CONFIG_SYS_LOAD_ADDR 0x00010000 /* default load address */
-
-#define CONFIG_IXP425_TIMER_CLK 66666666
-#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
-
-/***************************************************************
- * Platform/Board specific defines start here.
- ***************************************************************/
-
-/*-----------------------------------------------------------------------
- * Default configuration (environment varibles...)
- *----------------------------------------------------------------------*/
-#define CONFIG_PREBOOT "echo;" \
- "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
- "echo"
-
-#undef CONFIG_BOOTARGS
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "hostname=pdnb3\0" \
- "nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
- "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
- ":${hostname}:${netdev}:off panic=1\0" \
- "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate} " \
- "mtdparts=${mtdparts}\0" \
- "flash_nfs=run nfsargs addip addtty;" \
- "bootm ${kernel_addr}\0" \
- "flash_self=run ramargs addip addtty;" \
- "bootm ${kernel_addr} ${ramdisk_addr}\0" \
- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
- "bootm\0" \
- "rootpath=/opt/buildroot\0" \
- "bootfile=/tftpboot/netbox/uImage\0" \
- "kernel_addr=50080000\0" \
- "ramdisk_addr=50200000\0" \
- "load=tftp 100000 /tftpboot/netbox/u-boot.bin\0" \
- "update=protect off 50000000 5007dfff;era 50000000 5007dfff;" \
- "cp.b 100000 50000000 ${filesize};" \
- "setenv filesize;saveenv\0" \
- "upd=run load update\0" \
- "ipaddr=10.0.0.233\0" \
- "serverip=10.0.0.152\0" \
- "netmask=255.255.0.0\0" \
- "ethaddr=c6:6f:13:36:f3:81\0" \
- "eth1addr=c6:6f:13:36:f3:82\0" \
- "mtdparts=IXP4XX-Flash.0:504k@0(uboot),4k@504k(env)," \
- "4k@508k(renv)\0" \
- ""
-#define CONFIG_BOOTCOMMAND "run net_nfs"
-
-/*
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
-#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
-
-#define CONFIG_SYS_TEXT_BASE 0x50000000
-#define CONFIG_SYS_FLASH_BASE 0x50000000
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
-#if defined(CONFIG_SCPU)
-#define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 512 kB for Monitor */
-#else
-#define CONFIG_SYS_MONITOR_LEN (504 << 10) /* Reserve 512 kB for Monitor */
-#endif
-
-/*
- * Expansion bus settings
- */
-#if defined(CONFIG_SCPU)
-#define CONFIG_SYS_EXP_CS0 0x94d23C42 /* 8bit, max size */
-#else
-#define CONFIG_SYS_EXP_CS0 0x94913C43 /* 8bit, max size */
-#endif
-#define CONFIG_SYS_EXP_CS1 0x85000043 /* 8bit, 512bytes */
-
-/*
- * SDRAM settings
- */
-#define CONFIG_SYS_SDR_CONFIG 0x18
-#define CONFIG_SYS_SDR_MODE_CONFIG 0x1
-#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
-
-/*
- * FLASH and environment organization
- */
-#if defined(CONFIG_SCPU)
-#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
-#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
-#endif
-
-#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
-
-#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 1000 /* Timeout for Flash Write (in ms) */
-
-#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char /* flash word size (width) */
-#define CONFIG_SYS_FLASH_ADDR0 0x5555 /* 1st address for flash config cycles */
-#define CONFIG_SYS_FLASH_ADDR1 0x2AAA /* 2nd address for flash config cycles */
-/*
- * The following defines are added for buggy IOP480 byte interface.
- * All other boards should use the standard values (CPCI405 etc.)
- */
-#define CONFIG_SYS_FLASH_READ0 0x0000 /* 0 is standard */
-#define CONFIG_SYS_FLASH_READ1 0x0001 /* 1 is standard */
-#define CONFIG_SYS_FLASH_READ2 0x0002 /* 2 is standard */
-
-#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-
-#define CONFIG_ENV_IS_IN_FLASH 1
-
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
-#if defined(CONFIG_SCPU)
-/* no redundant environment on SCPU */
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
-#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
-#else
-#define CONFIG_ENV_SECT_SIZE 0x1000 /* size of one complete sector */
-#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
-
-/* Address and size of Redundant Environment Sector */
-#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
-#endif
-
-#if !defined(CONFIG_SCPU)
-/*
- * NAND-FLASH stuff
- */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x51000000 /* NAND FLASH Base Address */
-#endif
-
-/*
- * GPIO settings
- */
-
-/* FPGA program pin configuration */
-#define CONFIG_SYS_GPIO_PRG 12 /* FPGA program pin (cpu output)*/
-#define CONFIG_SYS_GPIO_CLK 10 /* FPGA clk pin (cpu output) */
-#define CONFIG_SYS_GPIO_DATA 14 /* FPGA data pin (cpu output) */
-#define CONFIG_SYS_GPIO_INIT 13 /* FPGA init pin (cpu input) */
-#define CONFIG_SYS_GPIO_DONE 11 /* FPGA done pin (cpu input) */
-
-/* other GPIO's */
-#define CONFIG_SYS_GPIO_RESTORE_INT 0
-#define CONFIG_SYS_GPIO_RESTART_INT 1
-#define CONFIG_SYS_GPIO_SYS_RUNNING 2
-#define CONFIG_SYS_GPIO_PCI_INTA 3
-#define CONFIG_SYS_GPIO_PCI_INTB 4
-#define CONFIG_SYS_GPIO_I2C_SCL 6
-#define CONFIG_SYS_GPIO_I2C_SDA 7
-#define CONFIG_SYS_GPIO_FPGA_RESET 9
-#define CONFIG_SYS_GPIO_CLK_33M 15
-
-/*
- * I2C stuff
- */
-
-/* enable I2C and select the hardware/software driver */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
-#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
-#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
-/*
- * Software (bit-bang) I2C driver configuration
- */
-#define PB_SCL (1 << CONFIG_SYS_GPIO_I2C_SCL)
-#define PB_SDA (1 << CONFIG_SYS_GPIO_I2C_SDA)
-
-#define I2C_INIT GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_I2C_SCL)
-#define I2C_ACTIVE GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_I2C_SDA)
-#define I2C_TRISTATE GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_I2C_SDA)
-#define I2C_READ ((*IXP425_GPIO_GPINR & PB_SDA) != 0)
-#define I2C_SDA(bit) if (bit) GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_I2C_SDA); \
- else GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_I2C_SDA)
-#define I2C_SCL(bit) if (bit) GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_I2C_SCL); \
- else GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_I2C_SCL)
-#define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */
-
-/*
- * I2C RTC
- */
-#if 0 /* test-only */
-#define CONFIG_RTC_DS1340 1
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#else
-/* M41T11 Serial Access Timekeeper(R) SRAM */
-#define CONFIG_RTC_M41T11 1
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* play along with the linux driver */
-#endif
-
-/*
- * Spartan3 FPGA configuration support
- */
-#define CONFIG_SYS_FPGA_MAX_SIZE 700*1024 /* 700kByte for XC3S500E */
-
-#define CONFIG_SYS_FPGA_PRG (1 << CONFIG_SYS_GPIO_PRG) /* FPGA program pin (cpu output)*/
-#define CONFIG_SYS_FPGA_CLK (1 << CONFIG_SYS_GPIO_CLK) /* FPGA clk pin (cpu output) */
-#define CONFIG_SYS_FPGA_DATA (1 << CONFIG_SYS_GPIO_DATA) /* FPGA data pin (cpu output) */
-#define CONFIG_SYS_FPGA_INIT (1 << CONFIG_SYS_GPIO_INIT) /* FPGA init pin (cpu input) */
-#define CONFIG_SYS_FPGA_DONE (1 << CONFIG_SYS_GPIO_DONE) /* FPGA done pin (cpu input) */
-
-/*
- * Cache Configuration
- */
-#define CONFIG_SYS_CACHELINE_SIZE 32
-
-/* additions for new relocation code, must be added to all boards */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_INIT_SP_ADDR \
- (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index 67b40b2fcc..792f4cd418 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -245,6 +245,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 2b4335e78e..ff379a54b0 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -272,6 +272,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 7d16bd8b25..f15ae6dd7f 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -120,6 +120,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
index 79c00684dd..924d7fabac 100644
--- a/include/configs/sama5d3xek.h
+++ b/include/configs/sama5d3xek.h
@@ -153,6 +153,7 @@
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
diff --git a/include/configs/sbc35_a9g20.h b/include/configs/sbc35_a9g20.h
index 4ba224252a..3cf693bdc9 100644
--- a/include/configs/sbc35_a9g20.h
+++ b/include/configs/sbc35_a9g20.h
@@ -119,6 +119,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 17eb5f2455..c5de89e1f8 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -65,6 +65,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/stamp9g20.h b/include/configs/stamp9g20.h
index a9973315c2..95fc26ba9b 100644
--- a/include/configs/stamp9g20.h
+++ b/include/configs/stamp9g20.h
@@ -165,6 +165,7 @@
/* USB configuration */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION
diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h
index d2e34aeed4..10fe47f4d6 100644
--- a/include/configs/ti_am335x_common.h
+++ b/include/configs/ti_am335x_common.h
@@ -41,6 +41,17 @@
#define CONFIG_MII /* Required in net/eth.c */
/*
+ * RTC related defines. To use bootcount you must set bootlimit in the
+ * environment to a non-zero value.
+ */
+#define CONFIG_BOOTCOUNT_LIMIT
+#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
+
+/* Enable the HW watchdog, since we can use this with bootcount */
+#define CONFIG_HW_WATCHDOG
+#define CONFIG_OMAP_WATCHDOG
+
+/*
* SPL related defines. The Public RAM memory map the ROM defines the
* area between 0x402F0400 and 0x4030B800 as a download area and
* 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
@@ -50,6 +61,9 @@
#define CONFIG_SPL_TEXT_BASE 0x402F0400
#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
+/* Enable the watchdog inside of SPL */
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+
/*
* Since SPL did pll and ddr initialization for us,
* we don't need to do it twice.
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index e89e8744df..13ed875135 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -202,7 +202,7 @@
#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
#ifdef CONFIG_SPL_OS_BOOT
-#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100)
+#define CONFIG_SYS_SPL_ARGS_ADDR 0x80F80000
/* FAT */
#define CONFIG_SPL_FAT_LOAD_KERNEL_NAME "uImage"
diff --git a/include/configs/top9000.h b/include/configs/top9000.h
index a6d692872c..159a8bca10 100644
--- a/include/configs/top9000.h
+++ b/include/configs/top9000.h
@@ -174,6 +174,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index b102739a0e..ac9a1dd2b7 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -39,6 +39,9 @@
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
+#define CONFIG_SILENT_CONSOLE
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
/* Clock Defines */
#define V_OSCK 26000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK >> 1)
@@ -53,12 +56,27 @@
#define CONFIG_OF_LIBFDT
/* Size of malloc() pool */
-#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
- /* Sector */
#define CONFIG_SYS_MALLOC_LEN (1024*1024)
/* Hardware drivers */
+/* GPIO support */
+#define CONFIG_OMAP_GPIO
+
+/* LED support */
+#define CONFIG_STATUS_LED
+#define CONFIG_BOARD_SPECIFIC_LED
+#define CONFIG_CMD_LED /* LED command */
+#define STATUS_LED_BIT (1 << 0)
+#define STATUS_LED_STATE STATUS_LED_ON
+#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_BIT1 (1 << 1)
+#define STATUS_LED_STATE1 STATUS_LED_ON
+#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
+#define STATUS_LED_BIT2 (1 << 2)
+#define STATUS_LED_STATE2 STATUS_LED_ON
+#define STATUS_LED_PERIOD2 (CONFIG_SYS_HZ / 2)
+
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550
#define CONFIG_SYS_NS16550_SERIAL
@@ -84,6 +102,13 @@
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
+#define CONFIG_I2C_MULTI_BUS
+
+/* EEPROM */
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_EEPROM_BUS_NUM 1
/* TWL4030 */
#define CONFIG_TWL4030_POWER
@@ -92,13 +117,16 @@
/* Board NAND Info */
#define CONFIG_SYS_NO_FLASH /* no NOR flash */
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
-#define MTDIDS_DEFAULT "nand0=nand"
-#define MTDPARTS_DEFAULT "mtdparts=nand:" \
- "512k(u-boot-spl)," \
- "1920k(u-boot)," \
- "128k(u-boot-env)," \
- "4m(kernel)," \
- "-(fs)"
+#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
+ "128k(SPL)," \
+ "1m(u-boot)," \
+ "384k(u-boot-env1)," \
+ "1152k(mtdoops)," \
+ "384k(u-boot-env2)," \
+ "5m(kernel)," \
+ "2m(fdt)," \
+ "-(ubi)"
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
@@ -138,53 +166,104 @@
#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
#define CONFIG_MTD_PARTITIONS
-/* Environment information */
-#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
+/* Environment information (this is the common part) */
-#define CONFIG_BOOTDELAY 3
+#define CONFIG_BOOTDELAY 0
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "loadaddr=0x82000000\0" \
+/* hang() the board on panic() */
+#define CONFIG_PANIC_HANG
+
+/* environment placement (for NAND), is different for FLASHCARD but does not
+ * harm there */
+#define CONFIG_ENV_OFFSET 0x120000 /* env start */
+#define CONFIG_ENV_OFFSET_REDUND 0x2A0000 /* redundant env start */
+#define CONFIG_ENV_SIZE (16 << 10) /* use 16KiB for env */
+#define CONFIG_ENV_RANGE (384 << 10) /* allow badblocks in env */
+
+/* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
+ * value can not be used here! */
+#define CONFIG_LOADADDR 0x82000000
+
+#define CONFIG_COMMON_ENV_SETTINGS \
"console=ttyO2,115200n8\0" \
"mmcdev=0\0" \
- "vram=12M\0" \
- "lcdmode=800x600\0" \
+ "vram=3M\0" \
"defaultdisplay=lcd\0" \
- "kernelopts=rw rootwait\0" \
+ "kernelopts=mtdoops.mtddev=3\0" \
+ "mtdparts=" MTDPARTS_DEFAULT "\0" \
+ "mtdids=" MTDIDS_DEFAULT "\0" \
"commonargs=" \
"setenv bootargs console=${console} " \
+ "${mtdparts} " \
+ "${kernelopts} " \
+ "vt.global_cursor_default=0 " \
"vram=${vram} " \
- "omapfb.mode=lcd:${lcdmode} " \
- "omapdss.def_disp=${defaultdisplay}\0" \
+ "omapdss.def_disp=${defaultdisplay}\0"
+
+#define CONFIG_BOOTCOMMAND "run autoboot"
+
+/* specific environment settings for different use cases
+ * FLASHCARD: used to run a rdimage from sdcard to program the device
+ * 'NORMAL': used to boot kernel from sdcard, nand, ...
+ *
+ * The main aim for the FLASHCARD skin is to have an embedded environment
+ * which will not be influenced by any data already on the device.
+ */
+#ifdef CONFIG_FLASHCARD
+
+#define CONFIG_ENV_IS_NOWHERE
+
+/* the rdaddr is 16 MiB before the loadaddr */
+#define CONFIG_ENV_RDADDR "rdaddr=0x81000000\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_COMMON_ENV_SETTINGS \
+ CONFIG_ENV_RDADDR \
+ "autoboot=" \
+ "run commonargs; " \
+ "setenv bootargs ${bootargs} " \
+ "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
+ "rdinit=/sbin/init; " \
+ "mmc dev ${mmcdev}; mmc rescan; " \
+ "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
+ "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
+ "bootm ${loadaddr} ${rdaddr}\0"
+
+#else /* CONFIG_FLASHCARD */
+
+#define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
+
+#define CONFIG_ENV_IS_IN_NAND
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ CONFIG_COMMON_ENV_SETTINGS \
"mmcargs=" \
"run commonargs; " \
"setenv bootargs ${bootargs} " \
"root=/dev/mmcblk0p2 " \
- "${kernelopts}\0" \
+ "rootwait " \
+ "rw\0" \
"nandargs=" \
"run commonargs; " \
"setenv bootargs ${bootargs} " \
- "omapfb.mode=lcd:${lcdmode} " \
- "omapdss.def_disp=${defaultdisplay} " \
"root=ubi0:root " \
- "ubi.mtd=4 " \
+ "ubi.mtd=7 " \
"rootfstype=ubifs " \
- "${kernelopts}\0" \
+ "ro\0" \
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
"bootscript=echo Running bootscript from mmc ...; " \
"source ${loadaddr}\0" \
"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
"mmcboot=echo Booting from mmc ...; " \
"run mmcargs; " \
"bootm ${loadaddr}\0" \
- "loaduimage_ubi=mtd default; " \
- "ubi part fs; " \
+ "loaduimage_ubi=ubi part ubi; " \
"ubifsmount ubi:root; " \
"ubifsload ${loadaddr} /boot/uImage\0" \
+ "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
- "run loaduimage_ubi; " \
+ "run loaduimage_nand; " \
"bootm ${loadaddr}\0" \
"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
"if run loadbootscript; then " \
@@ -197,12 +276,12 @@
"fi; " \
"else run nandboot; fi\0"
-
-#define CONFIG_BOOTCOMMAND "run autoboot"
+#endif /* CONFIG_FLASHCARD */
/* Miscellaneous configurable options */
#define CONFIG_SYS_LONGHELP /* undef to save memory */
#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+#define CONFIG_CMDLINE_EDITING /* enable cmdline history */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_PROMPT "OMAP3 Tricorder # "
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
@@ -214,9 +293,9 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
+#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x00000000)
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
- 0x01000000) /* 16MB */
+ 0x07000000) /* 112 MB */
#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0 + 0x02000000)
@@ -239,9 +318,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-#define CONFIG_ENV_IS_IN_NAND 1
-#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
-
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE 0x800
@@ -259,6 +335,7 @@
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_GPIO_SUPPORT
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
@@ -277,7 +354,7 @@
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE (55 * 1024) /* 7 KB for stack */
+#define CONFIG_SPL_MAX_SIZE (57 * 1024) /* 7 KB for stack */
#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
@@ -301,10 +378,12 @@
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x100000
#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
+#define CONFIG_SYS_ALT_MEMTEST
+#define CONFIG_SYS_MEMTEST_SCRATCH 0x81000000
#endif /* __CONFIG_H */
diff --git a/include/configs/vl_ma2sc.h b/include/configs/vl_ma2sc.h
index e171ae4c40..f5d856493c 100644
--- a/include/configs/vl_ma2sc.h
+++ b/include/configs/vl_ma2sc.h
@@ -116,6 +116,7 @@
/* USB */
#define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
#define CONFIG_USB_OHCI_NEW
#define CONFIG_DOS_PARTITION
#define CONFIG_SYS_USB_OHCI_CPU_INIT
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