diff options
Diffstat (limited to 'include/configs/scb9328.h')
| -rw-r--r-- | include/configs/scb9328.h | 114 |
1 files changed, 57 insertions, 57 deletions
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 12799559fb..5971df72fc 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -76,22 +76,22 @@ /* * General options for u-boot. Modify to save memory foot print */ -#define CFG_LONGHELP /* undef saves memory */ -#define CFG_PROMPT "scb9328> " /* prompt string */ -#define CFG_CBSIZE 256 /* console I/O buffer */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* print buffer size */ -#define CFG_MAXARGS 16 /* max command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* boot args buf size */ +#define CONFIG_SYS_LONGHELP /* undef saves memory */ +#define CONFIG_SYS_PROMPT "scb9328> " /* prompt string */ +#define CONFIG_SYS_CBSIZE 256 /* console I/O buffer */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* print buffer size */ +#define CONFIG_SYS_MAXARGS 16 /* max command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot args buf size */ -#define CFG_MEMTEST_START 0x08100000 /* memtest test area */ -#define CFG_MEMTEST_END 0x08F00000 +#define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */ +#define CONFIG_SYS_MEMTEST_END 0x08F00000 -#undef CFG_CLKS_IN_HZ /* use HZ for freq. display */ +#undef CONFIG_SYS_CLKS_IN_HZ /* use HZ for freq. display */ -#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ -#define CFG_CPUSPEED 0x141 /* core clock - register value */ +#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */ +#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */ -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #define CONFIG_BAUDRATE 115200 /* * Definitions related to passing arguments to kernel. @@ -105,10 +105,10 @@ /* * Malloc pool need to host env + 128 Kb reserve for other allocations. */ -#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) ) +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128<<10) ) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ #define CONFIG_STACKSIZE (120<<10) /* stack size */ @@ -152,8 +152,8 @@ /* 32MB */ #ifdef SCB9328_FLASH_32M -#define CFG_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/ -#define CFG_MAX_FLASH_SECT 256 /* number of sector in FLASH bank */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/ +#define CONFIG_SYS_MAX_FLASH_SECT 256 /* number of sector in FLASH bank */ #define SCB9328_FLASH_BUS_WIDTH 2 /* we use 16 bit FLASH memory... */ #define SCB9328_FLASH_INTERLEAVE 1 /* ... made of 1 chip */ #define SCB9328_FLASH_BANK_SIZE 0x02000000 /* size of one flash bank */ @@ -163,8 +163,8 @@ #else /* 16MB */ -#define CFG_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/ -#define CFG_MAX_FLASH_SECT 128 /* number of sector in FLASH bank */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/ +#define CONFIG_SYS_MAX_FLASH_SECT 128 /* number of sector in FLASH bank */ #define SCB9328_FLASH_BUS_WIDTH 2 /* we use 16 bit FLASH memory... */ #define SCB9328_FLASH_INTERLEAVE 1 /* ... made of 1 chip */ #define SCB9328_FLASH_BANK_SIZE 0x01000000 /* size of one flash bank */ @@ -177,12 +177,12 @@ is not so clear to me. In other words we can provide more informations to user, but this expects more complex flash handling we do not provide now.*/ -#undef CFG_FLASH_CFI +#undef CONFIG_SYS_FLASH_CFI -#define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* timeout for Erase operation */ -#define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* timeout for Write operation */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Erase operation */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Write operation */ -#define CFG_FLASH_BASE SCB9328_FLASH_BASE +#define CONFIG_SYS_FLASH_BASE SCB9328_FLASH_BASE /* * This is setting for JFFS2 support in u-boot. @@ -191,9 +191,9 @@ * footprint. * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ -#define CFG_JFFS2_FIRST_BANK 0 -#define CFG_JFFS2_FIRST_SECTOR 5 -#define CFG_JFFS2_NUM_BANKS 1 +#define CONFIG_SYS_JFFS2_FIRST_BANK 0 +#define CONFIG_SYS_JFFS2_FIRST_SECTOR 5 +#define CONFIG_SYS_JFFS2_NUM_BANKS 1 /* * Environment setup. Definitions of monitor location and size with @@ -210,11 +210,11 @@ /* Setup for PA23 which is Reset Default PA23 but has to become CS5 */ -#define CFG_GPR_A_VAL 0x00800000 -#define CFG_GIUS_A_VAL 0x0043fffe +#define CONFIG_SYS_GPR_A_VAL 0x00800000 +#define CONFIG_SYS_GIUS_A_VAL 0x0043fffe -#define CFG_MONITOR_BASE 0x10000000 -#define CFG_MONITOR_LEN 0x20000 /* 128b ( 1 flash sector ) */ +#define CONFIG_SYS_MONITOR_BASE 0x10000000 +#define CONFIG_SYS_MONITOR_LEN 0x20000 /* 128b ( 1 flash sector ) */ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_ADDR 0x10020000 /* absolute address for now */ #define CONFIG_ENV_SIZE 0x20000 @@ -231,30 +231,30 @@ * | OEA | OEN | WEA | WEN | CSA |EBC| DSZ | 0|SP|0|WP| 0 0|PA|CSEN| */ -#define CFG_CS0U_VAL 0x000F2000 -#define CFG_CS0L_VAL 0x11110d01 -#define CFG_CS1U_VAL 0x000F0a00 -#define CFG_CS1L_VAL 0x11110601 -#define CFG_CS2U_VAL 0x0 -#define CFG_CS2L_VAL 0x0 +#define CONFIG_SYS_CS0U_VAL 0x000F2000 +#define CONFIG_SYS_CS0L_VAL 0x11110d01 +#define CONFIG_SYS_CS1U_VAL 0x000F0a00 +#define CONFIG_SYS_CS1L_VAL 0x11110601 +#define CONFIG_SYS_CS2U_VAL 0x0 +#define CONFIG_SYS_CS2L_VAL 0x0 -#define CFG_CS3U_VAL 0x000FFFFF -#define CFG_CS3L_VAL 0x00000303 +#define CONFIG_SYS_CS3U_VAL 0x000FFFFF +#define CONFIG_SYS_CS3L_VAL 0x00000303 -#define CFG_CS4U_VAL 0x000F0a00 -#define CFG_CS4L_VAL 0x11110301 +#define CONFIG_SYS_CS4U_VAL 0x000F0a00 +#define CONFIG_SYS_CS4L_VAL 0x11110301 /* CNC == 3 too long - #define CFG_CS5U_VAL 0x0000C210 */ + #define CONFIG_SYS_CS5U_VAL 0x0000C210 */ -/* #define CFG_CS5U_VAL 0x00008400 +/* #define CONFIG_SYS_CS5U_VAL 0x00008400 mal laenger mahcen, ob der bei 150MHz laenger haelt dann und kaum langsamer ist */ -/* #define CFG_CS5U_VAL 0x00009400 - #define CFG_CS5L_VAL 0x11010D03 */ +/* #define CONFIG_SYS_CS5U_VAL 0x00009400 + #define CONFIG_SYS_CS5L_VAL 0x11010D03 */ -#define CFG_CS5U_VAL 0x00008400 -#define CFG_CS5L_VAL 0x00000D03 +#define CONFIG_SYS_CS5U_VAL 0x00008400 +#define CONFIG_SYS_CS5L_VAL 0x00000D03 #define CONFIG_DRIVER_DM9000 1 #define CONFIG_DM9000_BASE 0x16000000 @@ -281,24 +281,24 @@ #define CPU200 #ifdef CPU200 -#define CFG_MPCTL0_VAL 0x00321431 +#define CONFIG_SYS_MPCTL0_VAL 0x00321431 #else -#define CFG_MPCTL0_VAL 0x040e200e +#define CONFIG_SYS_MPCTL0_VAL 0x040e200e #endif /* #define BUS64 */ #define BUS72 #ifdef BUS72 -#define CFG_SPCTL0_VAL 0x04002400 +#define CONFIG_SYS_SPCTL0_VAL 0x04002400 #endif #ifdef BUS96 -#define CFG_SPCTL0_VAL 0x04001800 +#define CONFIG_SYS_SPCTL0_VAL 0x04001800 #endif #ifdef BUS64 -#define CFG_SPCTL0_VAL 0x08001800 +#define CONFIG_SYS_SPCTL0_VAL 0x08001800 #endif /* Das ist der BCLK Divider, der aus der System PLL @@ -312,11 +312,11 @@ Bit 21: MPLL Restart */ #ifdef BUS64 -#define CFG_CSCR_VAL 0x2f030003 +#define CONFIG_SYS_CSCR_VAL 0x2f030003 #endif #ifdef BUS72 -#define CFG_CSCR_VAL 0x2f030403 +#define CONFIG_SYS_CSCR_VAL 0x2f030403 #endif /* @@ -324,7 +324,7 @@ * one may expect. For instance loadb command do not cares :-) * So advice is - do not relay on this... */ -#define CFG_LOAD_ADDR 0x08400000 +#define CONFIG_SYS_LOAD_ADDR 0x08400000 #define MHZ16QUARZINUSE @@ -337,7 +337,7 @@ #define CONFIG_SYS_CLK_FREQ 16780000 /* FMCR Bit 0 becomes 0 to make CS3 CS3 :P */ -#define CFG_FMCR_VAL 0x00000001 +#define CONFIG_SYS_FMCR_VAL 0x00000001 /* Bit[0:3] contain PERCLK1DIV for UART 1 0x000b00b ->b<- -> 192MHz/12=16MHz @@ -345,15 +345,15 @@ 0x000b00b ->3<- -> 64MHz/4=16MHz */ #ifdef BUS96 -#define CFG_PCDR_VAL 0x000b00b5 +#define CONFIG_SYS_PCDR_VAL 0x000b00b5 #endif #ifdef BUS64 -#define CFG_PCDR_VAL 0x000b00b3 +#define CONFIG_SYS_PCDR_VAL 0x000b00b3 #endif #ifdef BUS72 -#define CFG_PCDR_VAL 0x000b00b8 +#define CONFIG_SYS_PCDR_VAL 0x000b00b8 #endif #endif /* __CONFIG_H */ |
